xref: /OK3568_Linux_fs/kernel/drivers/hid/hid-cp2112.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * hid-cp2112.c - Silicon Labs HID USB to SMBus master bridge
4*4882a593Smuzhiyun  * Copyright (c) 2013,2014 Uplogix, Inc.
5*4882a593Smuzhiyun  * David Barksdale <dbarksdale@uplogix.com>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun /*
9*4882a593Smuzhiyun  * The Silicon Labs CP2112 chip is a USB HID device which provides an
10*4882a593Smuzhiyun  * SMBus controller for talking to slave devices and 8 GPIO pins. The
11*4882a593Smuzhiyun  * host communicates with the CP2112 via raw HID reports.
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * Data Sheet:
14*4882a593Smuzhiyun  *   https://www.silabs.com/Support%20Documents/TechnicalDocs/CP2112.pdf
15*4882a593Smuzhiyun  * Programming Interface Specification:
16*4882a593Smuzhiyun  *   https://www.silabs.com/documents/public/application-notes/an495-cp2112-interface-specification.pdf
17*4882a593Smuzhiyun  */
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
20*4882a593Smuzhiyun #include <linux/gpio/machine.h>
21*4882a593Smuzhiyun #include <linux/gpio/driver.h>
22*4882a593Smuzhiyun #include <linux/hid.h>
23*4882a593Smuzhiyun #include <linux/hidraw.h>
24*4882a593Smuzhiyun #include <linux/i2c.h>
25*4882a593Smuzhiyun #include <linux/module.h>
26*4882a593Smuzhiyun #include <linux/nls.h>
27*4882a593Smuzhiyun #include <linux/usb/ch9.h>
28*4882a593Smuzhiyun #include "hid-ids.h"
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define CP2112_REPORT_MAX_LENGTH		64
31*4882a593Smuzhiyun #define CP2112_GPIO_CONFIG_LENGTH		5
32*4882a593Smuzhiyun #define CP2112_GPIO_GET_LENGTH			2
33*4882a593Smuzhiyun #define CP2112_GPIO_SET_LENGTH			3
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun enum {
36*4882a593Smuzhiyun 	CP2112_GPIO_CONFIG		= 0x02,
37*4882a593Smuzhiyun 	CP2112_GPIO_GET			= 0x03,
38*4882a593Smuzhiyun 	CP2112_GPIO_SET			= 0x04,
39*4882a593Smuzhiyun 	CP2112_GET_VERSION_INFO		= 0x05,
40*4882a593Smuzhiyun 	CP2112_SMBUS_CONFIG		= 0x06,
41*4882a593Smuzhiyun 	CP2112_DATA_READ_REQUEST	= 0x10,
42*4882a593Smuzhiyun 	CP2112_DATA_WRITE_READ_REQUEST	= 0x11,
43*4882a593Smuzhiyun 	CP2112_DATA_READ_FORCE_SEND	= 0x12,
44*4882a593Smuzhiyun 	CP2112_DATA_READ_RESPONSE	= 0x13,
45*4882a593Smuzhiyun 	CP2112_DATA_WRITE_REQUEST	= 0x14,
46*4882a593Smuzhiyun 	CP2112_TRANSFER_STATUS_REQUEST	= 0x15,
47*4882a593Smuzhiyun 	CP2112_TRANSFER_STATUS_RESPONSE	= 0x16,
48*4882a593Smuzhiyun 	CP2112_CANCEL_TRANSFER		= 0x17,
49*4882a593Smuzhiyun 	CP2112_LOCK_BYTE		= 0x20,
50*4882a593Smuzhiyun 	CP2112_USB_CONFIG		= 0x21,
51*4882a593Smuzhiyun 	CP2112_MANUFACTURER_STRING	= 0x22,
52*4882a593Smuzhiyun 	CP2112_PRODUCT_STRING		= 0x23,
53*4882a593Smuzhiyun 	CP2112_SERIAL_STRING		= 0x24,
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun enum {
57*4882a593Smuzhiyun 	STATUS0_IDLE		= 0x00,
58*4882a593Smuzhiyun 	STATUS0_BUSY		= 0x01,
59*4882a593Smuzhiyun 	STATUS0_COMPLETE	= 0x02,
60*4882a593Smuzhiyun 	STATUS0_ERROR		= 0x03,
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun enum {
64*4882a593Smuzhiyun 	STATUS1_TIMEOUT_NACK		= 0x00,
65*4882a593Smuzhiyun 	STATUS1_TIMEOUT_BUS		= 0x01,
66*4882a593Smuzhiyun 	STATUS1_ARBITRATION_LOST	= 0x02,
67*4882a593Smuzhiyun 	STATUS1_READ_INCOMPLETE		= 0x03,
68*4882a593Smuzhiyun 	STATUS1_WRITE_INCOMPLETE	= 0x04,
69*4882a593Smuzhiyun 	STATUS1_SUCCESS			= 0x05,
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun struct cp2112_smbus_config_report {
73*4882a593Smuzhiyun 	u8 report;		/* CP2112_SMBUS_CONFIG */
74*4882a593Smuzhiyun 	__be32 clock_speed;	/* Hz */
75*4882a593Smuzhiyun 	u8 device_address;	/* Stored in the upper 7 bits */
76*4882a593Smuzhiyun 	u8 auto_send_read;	/* 1 = enabled, 0 = disabled */
77*4882a593Smuzhiyun 	__be16 write_timeout;	/* ms, 0 = no timeout */
78*4882a593Smuzhiyun 	__be16 read_timeout;	/* ms, 0 = no timeout */
79*4882a593Smuzhiyun 	u8 scl_low_timeout;	/* 1 = enabled, 0 = disabled */
80*4882a593Smuzhiyun 	__be16 retry_time;	/* # of retries, 0 = no limit */
81*4882a593Smuzhiyun } __packed;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun struct cp2112_usb_config_report {
84*4882a593Smuzhiyun 	u8 report;	/* CP2112_USB_CONFIG */
85*4882a593Smuzhiyun 	__le16 vid;	/* Vendor ID */
86*4882a593Smuzhiyun 	__le16 pid;	/* Product ID */
87*4882a593Smuzhiyun 	u8 max_power;	/* Power requested in 2mA units */
88*4882a593Smuzhiyun 	u8 power_mode;	/* 0x00 = bus powered
89*4882a593Smuzhiyun 			   0x01 = self powered & regulator off
90*4882a593Smuzhiyun 			   0x02 = self powered & regulator on */
91*4882a593Smuzhiyun 	u8 release_major;
92*4882a593Smuzhiyun 	u8 release_minor;
93*4882a593Smuzhiyun 	u8 mask;	/* What fields to program */
94*4882a593Smuzhiyun } __packed;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun struct cp2112_read_req_report {
97*4882a593Smuzhiyun 	u8 report;	/* CP2112_DATA_READ_REQUEST */
98*4882a593Smuzhiyun 	u8 slave_address;
99*4882a593Smuzhiyun 	__be16 length;
100*4882a593Smuzhiyun } __packed;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun struct cp2112_write_read_req_report {
103*4882a593Smuzhiyun 	u8 report;	/* CP2112_DATA_WRITE_READ_REQUEST */
104*4882a593Smuzhiyun 	u8 slave_address;
105*4882a593Smuzhiyun 	__be16 length;
106*4882a593Smuzhiyun 	u8 target_address_length;
107*4882a593Smuzhiyun 	u8 target_address[16];
108*4882a593Smuzhiyun } __packed;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun struct cp2112_write_req_report {
111*4882a593Smuzhiyun 	u8 report;	/* CP2112_DATA_WRITE_REQUEST */
112*4882a593Smuzhiyun 	u8 slave_address;
113*4882a593Smuzhiyun 	u8 length;
114*4882a593Smuzhiyun 	u8 data[61];
115*4882a593Smuzhiyun } __packed;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun struct cp2112_force_read_report {
118*4882a593Smuzhiyun 	u8 report;	/* CP2112_DATA_READ_FORCE_SEND */
119*4882a593Smuzhiyun 	__be16 length;
120*4882a593Smuzhiyun } __packed;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun struct cp2112_xfer_status_report {
123*4882a593Smuzhiyun 	u8 report;	/* CP2112_TRANSFER_STATUS_RESPONSE */
124*4882a593Smuzhiyun 	u8 status0;	/* STATUS0_* */
125*4882a593Smuzhiyun 	u8 status1;	/* STATUS1_* */
126*4882a593Smuzhiyun 	__be16 retries;
127*4882a593Smuzhiyun 	__be16 length;
128*4882a593Smuzhiyun } __packed;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun struct cp2112_string_report {
131*4882a593Smuzhiyun 	u8 dummy;		/* force .string to be aligned */
132*4882a593Smuzhiyun 	u8 report;		/* CP2112_*_STRING */
133*4882a593Smuzhiyun 	u8 length;		/* length in bytes of everyting after .report */
134*4882a593Smuzhiyun 	u8 type;		/* USB_DT_STRING */
135*4882a593Smuzhiyun 	wchar_t string[30];	/* UTF16_LITTLE_ENDIAN string */
136*4882a593Smuzhiyun } __packed;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun /* Number of times to request transfer status before giving up waiting for a
139*4882a593Smuzhiyun    transfer to complete. This may need to be changed if SMBUS clock, retries,
140*4882a593Smuzhiyun    or read/write/scl_low timeout settings are changed. */
141*4882a593Smuzhiyun static const int XFER_STATUS_RETRIES = 10;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun /* Time in ms to wait for a CP2112_DATA_READ_RESPONSE or
144*4882a593Smuzhiyun    CP2112_TRANSFER_STATUS_RESPONSE. */
145*4882a593Smuzhiyun static const int RESPONSE_TIMEOUT = 50;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun static const struct hid_device_id cp2112_devices[] = {
148*4882a593Smuzhiyun 	{ HID_USB_DEVICE(USB_VENDOR_ID_CYGNAL, USB_DEVICE_ID_CYGNAL_CP2112) },
149*4882a593Smuzhiyun 	{ }
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun MODULE_DEVICE_TABLE(hid, cp2112_devices);
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun struct cp2112_device {
154*4882a593Smuzhiyun 	struct i2c_adapter adap;
155*4882a593Smuzhiyun 	struct hid_device *hdev;
156*4882a593Smuzhiyun 	wait_queue_head_t wait;
157*4882a593Smuzhiyun 	u8 read_data[61];
158*4882a593Smuzhiyun 	u8 read_length;
159*4882a593Smuzhiyun 	u8 hwversion;
160*4882a593Smuzhiyun 	int xfer_status;
161*4882a593Smuzhiyun 	atomic_t read_avail;
162*4882a593Smuzhiyun 	atomic_t xfer_avail;
163*4882a593Smuzhiyun 	struct gpio_chip gc;
164*4882a593Smuzhiyun 	struct irq_chip irq;
165*4882a593Smuzhiyun 	u8 *in_out_buffer;
166*4882a593Smuzhiyun 	struct mutex lock;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	struct gpio_desc *desc[8];
169*4882a593Smuzhiyun 	bool gpio_poll;
170*4882a593Smuzhiyun 	struct delayed_work gpio_poll_worker;
171*4882a593Smuzhiyun 	unsigned long irq_mask;
172*4882a593Smuzhiyun 	u8 gpio_prev_state;
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun static int gpio_push_pull = 0xFF;
176*4882a593Smuzhiyun module_param(gpio_push_pull, int, S_IRUGO | S_IWUSR);
177*4882a593Smuzhiyun MODULE_PARM_DESC(gpio_push_pull, "GPIO push-pull configuration bitmask");
178*4882a593Smuzhiyun 
cp2112_gpio_direction_input(struct gpio_chip * chip,unsigned offset)179*4882a593Smuzhiyun static int cp2112_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun 	struct cp2112_device *dev = gpiochip_get_data(chip);
182*4882a593Smuzhiyun 	struct hid_device *hdev = dev->hdev;
183*4882a593Smuzhiyun 	u8 *buf = dev->in_out_buffer;
184*4882a593Smuzhiyun 	int ret;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	mutex_lock(&dev->lock);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
189*4882a593Smuzhiyun 				 CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
190*4882a593Smuzhiyun 				 HID_REQ_GET_REPORT);
191*4882a593Smuzhiyun 	if (ret != CP2112_GPIO_CONFIG_LENGTH) {
192*4882a593Smuzhiyun 		hid_err(hdev, "error requesting GPIO config: %d\n", ret);
193*4882a593Smuzhiyun 		if (ret >= 0)
194*4882a593Smuzhiyun 			ret = -EIO;
195*4882a593Smuzhiyun 		goto exit;
196*4882a593Smuzhiyun 	}
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	buf[1] &= ~(1 << offset);
199*4882a593Smuzhiyun 	buf[2] = gpio_push_pull;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
202*4882a593Smuzhiyun 				 CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
203*4882a593Smuzhiyun 				 HID_REQ_SET_REPORT);
204*4882a593Smuzhiyun 	if (ret != CP2112_GPIO_CONFIG_LENGTH) {
205*4882a593Smuzhiyun 		hid_err(hdev, "error setting GPIO config: %d\n", ret);
206*4882a593Smuzhiyun 		if (ret >= 0)
207*4882a593Smuzhiyun 			ret = -EIO;
208*4882a593Smuzhiyun 		goto exit;
209*4882a593Smuzhiyun 	}
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	ret = 0;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun exit:
214*4882a593Smuzhiyun 	mutex_unlock(&dev->lock);
215*4882a593Smuzhiyun 	return ret;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun 
cp2112_gpio_set(struct gpio_chip * chip,unsigned offset,int value)218*4882a593Smuzhiyun static void cp2112_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun 	struct cp2112_device *dev = gpiochip_get_data(chip);
221*4882a593Smuzhiyun 	struct hid_device *hdev = dev->hdev;
222*4882a593Smuzhiyun 	u8 *buf = dev->in_out_buffer;
223*4882a593Smuzhiyun 	int ret;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	mutex_lock(&dev->lock);
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	buf[0] = CP2112_GPIO_SET;
228*4882a593Smuzhiyun 	buf[1] = value ? 0xff : 0;
229*4882a593Smuzhiyun 	buf[2] = 1 << offset;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	ret = hid_hw_raw_request(hdev, CP2112_GPIO_SET, buf,
232*4882a593Smuzhiyun 				 CP2112_GPIO_SET_LENGTH, HID_FEATURE_REPORT,
233*4882a593Smuzhiyun 				 HID_REQ_SET_REPORT);
234*4882a593Smuzhiyun 	if (ret < 0)
235*4882a593Smuzhiyun 		hid_err(hdev, "error setting GPIO values: %d\n", ret);
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	mutex_unlock(&dev->lock);
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun 
cp2112_gpio_get_all(struct gpio_chip * chip)240*4882a593Smuzhiyun static int cp2112_gpio_get_all(struct gpio_chip *chip)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun 	struct cp2112_device *dev = gpiochip_get_data(chip);
243*4882a593Smuzhiyun 	struct hid_device *hdev = dev->hdev;
244*4882a593Smuzhiyun 	u8 *buf = dev->in_out_buffer;
245*4882a593Smuzhiyun 	int ret;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	mutex_lock(&dev->lock);
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	ret = hid_hw_raw_request(hdev, CP2112_GPIO_GET, buf,
250*4882a593Smuzhiyun 				 CP2112_GPIO_GET_LENGTH, HID_FEATURE_REPORT,
251*4882a593Smuzhiyun 				 HID_REQ_GET_REPORT);
252*4882a593Smuzhiyun 	if (ret != CP2112_GPIO_GET_LENGTH) {
253*4882a593Smuzhiyun 		hid_err(hdev, "error requesting GPIO values: %d\n", ret);
254*4882a593Smuzhiyun 		ret = ret < 0 ? ret : -EIO;
255*4882a593Smuzhiyun 		goto exit;
256*4882a593Smuzhiyun 	}
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	ret = buf[1];
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun exit:
261*4882a593Smuzhiyun 	mutex_unlock(&dev->lock);
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	return ret;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun 
cp2112_gpio_get(struct gpio_chip * chip,unsigned int offset)266*4882a593Smuzhiyun static int cp2112_gpio_get(struct gpio_chip *chip, unsigned int offset)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun 	int ret;
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	ret = cp2112_gpio_get_all(chip);
271*4882a593Smuzhiyun 	if (ret < 0)
272*4882a593Smuzhiyun 		return ret;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	return (ret >> offset) & 1;
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun 
cp2112_gpio_direction_output(struct gpio_chip * chip,unsigned offset,int value)277*4882a593Smuzhiyun static int cp2112_gpio_direction_output(struct gpio_chip *chip,
278*4882a593Smuzhiyun 					unsigned offset, int value)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun 	struct cp2112_device *dev = gpiochip_get_data(chip);
281*4882a593Smuzhiyun 	struct hid_device *hdev = dev->hdev;
282*4882a593Smuzhiyun 	u8 *buf = dev->in_out_buffer;
283*4882a593Smuzhiyun 	int ret;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	mutex_lock(&dev->lock);
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
288*4882a593Smuzhiyun 				 CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
289*4882a593Smuzhiyun 				 HID_REQ_GET_REPORT);
290*4882a593Smuzhiyun 	if (ret != CP2112_GPIO_CONFIG_LENGTH) {
291*4882a593Smuzhiyun 		hid_err(hdev, "error requesting GPIO config: %d\n", ret);
292*4882a593Smuzhiyun 		goto fail;
293*4882a593Smuzhiyun 	}
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	buf[1] |= 1 << offset;
296*4882a593Smuzhiyun 	buf[2] = gpio_push_pull;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
299*4882a593Smuzhiyun 				 CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
300*4882a593Smuzhiyun 				 HID_REQ_SET_REPORT);
301*4882a593Smuzhiyun 	if (ret < 0) {
302*4882a593Smuzhiyun 		hid_err(hdev, "error setting GPIO config: %d\n", ret);
303*4882a593Smuzhiyun 		goto fail;
304*4882a593Smuzhiyun 	}
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	mutex_unlock(&dev->lock);
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	/*
309*4882a593Smuzhiyun 	 * Set gpio value when output direction is already set,
310*4882a593Smuzhiyun 	 * as specified in AN495, Rev. 0.2, cpt. 4.4
311*4882a593Smuzhiyun 	 */
312*4882a593Smuzhiyun 	cp2112_gpio_set(chip, offset, value);
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	return 0;
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun fail:
317*4882a593Smuzhiyun 	mutex_unlock(&dev->lock);
318*4882a593Smuzhiyun 	return ret < 0 ? ret : -EIO;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun 
cp2112_hid_get(struct hid_device * hdev,unsigned char report_number,u8 * data,size_t count,unsigned char report_type)321*4882a593Smuzhiyun static int cp2112_hid_get(struct hid_device *hdev, unsigned char report_number,
322*4882a593Smuzhiyun 			  u8 *data, size_t count, unsigned char report_type)
323*4882a593Smuzhiyun {
324*4882a593Smuzhiyun 	u8 *buf;
325*4882a593Smuzhiyun 	int ret;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	buf = kmalloc(count, GFP_KERNEL);
328*4882a593Smuzhiyun 	if (!buf)
329*4882a593Smuzhiyun 		return -ENOMEM;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	ret = hid_hw_raw_request(hdev, report_number, buf, count,
332*4882a593Smuzhiyun 				       report_type, HID_REQ_GET_REPORT);
333*4882a593Smuzhiyun 	memcpy(data, buf, count);
334*4882a593Smuzhiyun 	kfree(buf);
335*4882a593Smuzhiyun 	return ret;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun 
cp2112_hid_output(struct hid_device * hdev,u8 * data,size_t count,unsigned char report_type)338*4882a593Smuzhiyun static int cp2112_hid_output(struct hid_device *hdev, u8 *data, size_t count,
339*4882a593Smuzhiyun 			     unsigned char report_type)
340*4882a593Smuzhiyun {
341*4882a593Smuzhiyun 	u8 *buf;
342*4882a593Smuzhiyun 	int ret;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	buf = kmemdup(data, count, GFP_KERNEL);
345*4882a593Smuzhiyun 	if (!buf)
346*4882a593Smuzhiyun 		return -ENOMEM;
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	if (report_type == HID_OUTPUT_REPORT)
349*4882a593Smuzhiyun 		ret = hid_hw_output_report(hdev, buf, count);
350*4882a593Smuzhiyun 	else
351*4882a593Smuzhiyun 		ret = hid_hw_raw_request(hdev, buf[0], buf, count, report_type,
352*4882a593Smuzhiyun 				HID_REQ_SET_REPORT);
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	kfree(buf);
355*4882a593Smuzhiyun 	return ret;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun 
cp2112_wait(struct cp2112_device * dev,atomic_t * avail)358*4882a593Smuzhiyun static int cp2112_wait(struct cp2112_device *dev, atomic_t *avail)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun 	int ret = 0;
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	/* We have sent either a CP2112_TRANSFER_STATUS_REQUEST or a
363*4882a593Smuzhiyun 	 * CP2112_DATA_READ_FORCE_SEND and we are waiting for the response to
364*4882a593Smuzhiyun 	 * come in cp2112_raw_event or timeout. There will only be one of these
365*4882a593Smuzhiyun 	 * in flight at any one time. The timeout is extremely large and is a
366*4882a593Smuzhiyun 	 * last resort if the CP2112 has died. If we do timeout we don't expect
367*4882a593Smuzhiyun 	 * to receive the response which would cause data races, it's not like
368*4882a593Smuzhiyun 	 * we can do anything about it anyway.
369*4882a593Smuzhiyun 	 */
370*4882a593Smuzhiyun 	ret = wait_event_interruptible_timeout(dev->wait,
371*4882a593Smuzhiyun 		atomic_read(avail), msecs_to_jiffies(RESPONSE_TIMEOUT));
372*4882a593Smuzhiyun 	if (-ERESTARTSYS == ret)
373*4882a593Smuzhiyun 		return ret;
374*4882a593Smuzhiyun 	if (!ret)
375*4882a593Smuzhiyun 		return -ETIMEDOUT;
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 	atomic_set(avail, 0);
378*4882a593Smuzhiyun 	return 0;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun 
cp2112_xfer_status(struct cp2112_device * dev)381*4882a593Smuzhiyun static int cp2112_xfer_status(struct cp2112_device *dev)
382*4882a593Smuzhiyun {
383*4882a593Smuzhiyun 	struct hid_device *hdev = dev->hdev;
384*4882a593Smuzhiyun 	u8 buf[2];
385*4882a593Smuzhiyun 	int ret;
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun 	buf[0] = CP2112_TRANSFER_STATUS_REQUEST;
388*4882a593Smuzhiyun 	buf[1] = 0x01;
389*4882a593Smuzhiyun 	atomic_set(&dev->xfer_avail, 0);
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
392*4882a593Smuzhiyun 	if (ret < 0) {
393*4882a593Smuzhiyun 		hid_warn(hdev, "Error requesting status: %d\n", ret);
394*4882a593Smuzhiyun 		return ret;
395*4882a593Smuzhiyun 	}
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	ret = cp2112_wait(dev, &dev->xfer_avail);
398*4882a593Smuzhiyun 	if (ret)
399*4882a593Smuzhiyun 		return ret;
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	return dev->xfer_status;
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun 
cp2112_read(struct cp2112_device * dev,u8 * data,size_t size)404*4882a593Smuzhiyun static int cp2112_read(struct cp2112_device *dev, u8 *data, size_t size)
405*4882a593Smuzhiyun {
406*4882a593Smuzhiyun 	struct hid_device *hdev = dev->hdev;
407*4882a593Smuzhiyun 	struct cp2112_force_read_report report;
408*4882a593Smuzhiyun 	int ret;
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	if (size > sizeof(dev->read_data))
411*4882a593Smuzhiyun 		size = sizeof(dev->read_data);
412*4882a593Smuzhiyun 	report.report = CP2112_DATA_READ_FORCE_SEND;
413*4882a593Smuzhiyun 	report.length = cpu_to_be16(size);
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	atomic_set(&dev->read_avail, 0);
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	ret = cp2112_hid_output(hdev, &report.report, sizeof(report),
418*4882a593Smuzhiyun 				HID_OUTPUT_REPORT);
419*4882a593Smuzhiyun 	if (ret < 0) {
420*4882a593Smuzhiyun 		hid_warn(hdev, "Error requesting data: %d\n", ret);
421*4882a593Smuzhiyun 		return ret;
422*4882a593Smuzhiyun 	}
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun 	ret = cp2112_wait(dev, &dev->read_avail);
425*4882a593Smuzhiyun 	if (ret)
426*4882a593Smuzhiyun 		return ret;
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	hid_dbg(hdev, "read %d of %zd bytes requested\n",
429*4882a593Smuzhiyun 		dev->read_length, size);
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun 	if (size > dev->read_length)
432*4882a593Smuzhiyun 		size = dev->read_length;
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	memcpy(data, dev->read_data, size);
435*4882a593Smuzhiyun 	return dev->read_length;
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun 
cp2112_read_req(void * buf,u8 slave_address,u16 length)438*4882a593Smuzhiyun static int cp2112_read_req(void *buf, u8 slave_address, u16 length)
439*4882a593Smuzhiyun {
440*4882a593Smuzhiyun 	struct cp2112_read_req_report *report = buf;
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	if (length < 1 || length > 512)
443*4882a593Smuzhiyun 		return -EINVAL;
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	report->report = CP2112_DATA_READ_REQUEST;
446*4882a593Smuzhiyun 	report->slave_address = slave_address << 1;
447*4882a593Smuzhiyun 	report->length = cpu_to_be16(length);
448*4882a593Smuzhiyun 	return sizeof(*report);
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun 
cp2112_write_read_req(void * buf,u8 slave_address,u16 length,u8 command,u8 * data,u8 data_length)451*4882a593Smuzhiyun static int cp2112_write_read_req(void *buf, u8 slave_address, u16 length,
452*4882a593Smuzhiyun 				 u8 command, u8 *data, u8 data_length)
453*4882a593Smuzhiyun {
454*4882a593Smuzhiyun 	struct cp2112_write_read_req_report *report = buf;
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	if (length < 1 || length > 512
457*4882a593Smuzhiyun 	    || data_length > sizeof(report->target_address) - 1)
458*4882a593Smuzhiyun 		return -EINVAL;
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 	report->report = CP2112_DATA_WRITE_READ_REQUEST;
461*4882a593Smuzhiyun 	report->slave_address = slave_address << 1;
462*4882a593Smuzhiyun 	report->length = cpu_to_be16(length);
463*4882a593Smuzhiyun 	report->target_address_length = data_length + 1;
464*4882a593Smuzhiyun 	report->target_address[0] = command;
465*4882a593Smuzhiyun 	memcpy(&report->target_address[1], data, data_length);
466*4882a593Smuzhiyun 	return data_length + 6;
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun 
cp2112_write_req(void * buf,u8 slave_address,u8 command,u8 * data,u8 data_length)469*4882a593Smuzhiyun static int cp2112_write_req(void *buf, u8 slave_address, u8 command, u8 *data,
470*4882a593Smuzhiyun 			    u8 data_length)
471*4882a593Smuzhiyun {
472*4882a593Smuzhiyun 	struct cp2112_write_req_report *report = buf;
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	if (data_length > sizeof(report->data) - 1)
475*4882a593Smuzhiyun 		return -EINVAL;
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	report->report = CP2112_DATA_WRITE_REQUEST;
478*4882a593Smuzhiyun 	report->slave_address = slave_address << 1;
479*4882a593Smuzhiyun 	report->length = data_length + 1;
480*4882a593Smuzhiyun 	report->data[0] = command;
481*4882a593Smuzhiyun 	memcpy(&report->data[1], data, data_length);
482*4882a593Smuzhiyun 	return data_length + 4;
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun 
cp2112_i2c_write_req(void * buf,u8 slave_address,u8 * data,u8 data_length)485*4882a593Smuzhiyun static int cp2112_i2c_write_req(void *buf, u8 slave_address, u8 *data,
486*4882a593Smuzhiyun 				u8 data_length)
487*4882a593Smuzhiyun {
488*4882a593Smuzhiyun 	struct cp2112_write_req_report *report = buf;
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	if (data_length > sizeof(report->data))
491*4882a593Smuzhiyun 		return -EINVAL;
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	report->report = CP2112_DATA_WRITE_REQUEST;
494*4882a593Smuzhiyun 	report->slave_address = slave_address << 1;
495*4882a593Smuzhiyun 	report->length = data_length;
496*4882a593Smuzhiyun 	memcpy(report->data, data, data_length);
497*4882a593Smuzhiyun 	return data_length + 3;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun 
cp2112_i2c_write_read_req(void * buf,u8 slave_address,u8 * addr,int addr_length,int read_length)500*4882a593Smuzhiyun static int cp2112_i2c_write_read_req(void *buf, u8 slave_address,
501*4882a593Smuzhiyun 				     u8 *addr, int addr_length,
502*4882a593Smuzhiyun 				     int read_length)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun 	struct cp2112_write_read_req_report *report = buf;
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun 	if (read_length < 1 || read_length > 512 ||
507*4882a593Smuzhiyun 	    addr_length > sizeof(report->target_address))
508*4882a593Smuzhiyun 		return -EINVAL;
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	report->report = CP2112_DATA_WRITE_READ_REQUEST;
511*4882a593Smuzhiyun 	report->slave_address = slave_address << 1;
512*4882a593Smuzhiyun 	report->length = cpu_to_be16(read_length);
513*4882a593Smuzhiyun 	report->target_address_length = addr_length;
514*4882a593Smuzhiyun 	memcpy(report->target_address, addr, addr_length);
515*4882a593Smuzhiyun 	return addr_length + 5;
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun 
cp2112_i2c_xfer(struct i2c_adapter * adap,struct i2c_msg * msgs,int num)518*4882a593Smuzhiyun static int cp2112_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
519*4882a593Smuzhiyun 			   int num)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun 	struct cp2112_device *dev = (struct cp2112_device *)adap->algo_data;
522*4882a593Smuzhiyun 	struct hid_device *hdev = dev->hdev;
523*4882a593Smuzhiyun 	u8 buf[64];
524*4882a593Smuzhiyun 	ssize_t count;
525*4882a593Smuzhiyun 	ssize_t read_length = 0;
526*4882a593Smuzhiyun 	u8 *read_buf = NULL;
527*4882a593Smuzhiyun 	unsigned int retries;
528*4882a593Smuzhiyun 	int ret;
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun 	hid_dbg(hdev, "I2C %d messages\n", num);
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	if (num == 1) {
533*4882a593Smuzhiyun 		if (msgs->flags & I2C_M_RD) {
534*4882a593Smuzhiyun 			hid_dbg(hdev, "I2C read %#04x len %d\n",
535*4882a593Smuzhiyun 				msgs->addr, msgs->len);
536*4882a593Smuzhiyun 			read_length = msgs->len;
537*4882a593Smuzhiyun 			read_buf = msgs->buf;
538*4882a593Smuzhiyun 			count = cp2112_read_req(buf, msgs->addr, msgs->len);
539*4882a593Smuzhiyun 		} else {
540*4882a593Smuzhiyun 			hid_dbg(hdev, "I2C write %#04x len %d\n",
541*4882a593Smuzhiyun 				msgs->addr, msgs->len);
542*4882a593Smuzhiyun 			count = cp2112_i2c_write_req(buf, msgs->addr,
543*4882a593Smuzhiyun 						     msgs->buf, msgs->len);
544*4882a593Smuzhiyun 		}
545*4882a593Smuzhiyun 		if (count < 0)
546*4882a593Smuzhiyun 			return count;
547*4882a593Smuzhiyun 	} else if (dev->hwversion > 1 &&  /* no repeated start in rev 1 */
548*4882a593Smuzhiyun 		   num == 2 &&
549*4882a593Smuzhiyun 		   msgs[0].addr == msgs[1].addr &&
550*4882a593Smuzhiyun 		   !(msgs[0].flags & I2C_M_RD) && (msgs[1].flags & I2C_M_RD)) {
551*4882a593Smuzhiyun 		hid_dbg(hdev, "I2C write-read %#04x wlen %d rlen %d\n",
552*4882a593Smuzhiyun 			msgs[0].addr, msgs[0].len, msgs[1].len);
553*4882a593Smuzhiyun 		read_length = msgs[1].len;
554*4882a593Smuzhiyun 		read_buf = msgs[1].buf;
555*4882a593Smuzhiyun 		count = cp2112_i2c_write_read_req(buf, msgs[0].addr,
556*4882a593Smuzhiyun 				msgs[0].buf, msgs[0].len, msgs[1].len);
557*4882a593Smuzhiyun 		if (count < 0)
558*4882a593Smuzhiyun 			return count;
559*4882a593Smuzhiyun 	} else {
560*4882a593Smuzhiyun 		hid_err(hdev,
561*4882a593Smuzhiyun 			"Multi-message I2C transactions not supported\n");
562*4882a593Smuzhiyun 		return -EOPNOTSUPP;
563*4882a593Smuzhiyun 	}
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	ret = hid_hw_power(hdev, PM_HINT_FULLON);
566*4882a593Smuzhiyun 	if (ret < 0) {
567*4882a593Smuzhiyun 		hid_err(hdev, "power management error: %d\n", ret);
568*4882a593Smuzhiyun 		return ret;
569*4882a593Smuzhiyun 	}
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 	ret = cp2112_hid_output(hdev, buf, count, HID_OUTPUT_REPORT);
572*4882a593Smuzhiyun 	if (ret < 0) {
573*4882a593Smuzhiyun 		hid_warn(hdev, "Error starting transaction: %d\n", ret);
574*4882a593Smuzhiyun 		goto power_normal;
575*4882a593Smuzhiyun 	}
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 	for (retries = 0; retries < XFER_STATUS_RETRIES; ++retries) {
578*4882a593Smuzhiyun 		ret = cp2112_xfer_status(dev);
579*4882a593Smuzhiyun 		if (-EBUSY == ret)
580*4882a593Smuzhiyun 			continue;
581*4882a593Smuzhiyun 		if (ret < 0)
582*4882a593Smuzhiyun 			goto power_normal;
583*4882a593Smuzhiyun 		break;
584*4882a593Smuzhiyun 	}
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	if (XFER_STATUS_RETRIES <= retries) {
587*4882a593Smuzhiyun 		hid_warn(hdev, "Transfer timed out, cancelling.\n");
588*4882a593Smuzhiyun 		buf[0] = CP2112_CANCEL_TRANSFER;
589*4882a593Smuzhiyun 		buf[1] = 0x01;
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 		ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
592*4882a593Smuzhiyun 		if (ret < 0)
593*4882a593Smuzhiyun 			hid_warn(hdev, "Error cancelling transaction: %d\n",
594*4882a593Smuzhiyun 				 ret);
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 		ret = -ETIMEDOUT;
597*4882a593Smuzhiyun 		goto power_normal;
598*4882a593Smuzhiyun 	}
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 	for (count = 0; count < read_length;) {
601*4882a593Smuzhiyun 		ret = cp2112_read(dev, read_buf + count, read_length - count);
602*4882a593Smuzhiyun 		if (ret < 0)
603*4882a593Smuzhiyun 			goto power_normal;
604*4882a593Smuzhiyun 		if (ret == 0) {
605*4882a593Smuzhiyun 			hid_err(hdev, "read returned 0\n");
606*4882a593Smuzhiyun 			ret = -EIO;
607*4882a593Smuzhiyun 			goto power_normal;
608*4882a593Smuzhiyun 		}
609*4882a593Smuzhiyun 		count += ret;
610*4882a593Smuzhiyun 		if (count > read_length) {
611*4882a593Smuzhiyun 			/*
612*4882a593Smuzhiyun 			 * The hardware returned too much data.
613*4882a593Smuzhiyun 			 * This is mostly harmless because cp2112_read()
614*4882a593Smuzhiyun 			 * has a limit check so didn't overrun our
615*4882a593Smuzhiyun 			 * buffer.  Nevertheless, we return an error
616*4882a593Smuzhiyun 			 * because something is seriously wrong and
617*4882a593Smuzhiyun 			 * it shouldn't go unnoticed.
618*4882a593Smuzhiyun 			 */
619*4882a593Smuzhiyun 			hid_err(hdev, "long read: %d > %zd\n",
620*4882a593Smuzhiyun 				ret, read_length - count + ret);
621*4882a593Smuzhiyun 			ret = -EIO;
622*4882a593Smuzhiyun 			goto power_normal;
623*4882a593Smuzhiyun 		}
624*4882a593Smuzhiyun 	}
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 	/* return the number of transferred messages */
627*4882a593Smuzhiyun 	ret = num;
628*4882a593Smuzhiyun 
629*4882a593Smuzhiyun power_normal:
630*4882a593Smuzhiyun 	hid_hw_power(hdev, PM_HINT_NORMAL);
631*4882a593Smuzhiyun 	hid_dbg(hdev, "I2C transfer finished: %d\n", ret);
632*4882a593Smuzhiyun 	return ret;
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun 
cp2112_xfer(struct i2c_adapter * adap,u16 addr,unsigned short flags,char read_write,u8 command,int size,union i2c_smbus_data * data)635*4882a593Smuzhiyun static int cp2112_xfer(struct i2c_adapter *adap, u16 addr,
636*4882a593Smuzhiyun 		       unsigned short flags, char read_write, u8 command,
637*4882a593Smuzhiyun 		       int size, union i2c_smbus_data *data)
638*4882a593Smuzhiyun {
639*4882a593Smuzhiyun 	struct cp2112_device *dev = (struct cp2112_device *)adap->algo_data;
640*4882a593Smuzhiyun 	struct hid_device *hdev = dev->hdev;
641*4882a593Smuzhiyun 	u8 buf[64];
642*4882a593Smuzhiyun 	__le16 word;
643*4882a593Smuzhiyun 	ssize_t count;
644*4882a593Smuzhiyun 	size_t read_length = 0;
645*4882a593Smuzhiyun 	unsigned int retries;
646*4882a593Smuzhiyun 	int ret;
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	hid_dbg(hdev, "%s addr 0x%x flags 0x%x cmd 0x%x size %d\n",
649*4882a593Smuzhiyun 		read_write == I2C_SMBUS_WRITE ? "write" : "read",
650*4882a593Smuzhiyun 		addr, flags, command, size);
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun 	switch (size) {
653*4882a593Smuzhiyun 	case I2C_SMBUS_BYTE:
654*4882a593Smuzhiyun 		read_length = 1;
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 		if (I2C_SMBUS_READ == read_write)
657*4882a593Smuzhiyun 			count = cp2112_read_req(buf, addr, read_length);
658*4882a593Smuzhiyun 		else
659*4882a593Smuzhiyun 			count = cp2112_write_req(buf, addr, command, NULL,
660*4882a593Smuzhiyun 						 0);
661*4882a593Smuzhiyun 		break;
662*4882a593Smuzhiyun 	case I2C_SMBUS_BYTE_DATA:
663*4882a593Smuzhiyun 		read_length = 1;
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 		if (I2C_SMBUS_READ == read_write)
666*4882a593Smuzhiyun 			count = cp2112_write_read_req(buf, addr, read_length,
667*4882a593Smuzhiyun 						      command, NULL, 0);
668*4882a593Smuzhiyun 		else
669*4882a593Smuzhiyun 			count = cp2112_write_req(buf, addr, command,
670*4882a593Smuzhiyun 						 &data->byte, 1);
671*4882a593Smuzhiyun 		break;
672*4882a593Smuzhiyun 	case I2C_SMBUS_WORD_DATA:
673*4882a593Smuzhiyun 		read_length = 2;
674*4882a593Smuzhiyun 		word = cpu_to_le16(data->word);
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun 		if (I2C_SMBUS_READ == read_write)
677*4882a593Smuzhiyun 			count = cp2112_write_read_req(buf, addr, read_length,
678*4882a593Smuzhiyun 						      command, NULL, 0);
679*4882a593Smuzhiyun 		else
680*4882a593Smuzhiyun 			count = cp2112_write_req(buf, addr, command,
681*4882a593Smuzhiyun 						 (u8 *)&word, 2);
682*4882a593Smuzhiyun 		break;
683*4882a593Smuzhiyun 	case I2C_SMBUS_PROC_CALL:
684*4882a593Smuzhiyun 		size = I2C_SMBUS_WORD_DATA;
685*4882a593Smuzhiyun 		read_write = I2C_SMBUS_READ;
686*4882a593Smuzhiyun 		read_length = 2;
687*4882a593Smuzhiyun 		word = cpu_to_le16(data->word);
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun 		count = cp2112_write_read_req(buf, addr, read_length, command,
690*4882a593Smuzhiyun 					      (u8 *)&word, 2);
691*4882a593Smuzhiyun 		break;
692*4882a593Smuzhiyun 	case I2C_SMBUS_I2C_BLOCK_DATA:
693*4882a593Smuzhiyun 		if (read_write == I2C_SMBUS_READ) {
694*4882a593Smuzhiyun 			read_length = data->block[0];
695*4882a593Smuzhiyun 			count = cp2112_write_read_req(buf, addr, read_length,
696*4882a593Smuzhiyun 						      command, NULL, 0);
697*4882a593Smuzhiyun 		} else {
698*4882a593Smuzhiyun 			count = cp2112_write_req(buf, addr, command,
699*4882a593Smuzhiyun 						 data->block + 1,
700*4882a593Smuzhiyun 						 data->block[0]);
701*4882a593Smuzhiyun 		}
702*4882a593Smuzhiyun 		break;
703*4882a593Smuzhiyun 	case I2C_SMBUS_BLOCK_DATA:
704*4882a593Smuzhiyun 		if (I2C_SMBUS_READ == read_write) {
705*4882a593Smuzhiyun 			count = cp2112_write_read_req(buf, addr,
706*4882a593Smuzhiyun 						      I2C_SMBUS_BLOCK_MAX,
707*4882a593Smuzhiyun 						      command, NULL, 0);
708*4882a593Smuzhiyun 		} else {
709*4882a593Smuzhiyun 			count = cp2112_write_req(buf, addr, command,
710*4882a593Smuzhiyun 						 data->block,
711*4882a593Smuzhiyun 						 data->block[0] + 1);
712*4882a593Smuzhiyun 		}
713*4882a593Smuzhiyun 		break;
714*4882a593Smuzhiyun 	case I2C_SMBUS_BLOCK_PROC_CALL:
715*4882a593Smuzhiyun 		size = I2C_SMBUS_BLOCK_DATA;
716*4882a593Smuzhiyun 		read_write = I2C_SMBUS_READ;
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 		count = cp2112_write_read_req(buf, addr, I2C_SMBUS_BLOCK_MAX,
719*4882a593Smuzhiyun 					      command, data->block,
720*4882a593Smuzhiyun 					      data->block[0] + 1);
721*4882a593Smuzhiyun 		break;
722*4882a593Smuzhiyun 	default:
723*4882a593Smuzhiyun 		hid_warn(hdev, "Unsupported transaction %d\n", size);
724*4882a593Smuzhiyun 		return -EOPNOTSUPP;
725*4882a593Smuzhiyun 	}
726*4882a593Smuzhiyun 
727*4882a593Smuzhiyun 	if (count < 0)
728*4882a593Smuzhiyun 		return count;
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun 	ret = hid_hw_power(hdev, PM_HINT_FULLON);
731*4882a593Smuzhiyun 	if (ret < 0) {
732*4882a593Smuzhiyun 		hid_err(hdev, "power management error: %d\n", ret);
733*4882a593Smuzhiyun 		return ret;
734*4882a593Smuzhiyun 	}
735*4882a593Smuzhiyun 
736*4882a593Smuzhiyun 	ret = cp2112_hid_output(hdev, buf, count, HID_OUTPUT_REPORT);
737*4882a593Smuzhiyun 	if (ret < 0) {
738*4882a593Smuzhiyun 		hid_warn(hdev, "Error starting transaction: %d\n", ret);
739*4882a593Smuzhiyun 		goto power_normal;
740*4882a593Smuzhiyun 	}
741*4882a593Smuzhiyun 
742*4882a593Smuzhiyun 	for (retries = 0; retries < XFER_STATUS_RETRIES; ++retries) {
743*4882a593Smuzhiyun 		ret = cp2112_xfer_status(dev);
744*4882a593Smuzhiyun 		if (-EBUSY == ret)
745*4882a593Smuzhiyun 			continue;
746*4882a593Smuzhiyun 		if (ret < 0)
747*4882a593Smuzhiyun 			goto power_normal;
748*4882a593Smuzhiyun 		break;
749*4882a593Smuzhiyun 	}
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun 	if (XFER_STATUS_RETRIES <= retries) {
752*4882a593Smuzhiyun 		hid_warn(hdev, "Transfer timed out, cancelling.\n");
753*4882a593Smuzhiyun 		buf[0] = CP2112_CANCEL_TRANSFER;
754*4882a593Smuzhiyun 		buf[1] = 0x01;
755*4882a593Smuzhiyun 
756*4882a593Smuzhiyun 		ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
757*4882a593Smuzhiyun 		if (ret < 0)
758*4882a593Smuzhiyun 			hid_warn(hdev, "Error cancelling transaction: %d\n",
759*4882a593Smuzhiyun 				 ret);
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 		ret = -ETIMEDOUT;
762*4882a593Smuzhiyun 		goto power_normal;
763*4882a593Smuzhiyun 	}
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun 	if (I2C_SMBUS_WRITE == read_write) {
766*4882a593Smuzhiyun 		ret = 0;
767*4882a593Smuzhiyun 		goto power_normal;
768*4882a593Smuzhiyun 	}
769*4882a593Smuzhiyun 
770*4882a593Smuzhiyun 	if (I2C_SMBUS_BLOCK_DATA == size)
771*4882a593Smuzhiyun 		read_length = ret;
772*4882a593Smuzhiyun 
773*4882a593Smuzhiyun 	ret = cp2112_read(dev, buf, read_length);
774*4882a593Smuzhiyun 	if (ret < 0)
775*4882a593Smuzhiyun 		goto power_normal;
776*4882a593Smuzhiyun 	if (ret != read_length) {
777*4882a593Smuzhiyun 		hid_warn(hdev, "short read: %d < %zd\n", ret, read_length);
778*4882a593Smuzhiyun 		ret = -EIO;
779*4882a593Smuzhiyun 		goto power_normal;
780*4882a593Smuzhiyun 	}
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun 	switch (size) {
783*4882a593Smuzhiyun 	case I2C_SMBUS_BYTE:
784*4882a593Smuzhiyun 	case I2C_SMBUS_BYTE_DATA:
785*4882a593Smuzhiyun 		data->byte = buf[0];
786*4882a593Smuzhiyun 		break;
787*4882a593Smuzhiyun 	case I2C_SMBUS_WORD_DATA:
788*4882a593Smuzhiyun 		data->word = le16_to_cpup((__le16 *)buf);
789*4882a593Smuzhiyun 		break;
790*4882a593Smuzhiyun 	case I2C_SMBUS_I2C_BLOCK_DATA:
791*4882a593Smuzhiyun 		if (read_length > I2C_SMBUS_BLOCK_MAX) {
792*4882a593Smuzhiyun 			ret = -EINVAL;
793*4882a593Smuzhiyun 			goto power_normal;
794*4882a593Smuzhiyun 		}
795*4882a593Smuzhiyun 
796*4882a593Smuzhiyun 		memcpy(data->block + 1, buf, read_length);
797*4882a593Smuzhiyun 		break;
798*4882a593Smuzhiyun 	case I2C_SMBUS_BLOCK_DATA:
799*4882a593Smuzhiyun 		if (read_length > I2C_SMBUS_BLOCK_MAX) {
800*4882a593Smuzhiyun 			ret = -EPROTO;
801*4882a593Smuzhiyun 			goto power_normal;
802*4882a593Smuzhiyun 		}
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun 		memcpy(data->block, buf, read_length);
805*4882a593Smuzhiyun 		break;
806*4882a593Smuzhiyun 	}
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun 	ret = 0;
809*4882a593Smuzhiyun power_normal:
810*4882a593Smuzhiyun 	hid_hw_power(hdev, PM_HINT_NORMAL);
811*4882a593Smuzhiyun 	hid_dbg(hdev, "transfer finished: %d\n", ret);
812*4882a593Smuzhiyun 	return ret;
813*4882a593Smuzhiyun }
814*4882a593Smuzhiyun 
cp2112_functionality(struct i2c_adapter * adap)815*4882a593Smuzhiyun static u32 cp2112_functionality(struct i2c_adapter *adap)
816*4882a593Smuzhiyun {
817*4882a593Smuzhiyun 	return I2C_FUNC_I2C |
818*4882a593Smuzhiyun 		I2C_FUNC_SMBUS_BYTE |
819*4882a593Smuzhiyun 		I2C_FUNC_SMBUS_BYTE_DATA |
820*4882a593Smuzhiyun 		I2C_FUNC_SMBUS_WORD_DATA |
821*4882a593Smuzhiyun 		I2C_FUNC_SMBUS_BLOCK_DATA |
822*4882a593Smuzhiyun 		I2C_FUNC_SMBUS_I2C_BLOCK |
823*4882a593Smuzhiyun 		I2C_FUNC_SMBUS_PROC_CALL |
824*4882a593Smuzhiyun 		I2C_FUNC_SMBUS_BLOCK_PROC_CALL;
825*4882a593Smuzhiyun }
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun static const struct i2c_algorithm smbus_algorithm = {
828*4882a593Smuzhiyun 	.master_xfer	= cp2112_i2c_xfer,
829*4882a593Smuzhiyun 	.smbus_xfer	= cp2112_xfer,
830*4882a593Smuzhiyun 	.functionality	= cp2112_functionality,
831*4882a593Smuzhiyun };
832*4882a593Smuzhiyun 
cp2112_get_usb_config(struct hid_device * hdev,struct cp2112_usb_config_report * cfg)833*4882a593Smuzhiyun static int cp2112_get_usb_config(struct hid_device *hdev,
834*4882a593Smuzhiyun 				 struct cp2112_usb_config_report *cfg)
835*4882a593Smuzhiyun {
836*4882a593Smuzhiyun 	int ret;
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun 	ret = cp2112_hid_get(hdev, CP2112_USB_CONFIG, (u8 *)cfg, sizeof(*cfg),
839*4882a593Smuzhiyun 			     HID_FEATURE_REPORT);
840*4882a593Smuzhiyun 	if (ret != sizeof(*cfg)) {
841*4882a593Smuzhiyun 		hid_err(hdev, "error reading usb config: %d\n", ret);
842*4882a593Smuzhiyun 		if (ret < 0)
843*4882a593Smuzhiyun 			return ret;
844*4882a593Smuzhiyun 		return -EIO;
845*4882a593Smuzhiyun 	}
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun 	return 0;
848*4882a593Smuzhiyun }
849*4882a593Smuzhiyun 
cp2112_set_usb_config(struct hid_device * hdev,struct cp2112_usb_config_report * cfg)850*4882a593Smuzhiyun static int cp2112_set_usb_config(struct hid_device *hdev,
851*4882a593Smuzhiyun 				 struct cp2112_usb_config_report *cfg)
852*4882a593Smuzhiyun {
853*4882a593Smuzhiyun 	int ret;
854*4882a593Smuzhiyun 
855*4882a593Smuzhiyun 	BUG_ON(cfg->report != CP2112_USB_CONFIG);
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun 	ret = cp2112_hid_output(hdev, (u8 *)cfg, sizeof(*cfg),
858*4882a593Smuzhiyun 				HID_FEATURE_REPORT);
859*4882a593Smuzhiyun 	if (ret != sizeof(*cfg)) {
860*4882a593Smuzhiyun 		hid_err(hdev, "error writing usb config: %d\n", ret);
861*4882a593Smuzhiyun 		if (ret < 0)
862*4882a593Smuzhiyun 			return ret;
863*4882a593Smuzhiyun 		return -EIO;
864*4882a593Smuzhiyun 	}
865*4882a593Smuzhiyun 
866*4882a593Smuzhiyun 	return 0;
867*4882a593Smuzhiyun }
868*4882a593Smuzhiyun 
869*4882a593Smuzhiyun static void chmod_sysfs_attrs(struct hid_device *hdev);
870*4882a593Smuzhiyun 
871*4882a593Smuzhiyun #define CP2112_CONFIG_ATTR(name, store, format, ...) \
872*4882a593Smuzhiyun static ssize_t name##_store(struct device *kdev, \
873*4882a593Smuzhiyun 			    struct device_attribute *attr, const char *buf, \
874*4882a593Smuzhiyun 			    size_t count) \
875*4882a593Smuzhiyun { \
876*4882a593Smuzhiyun 	struct hid_device *hdev = to_hid_device(kdev); \
877*4882a593Smuzhiyun 	struct cp2112_usb_config_report cfg; \
878*4882a593Smuzhiyun 	int ret = cp2112_get_usb_config(hdev, &cfg); \
879*4882a593Smuzhiyun 	if (ret) \
880*4882a593Smuzhiyun 		return ret; \
881*4882a593Smuzhiyun 	store; \
882*4882a593Smuzhiyun 	ret = cp2112_set_usb_config(hdev, &cfg); \
883*4882a593Smuzhiyun 	if (ret) \
884*4882a593Smuzhiyun 		return ret; \
885*4882a593Smuzhiyun 	chmod_sysfs_attrs(hdev); \
886*4882a593Smuzhiyun 	return count; \
887*4882a593Smuzhiyun } \
888*4882a593Smuzhiyun static ssize_t name##_show(struct device *kdev, \
889*4882a593Smuzhiyun 			   struct device_attribute *attr, char *buf) \
890*4882a593Smuzhiyun { \
891*4882a593Smuzhiyun 	struct hid_device *hdev = to_hid_device(kdev); \
892*4882a593Smuzhiyun 	struct cp2112_usb_config_report cfg; \
893*4882a593Smuzhiyun 	int ret = cp2112_get_usb_config(hdev, &cfg); \
894*4882a593Smuzhiyun 	if (ret) \
895*4882a593Smuzhiyun 		return ret; \
896*4882a593Smuzhiyun 	return scnprintf(buf, PAGE_SIZE, format, ##__VA_ARGS__); \
897*4882a593Smuzhiyun } \
898*4882a593Smuzhiyun static DEVICE_ATTR_RW(name);
899*4882a593Smuzhiyun 
900*4882a593Smuzhiyun CP2112_CONFIG_ATTR(vendor_id, ({
901*4882a593Smuzhiyun 	u16 vid;
902*4882a593Smuzhiyun 
903*4882a593Smuzhiyun 	if (sscanf(buf, "%hi", &vid) != 1)
904*4882a593Smuzhiyun 		return -EINVAL;
905*4882a593Smuzhiyun 
906*4882a593Smuzhiyun 	cfg.vid = cpu_to_le16(vid);
907*4882a593Smuzhiyun 	cfg.mask = 0x01;
908*4882a593Smuzhiyun }), "0x%04x\n", le16_to_cpu(cfg.vid));
909*4882a593Smuzhiyun 
910*4882a593Smuzhiyun CP2112_CONFIG_ATTR(product_id, ({
911*4882a593Smuzhiyun 	u16 pid;
912*4882a593Smuzhiyun 
913*4882a593Smuzhiyun 	if (sscanf(buf, "%hi", &pid) != 1)
914*4882a593Smuzhiyun 		return -EINVAL;
915*4882a593Smuzhiyun 
916*4882a593Smuzhiyun 	cfg.pid = cpu_to_le16(pid);
917*4882a593Smuzhiyun 	cfg.mask = 0x02;
918*4882a593Smuzhiyun }), "0x%04x\n", le16_to_cpu(cfg.pid));
919*4882a593Smuzhiyun 
920*4882a593Smuzhiyun CP2112_CONFIG_ATTR(max_power, ({
921*4882a593Smuzhiyun 	int mA;
922*4882a593Smuzhiyun 
923*4882a593Smuzhiyun 	if (sscanf(buf, "%i", &mA) != 1)
924*4882a593Smuzhiyun 		return -EINVAL;
925*4882a593Smuzhiyun 
926*4882a593Smuzhiyun 	cfg.max_power = (mA + 1) / 2;
927*4882a593Smuzhiyun 	cfg.mask = 0x04;
928*4882a593Smuzhiyun }), "%u mA\n", cfg.max_power * 2);
929*4882a593Smuzhiyun 
930*4882a593Smuzhiyun CP2112_CONFIG_ATTR(power_mode, ({
931*4882a593Smuzhiyun 	if (sscanf(buf, "%hhi", &cfg.power_mode) != 1)
932*4882a593Smuzhiyun 		return -EINVAL;
933*4882a593Smuzhiyun 
934*4882a593Smuzhiyun 	cfg.mask = 0x08;
935*4882a593Smuzhiyun }), "%u\n", cfg.power_mode);
936*4882a593Smuzhiyun 
937*4882a593Smuzhiyun CP2112_CONFIG_ATTR(release_version, ({
938*4882a593Smuzhiyun 	if (sscanf(buf, "%hhi.%hhi", &cfg.release_major, &cfg.release_minor)
939*4882a593Smuzhiyun 	    != 2)
940*4882a593Smuzhiyun 		return -EINVAL;
941*4882a593Smuzhiyun 
942*4882a593Smuzhiyun 	cfg.mask = 0x10;
943*4882a593Smuzhiyun }), "%u.%u\n", cfg.release_major, cfg.release_minor);
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun #undef CP2112_CONFIG_ATTR
946*4882a593Smuzhiyun 
947*4882a593Smuzhiyun struct cp2112_pstring_attribute {
948*4882a593Smuzhiyun 	struct device_attribute attr;
949*4882a593Smuzhiyun 	unsigned char report;
950*4882a593Smuzhiyun };
951*4882a593Smuzhiyun 
pstr_store(struct device * kdev,struct device_attribute * kattr,const char * buf,size_t count)952*4882a593Smuzhiyun static ssize_t pstr_store(struct device *kdev,
953*4882a593Smuzhiyun 			  struct device_attribute *kattr, const char *buf,
954*4882a593Smuzhiyun 			  size_t count)
955*4882a593Smuzhiyun {
956*4882a593Smuzhiyun 	struct hid_device *hdev = to_hid_device(kdev);
957*4882a593Smuzhiyun 	struct cp2112_pstring_attribute *attr =
958*4882a593Smuzhiyun 		container_of(kattr, struct cp2112_pstring_attribute, attr);
959*4882a593Smuzhiyun 	struct cp2112_string_report report;
960*4882a593Smuzhiyun 	int ret;
961*4882a593Smuzhiyun 
962*4882a593Smuzhiyun 	memset(&report, 0, sizeof(report));
963*4882a593Smuzhiyun 
964*4882a593Smuzhiyun 	ret = utf8s_to_utf16s(buf, count, UTF16_LITTLE_ENDIAN,
965*4882a593Smuzhiyun 			      report.string, ARRAY_SIZE(report.string));
966*4882a593Smuzhiyun 	report.report = attr->report;
967*4882a593Smuzhiyun 	report.length = ret * sizeof(report.string[0]) + 2;
968*4882a593Smuzhiyun 	report.type = USB_DT_STRING;
969*4882a593Smuzhiyun 
970*4882a593Smuzhiyun 	ret = cp2112_hid_output(hdev, &report.report, report.length + 1,
971*4882a593Smuzhiyun 				HID_FEATURE_REPORT);
972*4882a593Smuzhiyun 	if (ret != report.length + 1) {
973*4882a593Smuzhiyun 		hid_err(hdev, "error writing %s string: %d\n", kattr->attr.name,
974*4882a593Smuzhiyun 			ret);
975*4882a593Smuzhiyun 		if (ret < 0)
976*4882a593Smuzhiyun 			return ret;
977*4882a593Smuzhiyun 		return -EIO;
978*4882a593Smuzhiyun 	}
979*4882a593Smuzhiyun 
980*4882a593Smuzhiyun 	chmod_sysfs_attrs(hdev);
981*4882a593Smuzhiyun 	return count;
982*4882a593Smuzhiyun }
983*4882a593Smuzhiyun 
pstr_show(struct device * kdev,struct device_attribute * kattr,char * buf)984*4882a593Smuzhiyun static ssize_t pstr_show(struct device *kdev,
985*4882a593Smuzhiyun 			 struct device_attribute *kattr, char *buf)
986*4882a593Smuzhiyun {
987*4882a593Smuzhiyun 	struct hid_device *hdev = to_hid_device(kdev);
988*4882a593Smuzhiyun 	struct cp2112_pstring_attribute *attr =
989*4882a593Smuzhiyun 		container_of(kattr, struct cp2112_pstring_attribute, attr);
990*4882a593Smuzhiyun 	struct cp2112_string_report report;
991*4882a593Smuzhiyun 	u8 length;
992*4882a593Smuzhiyun 	int ret;
993*4882a593Smuzhiyun 
994*4882a593Smuzhiyun 	ret = cp2112_hid_get(hdev, attr->report, &report.report,
995*4882a593Smuzhiyun 			     sizeof(report) - 1, HID_FEATURE_REPORT);
996*4882a593Smuzhiyun 	if (ret < 3) {
997*4882a593Smuzhiyun 		hid_err(hdev, "error reading %s string: %d\n", kattr->attr.name,
998*4882a593Smuzhiyun 			ret);
999*4882a593Smuzhiyun 		if (ret < 0)
1000*4882a593Smuzhiyun 			return ret;
1001*4882a593Smuzhiyun 		return -EIO;
1002*4882a593Smuzhiyun 	}
1003*4882a593Smuzhiyun 
1004*4882a593Smuzhiyun 	if (report.length < 2) {
1005*4882a593Smuzhiyun 		hid_err(hdev, "invalid %s string length: %d\n",
1006*4882a593Smuzhiyun 			kattr->attr.name, report.length);
1007*4882a593Smuzhiyun 		return -EIO;
1008*4882a593Smuzhiyun 	}
1009*4882a593Smuzhiyun 
1010*4882a593Smuzhiyun 	length = report.length > ret - 1 ? ret - 1 : report.length;
1011*4882a593Smuzhiyun 	length = (length - 2) / sizeof(report.string[0]);
1012*4882a593Smuzhiyun 	ret = utf16s_to_utf8s(report.string, length, UTF16_LITTLE_ENDIAN, buf,
1013*4882a593Smuzhiyun 			      PAGE_SIZE - 1);
1014*4882a593Smuzhiyun 	buf[ret++] = '\n';
1015*4882a593Smuzhiyun 	return ret;
1016*4882a593Smuzhiyun }
1017*4882a593Smuzhiyun 
1018*4882a593Smuzhiyun #define CP2112_PSTR_ATTR(name, _report) \
1019*4882a593Smuzhiyun static struct cp2112_pstring_attribute dev_attr_##name = { \
1020*4882a593Smuzhiyun 	.attr = __ATTR(name, (S_IWUSR | S_IRUGO), pstr_show, pstr_store), \
1021*4882a593Smuzhiyun 	.report = _report, \
1022*4882a593Smuzhiyun };
1023*4882a593Smuzhiyun 
1024*4882a593Smuzhiyun CP2112_PSTR_ATTR(manufacturer,	CP2112_MANUFACTURER_STRING);
1025*4882a593Smuzhiyun CP2112_PSTR_ATTR(product,	CP2112_PRODUCT_STRING);
1026*4882a593Smuzhiyun CP2112_PSTR_ATTR(serial,	CP2112_SERIAL_STRING);
1027*4882a593Smuzhiyun 
1028*4882a593Smuzhiyun #undef CP2112_PSTR_ATTR
1029*4882a593Smuzhiyun 
1030*4882a593Smuzhiyun static const struct attribute_group cp2112_attr_group = {
1031*4882a593Smuzhiyun 	.attrs = (struct attribute *[]){
1032*4882a593Smuzhiyun 		&dev_attr_vendor_id.attr,
1033*4882a593Smuzhiyun 		&dev_attr_product_id.attr,
1034*4882a593Smuzhiyun 		&dev_attr_max_power.attr,
1035*4882a593Smuzhiyun 		&dev_attr_power_mode.attr,
1036*4882a593Smuzhiyun 		&dev_attr_release_version.attr,
1037*4882a593Smuzhiyun 		&dev_attr_manufacturer.attr.attr,
1038*4882a593Smuzhiyun 		&dev_attr_product.attr.attr,
1039*4882a593Smuzhiyun 		&dev_attr_serial.attr.attr,
1040*4882a593Smuzhiyun 		NULL
1041*4882a593Smuzhiyun 	}
1042*4882a593Smuzhiyun };
1043*4882a593Smuzhiyun 
1044*4882a593Smuzhiyun /* Chmoding our sysfs attributes is simply a way to expose which fields in the
1045*4882a593Smuzhiyun  * PROM have already been programmed. We do not depend on this preventing
1046*4882a593Smuzhiyun  * writing to these attributes since the CP2112 will simply ignore writes to
1047*4882a593Smuzhiyun  * already-programmed fields. This is why there is no sense in fixing this
1048*4882a593Smuzhiyun  * racy behaviour.
1049*4882a593Smuzhiyun  */
chmod_sysfs_attrs(struct hid_device * hdev)1050*4882a593Smuzhiyun static void chmod_sysfs_attrs(struct hid_device *hdev)
1051*4882a593Smuzhiyun {
1052*4882a593Smuzhiyun 	struct attribute **attr;
1053*4882a593Smuzhiyun 	u8 buf[2];
1054*4882a593Smuzhiyun 	int ret;
1055*4882a593Smuzhiyun 
1056*4882a593Smuzhiyun 	ret = cp2112_hid_get(hdev, CP2112_LOCK_BYTE, buf, sizeof(buf),
1057*4882a593Smuzhiyun 			     HID_FEATURE_REPORT);
1058*4882a593Smuzhiyun 	if (ret != sizeof(buf)) {
1059*4882a593Smuzhiyun 		hid_err(hdev, "error reading lock byte: %d\n", ret);
1060*4882a593Smuzhiyun 		return;
1061*4882a593Smuzhiyun 	}
1062*4882a593Smuzhiyun 
1063*4882a593Smuzhiyun 	for (attr = cp2112_attr_group.attrs; *attr; ++attr) {
1064*4882a593Smuzhiyun 		umode_t mode = (buf[1] & 1) ? S_IWUSR | S_IRUGO : S_IRUGO;
1065*4882a593Smuzhiyun 		ret = sysfs_chmod_file(&hdev->dev.kobj, *attr, mode);
1066*4882a593Smuzhiyun 		if (ret < 0)
1067*4882a593Smuzhiyun 			hid_err(hdev, "error chmoding sysfs file %s\n",
1068*4882a593Smuzhiyun 				(*attr)->name);
1069*4882a593Smuzhiyun 		buf[1] >>= 1;
1070*4882a593Smuzhiyun 	}
1071*4882a593Smuzhiyun }
1072*4882a593Smuzhiyun 
cp2112_gpio_irq_ack(struct irq_data * d)1073*4882a593Smuzhiyun static void cp2112_gpio_irq_ack(struct irq_data *d)
1074*4882a593Smuzhiyun {
1075*4882a593Smuzhiyun }
1076*4882a593Smuzhiyun 
cp2112_gpio_irq_mask(struct irq_data * d)1077*4882a593Smuzhiyun static void cp2112_gpio_irq_mask(struct irq_data *d)
1078*4882a593Smuzhiyun {
1079*4882a593Smuzhiyun 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1080*4882a593Smuzhiyun 	struct cp2112_device *dev = gpiochip_get_data(gc);
1081*4882a593Smuzhiyun 
1082*4882a593Smuzhiyun 	__clear_bit(d->hwirq, &dev->irq_mask);
1083*4882a593Smuzhiyun }
1084*4882a593Smuzhiyun 
cp2112_gpio_irq_unmask(struct irq_data * d)1085*4882a593Smuzhiyun static void cp2112_gpio_irq_unmask(struct irq_data *d)
1086*4882a593Smuzhiyun {
1087*4882a593Smuzhiyun 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1088*4882a593Smuzhiyun 	struct cp2112_device *dev = gpiochip_get_data(gc);
1089*4882a593Smuzhiyun 
1090*4882a593Smuzhiyun 	__set_bit(d->hwirq, &dev->irq_mask);
1091*4882a593Smuzhiyun }
1092*4882a593Smuzhiyun 
cp2112_gpio_poll_callback(struct work_struct * work)1093*4882a593Smuzhiyun static void cp2112_gpio_poll_callback(struct work_struct *work)
1094*4882a593Smuzhiyun {
1095*4882a593Smuzhiyun 	struct cp2112_device *dev = container_of(work, struct cp2112_device,
1096*4882a593Smuzhiyun 						 gpio_poll_worker.work);
1097*4882a593Smuzhiyun 	struct irq_data *d;
1098*4882a593Smuzhiyun 	u8 gpio_mask;
1099*4882a593Smuzhiyun 	u8 virqs = (u8)dev->irq_mask;
1100*4882a593Smuzhiyun 	u32 irq_type;
1101*4882a593Smuzhiyun 	int irq, virq, ret;
1102*4882a593Smuzhiyun 
1103*4882a593Smuzhiyun 	ret = cp2112_gpio_get_all(&dev->gc);
1104*4882a593Smuzhiyun 	if (ret == -ENODEV) /* the hardware has been disconnected */
1105*4882a593Smuzhiyun 		return;
1106*4882a593Smuzhiyun 	if (ret < 0)
1107*4882a593Smuzhiyun 		goto exit;
1108*4882a593Smuzhiyun 
1109*4882a593Smuzhiyun 	gpio_mask = ret;
1110*4882a593Smuzhiyun 
1111*4882a593Smuzhiyun 	while (virqs) {
1112*4882a593Smuzhiyun 		virq = ffs(virqs) - 1;
1113*4882a593Smuzhiyun 		virqs &= ~BIT(virq);
1114*4882a593Smuzhiyun 
1115*4882a593Smuzhiyun 		if (!dev->gc.to_irq)
1116*4882a593Smuzhiyun 			break;
1117*4882a593Smuzhiyun 
1118*4882a593Smuzhiyun 		irq = dev->gc.to_irq(&dev->gc, virq);
1119*4882a593Smuzhiyun 
1120*4882a593Smuzhiyun 		d = irq_get_irq_data(irq);
1121*4882a593Smuzhiyun 		if (!d)
1122*4882a593Smuzhiyun 			continue;
1123*4882a593Smuzhiyun 
1124*4882a593Smuzhiyun 		irq_type = irqd_get_trigger_type(d);
1125*4882a593Smuzhiyun 
1126*4882a593Smuzhiyun 		if (gpio_mask & BIT(virq)) {
1127*4882a593Smuzhiyun 			/* Level High */
1128*4882a593Smuzhiyun 
1129*4882a593Smuzhiyun 			if (irq_type & IRQ_TYPE_LEVEL_HIGH)
1130*4882a593Smuzhiyun 				handle_nested_irq(irq);
1131*4882a593Smuzhiyun 
1132*4882a593Smuzhiyun 			if ((irq_type & IRQ_TYPE_EDGE_RISING) &&
1133*4882a593Smuzhiyun 			    !(dev->gpio_prev_state & BIT(virq)))
1134*4882a593Smuzhiyun 				handle_nested_irq(irq);
1135*4882a593Smuzhiyun 		} else {
1136*4882a593Smuzhiyun 			/* Level Low */
1137*4882a593Smuzhiyun 
1138*4882a593Smuzhiyun 			if (irq_type & IRQ_TYPE_LEVEL_LOW)
1139*4882a593Smuzhiyun 				handle_nested_irq(irq);
1140*4882a593Smuzhiyun 
1141*4882a593Smuzhiyun 			if ((irq_type & IRQ_TYPE_EDGE_FALLING) &&
1142*4882a593Smuzhiyun 			    (dev->gpio_prev_state & BIT(virq)))
1143*4882a593Smuzhiyun 				handle_nested_irq(irq);
1144*4882a593Smuzhiyun 		}
1145*4882a593Smuzhiyun 	}
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun 	dev->gpio_prev_state = gpio_mask;
1148*4882a593Smuzhiyun 
1149*4882a593Smuzhiyun exit:
1150*4882a593Smuzhiyun 	if (dev->gpio_poll)
1151*4882a593Smuzhiyun 		schedule_delayed_work(&dev->gpio_poll_worker, 10);
1152*4882a593Smuzhiyun }
1153*4882a593Smuzhiyun 
1154*4882a593Smuzhiyun 
cp2112_gpio_irq_startup(struct irq_data * d)1155*4882a593Smuzhiyun static unsigned int cp2112_gpio_irq_startup(struct irq_data *d)
1156*4882a593Smuzhiyun {
1157*4882a593Smuzhiyun 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1158*4882a593Smuzhiyun 	struct cp2112_device *dev = gpiochip_get_data(gc);
1159*4882a593Smuzhiyun 
1160*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&dev->gpio_poll_worker, cp2112_gpio_poll_callback);
1161*4882a593Smuzhiyun 
1162*4882a593Smuzhiyun 	if (!dev->gpio_poll) {
1163*4882a593Smuzhiyun 		dev->gpio_poll = true;
1164*4882a593Smuzhiyun 		schedule_delayed_work(&dev->gpio_poll_worker, 0);
1165*4882a593Smuzhiyun 	}
1166*4882a593Smuzhiyun 
1167*4882a593Smuzhiyun 	cp2112_gpio_irq_unmask(d);
1168*4882a593Smuzhiyun 	return 0;
1169*4882a593Smuzhiyun }
1170*4882a593Smuzhiyun 
cp2112_gpio_irq_shutdown(struct irq_data * d)1171*4882a593Smuzhiyun static void cp2112_gpio_irq_shutdown(struct irq_data *d)
1172*4882a593Smuzhiyun {
1173*4882a593Smuzhiyun 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1174*4882a593Smuzhiyun 	struct cp2112_device *dev = gpiochip_get_data(gc);
1175*4882a593Smuzhiyun 
1176*4882a593Smuzhiyun 	cancel_delayed_work_sync(&dev->gpio_poll_worker);
1177*4882a593Smuzhiyun }
1178*4882a593Smuzhiyun 
cp2112_gpio_irq_type(struct irq_data * d,unsigned int type)1179*4882a593Smuzhiyun static int cp2112_gpio_irq_type(struct irq_data *d, unsigned int type)
1180*4882a593Smuzhiyun {
1181*4882a593Smuzhiyun 	return 0;
1182*4882a593Smuzhiyun }
1183*4882a593Smuzhiyun 
cp2112_allocate_irq(struct cp2112_device * dev,int pin)1184*4882a593Smuzhiyun static int __maybe_unused cp2112_allocate_irq(struct cp2112_device *dev,
1185*4882a593Smuzhiyun 					      int pin)
1186*4882a593Smuzhiyun {
1187*4882a593Smuzhiyun 	int ret;
1188*4882a593Smuzhiyun 
1189*4882a593Smuzhiyun 	if (dev->desc[pin])
1190*4882a593Smuzhiyun 		return -EINVAL;
1191*4882a593Smuzhiyun 
1192*4882a593Smuzhiyun 	dev->desc[pin] = gpiochip_request_own_desc(&dev->gc, pin,
1193*4882a593Smuzhiyun 						   "HID/I2C:Event",
1194*4882a593Smuzhiyun 						   GPIO_ACTIVE_HIGH,
1195*4882a593Smuzhiyun 						   GPIOD_IN);
1196*4882a593Smuzhiyun 	if (IS_ERR(dev->desc[pin])) {
1197*4882a593Smuzhiyun 		dev_err(dev->gc.parent, "Failed to request GPIO\n");
1198*4882a593Smuzhiyun 		return PTR_ERR(dev->desc[pin]);
1199*4882a593Smuzhiyun 	}
1200*4882a593Smuzhiyun 
1201*4882a593Smuzhiyun 	ret = cp2112_gpio_direction_input(&dev->gc, pin);
1202*4882a593Smuzhiyun 	if (ret < 0) {
1203*4882a593Smuzhiyun 		dev_err(dev->gc.parent, "Failed to set GPIO to input dir\n");
1204*4882a593Smuzhiyun 		goto err_desc;
1205*4882a593Smuzhiyun 	}
1206*4882a593Smuzhiyun 
1207*4882a593Smuzhiyun 	ret = gpiochip_lock_as_irq(&dev->gc, pin);
1208*4882a593Smuzhiyun 	if (ret) {
1209*4882a593Smuzhiyun 		dev_err(dev->gc.parent, "Failed to lock GPIO as interrupt\n");
1210*4882a593Smuzhiyun 		goto err_desc;
1211*4882a593Smuzhiyun 	}
1212*4882a593Smuzhiyun 
1213*4882a593Smuzhiyun 	ret = gpiod_to_irq(dev->desc[pin]);
1214*4882a593Smuzhiyun 	if (ret < 0) {
1215*4882a593Smuzhiyun 		dev_err(dev->gc.parent, "Failed to translate GPIO to IRQ\n");
1216*4882a593Smuzhiyun 		goto err_lock;
1217*4882a593Smuzhiyun 	}
1218*4882a593Smuzhiyun 
1219*4882a593Smuzhiyun 	return ret;
1220*4882a593Smuzhiyun 
1221*4882a593Smuzhiyun err_lock:
1222*4882a593Smuzhiyun 	gpiochip_unlock_as_irq(&dev->gc, pin);
1223*4882a593Smuzhiyun err_desc:
1224*4882a593Smuzhiyun 	gpiochip_free_own_desc(dev->desc[pin]);
1225*4882a593Smuzhiyun 	dev->desc[pin] = NULL;
1226*4882a593Smuzhiyun 	return ret;
1227*4882a593Smuzhiyun }
1228*4882a593Smuzhiyun 
cp2112_probe(struct hid_device * hdev,const struct hid_device_id * id)1229*4882a593Smuzhiyun static int cp2112_probe(struct hid_device *hdev, const struct hid_device_id *id)
1230*4882a593Smuzhiyun {
1231*4882a593Smuzhiyun 	struct cp2112_device *dev;
1232*4882a593Smuzhiyun 	u8 buf[3];
1233*4882a593Smuzhiyun 	struct cp2112_smbus_config_report config;
1234*4882a593Smuzhiyun 	struct gpio_irq_chip *girq;
1235*4882a593Smuzhiyun 	int ret;
1236*4882a593Smuzhiyun 
1237*4882a593Smuzhiyun 	dev = devm_kzalloc(&hdev->dev, sizeof(*dev), GFP_KERNEL);
1238*4882a593Smuzhiyun 	if (!dev)
1239*4882a593Smuzhiyun 		return -ENOMEM;
1240*4882a593Smuzhiyun 
1241*4882a593Smuzhiyun 	dev->in_out_buffer = devm_kzalloc(&hdev->dev, CP2112_REPORT_MAX_LENGTH,
1242*4882a593Smuzhiyun 					  GFP_KERNEL);
1243*4882a593Smuzhiyun 	if (!dev->in_out_buffer)
1244*4882a593Smuzhiyun 		return -ENOMEM;
1245*4882a593Smuzhiyun 
1246*4882a593Smuzhiyun 	mutex_init(&dev->lock);
1247*4882a593Smuzhiyun 
1248*4882a593Smuzhiyun 	ret = hid_parse(hdev);
1249*4882a593Smuzhiyun 	if (ret) {
1250*4882a593Smuzhiyun 		hid_err(hdev, "parse failed\n");
1251*4882a593Smuzhiyun 		return ret;
1252*4882a593Smuzhiyun 	}
1253*4882a593Smuzhiyun 
1254*4882a593Smuzhiyun 	ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
1255*4882a593Smuzhiyun 	if (ret) {
1256*4882a593Smuzhiyun 		hid_err(hdev, "hw start failed\n");
1257*4882a593Smuzhiyun 		return ret;
1258*4882a593Smuzhiyun 	}
1259*4882a593Smuzhiyun 
1260*4882a593Smuzhiyun 	ret = hid_hw_open(hdev);
1261*4882a593Smuzhiyun 	if (ret) {
1262*4882a593Smuzhiyun 		hid_err(hdev, "hw open failed\n");
1263*4882a593Smuzhiyun 		goto err_hid_stop;
1264*4882a593Smuzhiyun 	}
1265*4882a593Smuzhiyun 
1266*4882a593Smuzhiyun 	ret = hid_hw_power(hdev, PM_HINT_FULLON);
1267*4882a593Smuzhiyun 	if (ret < 0) {
1268*4882a593Smuzhiyun 		hid_err(hdev, "power management error: %d\n", ret);
1269*4882a593Smuzhiyun 		goto err_hid_close;
1270*4882a593Smuzhiyun 	}
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun 	ret = cp2112_hid_get(hdev, CP2112_GET_VERSION_INFO, buf, sizeof(buf),
1273*4882a593Smuzhiyun 			     HID_FEATURE_REPORT);
1274*4882a593Smuzhiyun 	if (ret != sizeof(buf)) {
1275*4882a593Smuzhiyun 		hid_err(hdev, "error requesting version\n");
1276*4882a593Smuzhiyun 		if (ret >= 0)
1277*4882a593Smuzhiyun 			ret = -EIO;
1278*4882a593Smuzhiyun 		goto err_power_normal;
1279*4882a593Smuzhiyun 	}
1280*4882a593Smuzhiyun 
1281*4882a593Smuzhiyun 	hid_info(hdev, "Part Number: 0x%02X Device Version: 0x%02X\n",
1282*4882a593Smuzhiyun 		 buf[1], buf[2]);
1283*4882a593Smuzhiyun 
1284*4882a593Smuzhiyun 	ret = cp2112_hid_get(hdev, CP2112_SMBUS_CONFIG, (u8 *)&config,
1285*4882a593Smuzhiyun 			     sizeof(config), HID_FEATURE_REPORT);
1286*4882a593Smuzhiyun 	if (ret != sizeof(config)) {
1287*4882a593Smuzhiyun 		hid_err(hdev, "error requesting SMBus config\n");
1288*4882a593Smuzhiyun 		if (ret >= 0)
1289*4882a593Smuzhiyun 			ret = -EIO;
1290*4882a593Smuzhiyun 		goto err_power_normal;
1291*4882a593Smuzhiyun 	}
1292*4882a593Smuzhiyun 
1293*4882a593Smuzhiyun 	config.retry_time = cpu_to_be16(1);
1294*4882a593Smuzhiyun 
1295*4882a593Smuzhiyun 	ret = cp2112_hid_output(hdev, (u8 *)&config, sizeof(config),
1296*4882a593Smuzhiyun 				HID_FEATURE_REPORT);
1297*4882a593Smuzhiyun 	if (ret != sizeof(config)) {
1298*4882a593Smuzhiyun 		hid_err(hdev, "error setting SMBus config\n");
1299*4882a593Smuzhiyun 		if (ret >= 0)
1300*4882a593Smuzhiyun 			ret = -EIO;
1301*4882a593Smuzhiyun 		goto err_power_normal;
1302*4882a593Smuzhiyun 	}
1303*4882a593Smuzhiyun 
1304*4882a593Smuzhiyun 	hid_set_drvdata(hdev, (void *)dev);
1305*4882a593Smuzhiyun 	dev->hdev		= hdev;
1306*4882a593Smuzhiyun 	dev->adap.owner		= THIS_MODULE;
1307*4882a593Smuzhiyun 	dev->adap.class		= I2C_CLASS_HWMON;
1308*4882a593Smuzhiyun 	dev->adap.algo		= &smbus_algorithm;
1309*4882a593Smuzhiyun 	dev->adap.algo_data	= dev;
1310*4882a593Smuzhiyun 	dev->adap.dev.parent	= &hdev->dev;
1311*4882a593Smuzhiyun 	snprintf(dev->adap.name, sizeof(dev->adap.name),
1312*4882a593Smuzhiyun 		 "CP2112 SMBus Bridge on hidraw%d",
1313*4882a593Smuzhiyun 		 ((struct hidraw *)hdev->hidraw)->minor);
1314*4882a593Smuzhiyun 	dev->hwversion = buf[2];
1315*4882a593Smuzhiyun 	init_waitqueue_head(&dev->wait);
1316*4882a593Smuzhiyun 
1317*4882a593Smuzhiyun 	hid_device_io_start(hdev);
1318*4882a593Smuzhiyun 	ret = i2c_add_adapter(&dev->adap);
1319*4882a593Smuzhiyun 	hid_device_io_stop(hdev);
1320*4882a593Smuzhiyun 
1321*4882a593Smuzhiyun 	if (ret) {
1322*4882a593Smuzhiyun 		hid_err(hdev, "error registering i2c adapter\n");
1323*4882a593Smuzhiyun 		goto err_power_normal;
1324*4882a593Smuzhiyun 	}
1325*4882a593Smuzhiyun 
1326*4882a593Smuzhiyun 	hid_dbg(hdev, "adapter registered\n");
1327*4882a593Smuzhiyun 
1328*4882a593Smuzhiyun 	dev->gc.label			= "cp2112_gpio";
1329*4882a593Smuzhiyun 	dev->gc.direction_input		= cp2112_gpio_direction_input;
1330*4882a593Smuzhiyun 	dev->gc.direction_output	= cp2112_gpio_direction_output;
1331*4882a593Smuzhiyun 	dev->gc.set			= cp2112_gpio_set;
1332*4882a593Smuzhiyun 	dev->gc.get			= cp2112_gpio_get;
1333*4882a593Smuzhiyun 	dev->gc.base			= -1;
1334*4882a593Smuzhiyun 	dev->gc.ngpio			= 8;
1335*4882a593Smuzhiyun 	dev->gc.can_sleep		= 1;
1336*4882a593Smuzhiyun 	dev->gc.parent			= &hdev->dev;
1337*4882a593Smuzhiyun 
1338*4882a593Smuzhiyun 	dev->irq.name = "cp2112-gpio";
1339*4882a593Smuzhiyun 	dev->irq.irq_startup = cp2112_gpio_irq_startup;
1340*4882a593Smuzhiyun 	dev->irq.irq_shutdown = cp2112_gpio_irq_shutdown;
1341*4882a593Smuzhiyun 	dev->irq.irq_ack = cp2112_gpio_irq_ack;
1342*4882a593Smuzhiyun 	dev->irq.irq_mask = cp2112_gpio_irq_mask;
1343*4882a593Smuzhiyun 	dev->irq.irq_unmask = cp2112_gpio_irq_unmask;
1344*4882a593Smuzhiyun 	dev->irq.irq_set_type = cp2112_gpio_irq_type;
1345*4882a593Smuzhiyun 	dev->irq.flags = IRQCHIP_MASK_ON_SUSPEND;
1346*4882a593Smuzhiyun 
1347*4882a593Smuzhiyun 	girq = &dev->gc.irq;
1348*4882a593Smuzhiyun 	girq->chip = &dev->irq;
1349*4882a593Smuzhiyun 	/* The event comes from the outside so no parent handler */
1350*4882a593Smuzhiyun 	girq->parent_handler = NULL;
1351*4882a593Smuzhiyun 	girq->num_parents = 0;
1352*4882a593Smuzhiyun 	girq->parents = NULL;
1353*4882a593Smuzhiyun 	girq->default_type = IRQ_TYPE_NONE;
1354*4882a593Smuzhiyun 	girq->handler = handle_simple_irq;
1355*4882a593Smuzhiyun 
1356*4882a593Smuzhiyun 	ret = gpiochip_add_data(&dev->gc, dev);
1357*4882a593Smuzhiyun 	if (ret < 0) {
1358*4882a593Smuzhiyun 		hid_err(hdev, "error registering gpio chip\n");
1359*4882a593Smuzhiyun 		goto err_free_i2c;
1360*4882a593Smuzhiyun 	}
1361*4882a593Smuzhiyun 
1362*4882a593Smuzhiyun 	ret = sysfs_create_group(&hdev->dev.kobj, &cp2112_attr_group);
1363*4882a593Smuzhiyun 	if (ret < 0) {
1364*4882a593Smuzhiyun 		hid_err(hdev, "error creating sysfs attrs\n");
1365*4882a593Smuzhiyun 		goto err_gpiochip_remove;
1366*4882a593Smuzhiyun 	}
1367*4882a593Smuzhiyun 
1368*4882a593Smuzhiyun 	chmod_sysfs_attrs(hdev);
1369*4882a593Smuzhiyun 	hid_hw_power(hdev, PM_HINT_NORMAL);
1370*4882a593Smuzhiyun 
1371*4882a593Smuzhiyun 	return ret;
1372*4882a593Smuzhiyun 
1373*4882a593Smuzhiyun err_gpiochip_remove:
1374*4882a593Smuzhiyun 	gpiochip_remove(&dev->gc);
1375*4882a593Smuzhiyun err_free_i2c:
1376*4882a593Smuzhiyun 	i2c_del_adapter(&dev->adap);
1377*4882a593Smuzhiyun err_power_normal:
1378*4882a593Smuzhiyun 	hid_hw_power(hdev, PM_HINT_NORMAL);
1379*4882a593Smuzhiyun err_hid_close:
1380*4882a593Smuzhiyun 	hid_hw_close(hdev);
1381*4882a593Smuzhiyun err_hid_stop:
1382*4882a593Smuzhiyun 	hid_hw_stop(hdev);
1383*4882a593Smuzhiyun 	return ret;
1384*4882a593Smuzhiyun }
1385*4882a593Smuzhiyun 
cp2112_remove(struct hid_device * hdev)1386*4882a593Smuzhiyun static void cp2112_remove(struct hid_device *hdev)
1387*4882a593Smuzhiyun {
1388*4882a593Smuzhiyun 	struct cp2112_device *dev = hid_get_drvdata(hdev);
1389*4882a593Smuzhiyun 	int i;
1390*4882a593Smuzhiyun 
1391*4882a593Smuzhiyun 	sysfs_remove_group(&hdev->dev.kobj, &cp2112_attr_group);
1392*4882a593Smuzhiyun 	i2c_del_adapter(&dev->adap);
1393*4882a593Smuzhiyun 
1394*4882a593Smuzhiyun 	if (dev->gpio_poll) {
1395*4882a593Smuzhiyun 		dev->gpio_poll = false;
1396*4882a593Smuzhiyun 		cancel_delayed_work_sync(&dev->gpio_poll_worker);
1397*4882a593Smuzhiyun 	}
1398*4882a593Smuzhiyun 
1399*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(dev->desc); i++) {
1400*4882a593Smuzhiyun 		gpiochip_unlock_as_irq(&dev->gc, i);
1401*4882a593Smuzhiyun 		gpiochip_free_own_desc(dev->desc[i]);
1402*4882a593Smuzhiyun 	}
1403*4882a593Smuzhiyun 
1404*4882a593Smuzhiyun 	gpiochip_remove(&dev->gc);
1405*4882a593Smuzhiyun 	/* i2c_del_adapter has finished removing all i2c devices from our
1406*4882a593Smuzhiyun 	 * adapter. Well behaved devices should no longer call our cp2112_xfer
1407*4882a593Smuzhiyun 	 * and should have waited for any pending calls to finish. It has also
1408*4882a593Smuzhiyun 	 * waited for device_unregister(&adap->dev) to complete. Therefore we
1409*4882a593Smuzhiyun 	 * can safely free our struct cp2112_device.
1410*4882a593Smuzhiyun 	 */
1411*4882a593Smuzhiyun 	hid_hw_close(hdev);
1412*4882a593Smuzhiyun 	hid_hw_stop(hdev);
1413*4882a593Smuzhiyun }
1414*4882a593Smuzhiyun 
cp2112_raw_event(struct hid_device * hdev,struct hid_report * report,u8 * data,int size)1415*4882a593Smuzhiyun static int cp2112_raw_event(struct hid_device *hdev, struct hid_report *report,
1416*4882a593Smuzhiyun 			    u8 *data, int size)
1417*4882a593Smuzhiyun {
1418*4882a593Smuzhiyun 	struct cp2112_device *dev = hid_get_drvdata(hdev);
1419*4882a593Smuzhiyun 	struct cp2112_xfer_status_report *xfer = (void *)data;
1420*4882a593Smuzhiyun 
1421*4882a593Smuzhiyun 	switch (data[0]) {
1422*4882a593Smuzhiyun 	case CP2112_TRANSFER_STATUS_RESPONSE:
1423*4882a593Smuzhiyun 		hid_dbg(hdev, "xfer status: %02x %02x %04x %04x\n",
1424*4882a593Smuzhiyun 			xfer->status0, xfer->status1,
1425*4882a593Smuzhiyun 			be16_to_cpu(xfer->retries), be16_to_cpu(xfer->length));
1426*4882a593Smuzhiyun 
1427*4882a593Smuzhiyun 		switch (xfer->status0) {
1428*4882a593Smuzhiyun 		case STATUS0_IDLE:
1429*4882a593Smuzhiyun 			dev->xfer_status = -EAGAIN;
1430*4882a593Smuzhiyun 			break;
1431*4882a593Smuzhiyun 		case STATUS0_BUSY:
1432*4882a593Smuzhiyun 			dev->xfer_status = -EBUSY;
1433*4882a593Smuzhiyun 			break;
1434*4882a593Smuzhiyun 		case STATUS0_COMPLETE:
1435*4882a593Smuzhiyun 			dev->xfer_status = be16_to_cpu(xfer->length);
1436*4882a593Smuzhiyun 			break;
1437*4882a593Smuzhiyun 		case STATUS0_ERROR:
1438*4882a593Smuzhiyun 			switch (xfer->status1) {
1439*4882a593Smuzhiyun 			case STATUS1_TIMEOUT_NACK:
1440*4882a593Smuzhiyun 			case STATUS1_TIMEOUT_BUS:
1441*4882a593Smuzhiyun 				dev->xfer_status = -ETIMEDOUT;
1442*4882a593Smuzhiyun 				break;
1443*4882a593Smuzhiyun 			default:
1444*4882a593Smuzhiyun 				dev->xfer_status = -EIO;
1445*4882a593Smuzhiyun 				break;
1446*4882a593Smuzhiyun 			}
1447*4882a593Smuzhiyun 			break;
1448*4882a593Smuzhiyun 		default:
1449*4882a593Smuzhiyun 			dev->xfer_status = -EINVAL;
1450*4882a593Smuzhiyun 			break;
1451*4882a593Smuzhiyun 		}
1452*4882a593Smuzhiyun 
1453*4882a593Smuzhiyun 		atomic_set(&dev->xfer_avail, 1);
1454*4882a593Smuzhiyun 		break;
1455*4882a593Smuzhiyun 	case CP2112_DATA_READ_RESPONSE:
1456*4882a593Smuzhiyun 		hid_dbg(hdev, "read response: %02x %02x\n", data[1], data[2]);
1457*4882a593Smuzhiyun 
1458*4882a593Smuzhiyun 		dev->read_length = data[2];
1459*4882a593Smuzhiyun 		if (dev->read_length > sizeof(dev->read_data))
1460*4882a593Smuzhiyun 			dev->read_length = sizeof(dev->read_data);
1461*4882a593Smuzhiyun 
1462*4882a593Smuzhiyun 		memcpy(dev->read_data, &data[3], dev->read_length);
1463*4882a593Smuzhiyun 		atomic_set(&dev->read_avail, 1);
1464*4882a593Smuzhiyun 		break;
1465*4882a593Smuzhiyun 	default:
1466*4882a593Smuzhiyun 		hid_err(hdev, "unknown report\n");
1467*4882a593Smuzhiyun 
1468*4882a593Smuzhiyun 		return 0;
1469*4882a593Smuzhiyun 	}
1470*4882a593Smuzhiyun 
1471*4882a593Smuzhiyun 	wake_up_interruptible(&dev->wait);
1472*4882a593Smuzhiyun 	return 1;
1473*4882a593Smuzhiyun }
1474*4882a593Smuzhiyun 
1475*4882a593Smuzhiyun static struct hid_driver cp2112_driver = {
1476*4882a593Smuzhiyun 	.name		= "cp2112",
1477*4882a593Smuzhiyun 	.id_table	= cp2112_devices,
1478*4882a593Smuzhiyun 	.probe		= cp2112_probe,
1479*4882a593Smuzhiyun 	.remove		= cp2112_remove,
1480*4882a593Smuzhiyun 	.raw_event	= cp2112_raw_event,
1481*4882a593Smuzhiyun };
1482*4882a593Smuzhiyun 
1483*4882a593Smuzhiyun module_hid_driver(cp2112_driver);
1484*4882a593Smuzhiyun MODULE_DESCRIPTION("Silicon Labs HID USB to SMBus master bridge");
1485*4882a593Smuzhiyun MODULE_AUTHOR("David Barksdale <dbarksdale@uplogix.com>");
1486*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1487*4882a593Smuzhiyun 
1488