xref: /OK3568_Linux_fs/kernel/drivers/gpu/ipu-v3/ipu-smfc.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun #include <linux/export.h>
6*4882a593Smuzhiyun #include <linux/types.h>
7*4882a593Smuzhiyun #include <linux/init.h>
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/errno.h>
10*4882a593Smuzhiyun #include <linux/spinlock.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/clk.h>
13*4882a593Smuzhiyun #include <video/imx-ipu-v3.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include "ipu-prv.h"
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun struct ipu_smfc {
18*4882a593Smuzhiyun 	struct ipu_smfc_priv *priv;
19*4882a593Smuzhiyun 	int chno;
20*4882a593Smuzhiyun 	bool inuse;
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun struct ipu_smfc_priv {
24*4882a593Smuzhiyun 	void __iomem *base;
25*4882a593Smuzhiyun 	spinlock_t lock;
26*4882a593Smuzhiyun 	struct ipu_soc *ipu;
27*4882a593Smuzhiyun 	struct ipu_smfc channel[4];
28*4882a593Smuzhiyun 	int use_count;
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun /*SMFC Registers */
32*4882a593Smuzhiyun #define SMFC_MAP	0x0000
33*4882a593Smuzhiyun #define SMFC_WMC	0x0004
34*4882a593Smuzhiyun #define SMFC_BS		0x0008
35*4882a593Smuzhiyun 
ipu_smfc_set_burstsize(struct ipu_smfc * smfc,int burstsize)36*4882a593Smuzhiyun int ipu_smfc_set_burstsize(struct ipu_smfc *smfc, int burstsize)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun 	struct ipu_smfc_priv *priv = smfc->priv;
39*4882a593Smuzhiyun 	unsigned long flags;
40*4882a593Smuzhiyun 	u32 val, shift;
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->lock, flags);
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	shift = smfc->chno * 4;
45*4882a593Smuzhiyun 	val = readl(priv->base + SMFC_BS);
46*4882a593Smuzhiyun 	val &= ~(0xf << shift);
47*4882a593Smuzhiyun 	val |= burstsize << shift;
48*4882a593Smuzhiyun 	writel(val, priv->base + SMFC_BS);
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->lock, flags);
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	return 0;
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ipu_smfc_set_burstsize);
55*4882a593Smuzhiyun 
ipu_smfc_map_channel(struct ipu_smfc * smfc,int csi_id,int mipi_id)56*4882a593Smuzhiyun int ipu_smfc_map_channel(struct ipu_smfc *smfc, int csi_id, int mipi_id)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun 	struct ipu_smfc_priv *priv = smfc->priv;
59*4882a593Smuzhiyun 	unsigned long flags;
60*4882a593Smuzhiyun 	u32 val, shift;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->lock, flags);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	shift = smfc->chno * 3;
65*4882a593Smuzhiyun 	val = readl(priv->base + SMFC_MAP);
66*4882a593Smuzhiyun 	val &= ~(0x7 << shift);
67*4882a593Smuzhiyun 	val |= ((csi_id << 2) | mipi_id) << shift;
68*4882a593Smuzhiyun 	writel(val, priv->base + SMFC_MAP);
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->lock, flags);
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ipu_smfc_map_channel);
75*4882a593Smuzhiyun 
ipu_smfc_set_watermark(struct ipu_smfc * smfc,u32 set_level,u32 clr_level)76*4882a593Smuzhiyun int ipu_smfc_set_watermark(struct ipu_smfc *smfc, u32 set_level, u32 clr_level)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun 	struct ipu_smfc_priv *priv = smfc->priv;
79*4882a593Smuzhiyun 	unsigned long flags;
80*4882a593Smuzhiyun 	u32 val, shift;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->lock, flags);
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	shift = smfc->chno * 6 + (smfc->chno > 1 ? 4 : 0);
85*4882a593Smuzhiyun 	val = readl(priv->base + SMFC_WMC);
86*4882a593Smuzhiyun 	val &= ~(0x3f << shift);
87*4882a593Smuzhiyun 	val |= ((clr_level << 3) | set_level) << shift;
88*4882a593Smuzhiyun 	writel(val, priv->base + SMFC_WMC);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->lock, flags);
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ipu_smfc_set_watermark);
95*4882a593Smuzhiyun 
ipu_smfc_enable(struct ipu_smfc * smfc)96*4882a593Smuzhiyun int ipu_smfc_enable(struct ipu_smfc *smfc)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun 	struct ipu_smfc_priv *priv = smfc->priv;
99*4882a593Smuzhiyun 	unsigned long flags;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->lock, flags);
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	if (!priv->use_count)
104*4882a593Smuzhiyun 		ipu_module_enable(priv->ipu, IPU_CONF_SMFC_EN);
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	priv->use_count++;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->lock, flags);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	return 0;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ipu_smfc_enable);
113*4882a593Smuzhiyun 
ipu_smfc_disable(struct ipu_smfc * smfc)114*4882a593Smuzhiyun int ipu_smfc_disable(struct ipu_smfc *smfc)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	struct ipu_smfc_priv *priv = smfc->priv;
117*4882a593Smuzhiyun 	unsigned long flags;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->lock, flags);
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	priv->use_count--;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	if (!priv->use_count)
124*4882a593Smuzhiyun 		ipu_module_disable(priv->ipu, IPU_CONF_SMFC_EN);
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	if (priv->use_count < 0)
127*4882a593Smuzhiyun 		priv->use_count = 0;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->lock, flags);
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	return 0;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ipu_smfc_disable);
134*4882a593Smuzhiyun 
ipu_smfc_get(struct ipu_soc * ipu,unsigned int chno)135*4882a593Smuzhiyun struct ipu_smfc *ipu_smfc_get(struct ipu_soc *ipu, unsigned int chno)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	struct ipu_smfc_priv *priv = ipu->smfc_priv;
138*4882a593Smuzhiyun 	struct ipu_smfc *smfc, *ret;
139*4882a593Smuzhiyun 	unsigned long flags;
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	if (chno >= 4)
142*4882a593Smuzhiyun 		return ERR_PTR(-EINVAL);
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	smfc = &priv->channel[chno];
145*4882a593Smuzhiyun 	ret = smfc;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->lock, flags);
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	if (smfc->inuse) {
150*4882a593Smuzhiyun 		ret = ERR_PTR(-EBUSY);
151*4882a593Smuzhiyun 		goto unlock;
152*4882a593Smuzhiyun 	}
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	smfc->inuse = true;
155*4882a593Smuzhiyun unlock:
156*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->lock, flags);
157*4882a593Smuzhiyun 	return ret;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ipu_smfc_get);
160*4882a593Smuzhiyun 
ipu_smfc_put(struct ipu_smfc * smfc)161*4882a593Smuzhiyun void ipu_smfc_put(struct ipu_smfc *smfc)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	struct ipu_smfc_priv *priv = smfc->priv;
164*4882a593Smuzhiyun 	unsigned long flags;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->lock, flags);
167*4882a593Smuzhiyun 	smfc->inuse = false;
168*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->lock, flags);
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ipu_smfc_put);
171*4882a593Smuzhiyun 
ipu_smfc_init(struct ipu_soc * ipu,struct device * dev,unsigned long base)172*4882a593Smuzhiyun int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev,
173*4882a593Smuzhiyun 		  unsigned long base)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	struct ipu_smfc_priv *priv;
176*4882a593Smuzhiyun 	int i;
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
179*4882a593Smuzhiyun 	if (!priv)
180*4882a593Smuzhiyun 		return -ENOMEM;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	ipu->smfc_priv = priv;
183*4882a593Smuzhiyun 	spin_lock_init(&priv->lock);
184*4882a593Smuzhiyun 	priv->ipu = ipu;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	priv->base = devm_ioremap(dev, base, PAGE_SIZE);
187*4882a593Smuzhiyun 	if (!priv->base)
188*4882a593Smuzhiyun 		return -ENOMEM;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	for (i = 0; i < 4; i++) {
191*4882a593Smuzhiyun 		priv->channel[i].priv = priv;
192*4882a593Smuzhiyun 		priv->channel[i].chno = i;
193*4882a593Smuzhiyun 	}
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	pr_debug("%s: ioremap 0x%08lx -> %p\n", __func__, base, priv->base);
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	return 0;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun 
ipu_smfc_exit(struct ipu_soc * ipu)200*4882a593Smuzhiyun void ipu_smfc_exit(struct ipu_soc *ipu)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun }
203