1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Tegra host1x Command DMA
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2010-2013, NVIDIA Corporation.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/slab.h>
9*4882a593Smuzhiyun #include <linux/scatterlist.h>
10*4882a593Smuzhiyun #include <linux/dma-mapping.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include "../cdma.h"
13*4882a593Smuzhiyun #include "../channel.h"
14*4882a593Smuzhiyun #include "../dev.h"
15*4882a593Smuzhiyun #include "../debug.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun /*
18*4882a593Smuzhiyun * Put the restart at the end of pushbuffer memory
19*4882a593Smuzhiyun */
push_buffer_init(struct push_buffer * pb)20*4882a593Smuzhiyun static void push_buffer_init(struct push_buffer *pb)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun *(u32 *)(pb->mapped + pb->size) = host1x_opcode_restart(0);
23*4882a593Smuzhiyun }
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun * Increment timedout buffer's syncpt via CPU.
27*4882a593Smuzhiyun */
cdma_timeout_cpu_incr(struct host1x_cdma * cdma,u32 getptr,u32 syncpt_incrs,u32 syncval,u32 nr_slots)28*4882a593Smuzhiyun static void cdma_timeout_cpu_incr(struct host1x_cdma *cdma, u32 getptr,
29*4882a593Smuzhiyun u32 syncpt_incrs, u32 syncval, u32 nr_slots)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun unsigned int i;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun for (i = 0; i < syncpt_incrs; i++)
34*4882a593Smuzhiyun host1x_syncpt_incr(cdma->timeout.syncpt);
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /* after CPU incr, ensure shadow is up to date */
37*4882a593Smuzhiyun host1x_syncpt_load(cdma->timeout.syncpt);
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /*
41*4882a593Smuzhiyun * Start channel DMA
42*4882a593Smuzhiyun */
cdma_start(struct host1x_cdma * cdma)43*4882a593Smuzhiyun static void cdma_start(struct host1x_cdma *cdma)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun struct host1x_channel *ch = cdma_to_channel(cdma);
46*4882a593Smuzhiyun u64 start, end;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun if (cdma->running)
49*4882a593Smuzhiyun return;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun cdma->last_pos = cdma->push_buffer.pos;
52*4882a593Smuzhiyun start = cdma->push_buffer.dma;
53*4882a593Smuzhiyun end = cdma->push_buffer.size + 4;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP,
56*4882a593Smuzhiyun HOST1X_CHANNEL_DMACTRL);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /* set base, put and end pointer */
59*4882a593Smuzhiyun host1x_ch_writel(ch, lower_32_bits(start), HOST1X_CHANNEL_DMASTART);
60*4882a593Smuzhiyun #if HOST1X_HW >= 6
61*4882a593Smuzhiyun host1x_ch_writel(ch, upper_32_bits(start), HOST1X_CHANNEL_DMASTART_HI);
62*4882a593Smuzhiyun #endif
63*4882a593Smuzhiyun host1x_ch_writel(ch, cdma->push_buffer.pos, HOST1X_CHANNEL_DMAPUT);
64*4882a593Smuzhiyun #if HOST1X_HW >= 6
65*4882a593Smuzhiyun host1x_ch_writel(ch, 0, HOST1X_CHANNEL_DMAPUT_HI);
66*4882a593Smuzhiyun #endif
67*4882a593Smuzhiyun host1x_ch_writel(ch, lower_32_bits(end), HOST1X_CHANNEL_DMAEND);
68*4882a593Smuzhiyun #if HOST1X_HW >= 6
69*4882a593Smuzhiyun host1x_ch_writel(ch, upper_32_bits(end), HOST1X_CHANNEL_DMAEND_HI);
70*4882a593Smuzhiyun #endif
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /* reset GET */
73*4882a593Smuzhiyun host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP |
74*4882a593Smuzhiyun HOST1X_CHANNEL_DMACTRL_DMAGETRST |
75*4882a593Smuzhiyun HOST1X_CHANNEL_DMACTRL_DMAINITGET,
76*4882a593Smuzhiyun HOST1X_CHANNEL_DMACTRL);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun /* start the command DMA */
79*4882a593Smuzhiyun host1x_ch_writel(ch, 0, HOST1X_CHANNEL_DMACTRL);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun cdma->running = true;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /*
85*4882a593Smuzhiyun * Similar to cdma_start(), but rather than starting from an idle
86*4882a593Smuzhiyun * state (where DMA GET is set to DMA PUT), on a timeout we restore
87*4882a593Smuzhiyun * DMA GET from an explicit value (so DMA may again be pending).
88*4882a593Smuzhiyun */
cdma_timeout_restart(struct host1x_cdma * cdma,u32 getptr)89*4882a593Smuzhiyun static void cdma_timeout_restart(struct host1x_cdma *cdma, u32 getptr)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun struct host1x *host1x = cdma_to_host1x(cdma);
92*4882a593Smuzhiyun struct host1x_channel *ch = cdma_to_channel(cdma);
93*4882a593Smuzhiyun u64 start, end;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun if (cdma->running)
96*4882a593Smuzhiyun return;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun cdma->last_pos = cdma->push_buffer.pos;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP,
101*4882a593Smuzhiyun HOST1X_CHANNEL_DMACTRL);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun start = cdma->push_buffer.dma;
104*4882a593Smuzhiyun end = cdma->push_buffer.size + 4;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /* set base, end pointer (all of memory) */
107*4882a593Smuzhiyun host1x_ch_writel(ch, lower_32_bits(start), HOST1X_CHANNEL_DMASTART);
108*4882a593Smuzhiyun #if HOST1X_HW >= 6
109*4882a593Smuzhiyun host1x_ch_writel(ch, upper_32_bits(start), HOST1X_CHANNEL_DMASTART_HI);
110*4882a593Smuzhiyun #endif
111*4882a593Smuzhiyun host1x_ch_writel(ch, lower_32_bits(end), HOST1X_CHANNEL_DMAEND);
112*4882a593Smuzhiyun #if HOST1X_HW >= 6
113*4882a593Smuzhiyun host1x_ch_writel(ch, upper_32_bits(end), HOST1X_CHANNEL_DMAEND_HI);
114*4882a593Smuzhiyun #endif
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /* set GET, by loading the value in PUT (then reset GET) */
117*4882a593Smuzhiyun host1x_ch_writel(ch, getptr, HOST1X_CHANNEL_DMAPUT);
118*4882a593Smuzhiyun host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP |
119*4882a593Smuzhiyun HOST1X_CHANNEL_DMACTRL_DMAGETRST |
120*4882a593Smuzhiyun HOST1X_CHANNEL_DMACTRL_DMAINITGET,
121*4882a593Smuzhiyun HOST1X_CHANNEL_DMACTRL);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun dev_dbg(host1x->dev,
124*4882a593Smuzhiyun "%s: DMA GET 0x%x, PUT HW 0x%x / shadow 0x%x\n", __func__,
125*4882a593Smuzhiyun host1x_ch_readl(ch, HOST1X_CHANNEL_DMAGET),
126*4882a593Smuzhiyun host1x_ch_readl(ch, HOST1X_CHANNEL_DMAPUT),
127*4882a593Smuzhiyun cdma->last_pos);
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /* deassert GET reset and set PUT */
130*4882a593Smuzhiyun host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP,
131*4882a593Smuzhiyun HOST1X_CHANNEL_DMACTRL);
132*4882a593Smuzhiyun host1x_ch_writel(ch, cdma->push_buffer.pos, HOST1X_CHANNEL_DMAPUT);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun /* start the command DMA */
135*4882a593Smuzhiyun host1x_ch_writel(ch, 0, HOST1X_CHANNEL_DMACTRL);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun cdma->running = true;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /*
141*4882a593Smuzhiyun * Kick channel DMA into action by writing its PUT offset (if it has changed)
142*4882a593Smuzhiyun */
cdma_flush(struct host1x_cdma * cdma)143*4882a593Smuzhiyun static void cdma_flush(struct host1x_cdma *cdma)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun struct host1x_channel *ch = cdma_to_channel(cdma);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun if (cdma->push_buffer.pos != cdma->last_pos) {
148*4882a593Smuzhiyun host1x_ch_writel(ch, cdma->push_buffer.pos,
149*4882a593Smuzhiyun HOST1X_CHANNEL_DMAPUT);
150*4882a593Smuzhiyun cdma->last_pos = cdma->push_buffer.pos;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun
cdma_stop(struct host1x_cdma * cdma)154*4882a593Smuzhiyun static void cdma_stop(struct host1x_cdma *cdma)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun struct host1x_channel *ch = cdma_to_channel(cdma);
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun mutex_lock(&cdma->lock);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun if (cdma->running) {
161*4882a593Smuzhiyun host1x_cdma_wait_locked(cdma, CDMA_EVENT_SYNC_QUEUE_EMPTY);
162*4882a593Smuzhiyun host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP,
163*4882a593Smuzhiyun HOST1X_CHANNEL_DMACTRL);
164*4882a593Smuzhiyun cdma->running = false;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun mutex_unlock(&cdma->lock);
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
cdma_hw_cmdproc_stop(struct host1x * host,struct host1x_channel * ch,bool stop)170*4882a593Smuzhiyun static void cdma_hw_cmdproc_stop(struct host1x *host, struct host1x_channel *ch,
171*4882a593Smuzhiyun bool stop)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun #if HOST1X_HW >= 6
174*4882a593Smuzhiyun host1x_ch_writel(ch, stop ? 0x1 : 0x0, HOST1X_CHANNEL_CMDPROC_STOP);
175*4882a593Smuzhiyun #else
176*4882a593Smuzhiyun u32 cmdproc_stop = host1x_sync_readl(host, HOST1X_SYNC_CMDPROC_STOP);
177*4882a593Smuzhiyun if (stop)
178*4882a593Smuzhiyun cmdproc_stop |= BIT(ch->id);
179*4882a593Smuzhiyun else
180*4882a593Smuzhiyun cmdproc_stop &= ~BIT(ch->id);
181*4882a593Smuzhiyun host1x_sync_writel(host, cmdproc_stop, HOST1X_SYNC_CMDPROC_STOP);
182*4882a593Smuzhiyun #endif
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
cdma_hw_teardown(struct host1x * host,struct host1x_channel * ch)185*4882a593Smuzhiyun static void cdma_hw_teardown(struct host1x *host, struct host1x_channel *ch)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun #if HOST1X_HW >= 6
188*4882a593Smuzhiyun host1x_ch_writel(ch, 0x1, HOST1X_CHANNEL_TEARDOWN);
189*4882a593Smuzhiyun #else
190*4882a593Smuzhiyun host1x_sync_writel(host, BIT(ch->id), HOST1X_SYNC_CH_TEARDOWN);
191*4882a593Smuzhiyun #endif
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun /*
195*4882a593Smuzhiyun * Stops both channel's command processor and CDMA immediately.
196*4882a593Smuzhiyun * Also, tears down the channel and resets corresponding module.
197*4882a593Smuzhiyun */
cdma_freeze(struct host1x_cdma * cdma)198*4882a593Smuzhiyun static void cdma_freeze(struct host1x_cdma *cdma)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun struct host1x *host = cdma_to_host1x(cdma);
201*4882a593Smuzhiyun struct host1x_channel *ch = cdma_to_channel(cdma);
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun if (cdma->torndown && !cdma->running) {
204*4882a593Smuzhiyun dev_warn(host->dev, "Already torn down\n");
205*4882a593Smuzhiyun return;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun dev_dbg(host->dev, "freezing channel (id %d)\n", ch->id);
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun cdma_hw_cmdproc_stop(host, ch, true);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun dev_dbg(host->dev, "%s: DMA GET 0x%x, PUT HW 0x%x / shadow 0x%x\n",
213*4882a593Smuzhiyun __func__, host1x_ch_readl(ch, HOST1X_CHANNEL_DMAGET),
214*4882a593Smuzhiyun host1x_ch_readl(ch, HOST1X_CHANNEL_DMAPUT),
215*4882a593Smuzhiyun cdma->last_pos);
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP,
218*4882a593Smuzhiyun HOST1X_CHANNEL_DMACTRL);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun cdma_hw_teardown(host, ch);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun cdma->running = false;
223*4882a593Smuzhiyun cdma->torndown = true;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
cdma_resume(struct host1x_cdma * cdma,u32 getptr)226*4882a593Smuzhiyun static void cdma_resume(struct host1x_cdma *cdma, u32 getptr)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun struct host1x *host1x = cdma_to_host1x(cdma);
229*4882a593Smuzhiyun struct host1x_channel *ch = cdma_to_channel(cdma);
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun dev_dbg(host1x->dev,
232*4882a593Smuzhiyun "resuming channel (id %u, DMAGET restart = 0x%x)\n",
233*4882a593Smuzhiyun ch->id, getptr);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun cdma_hw_cmdproc_stop(host1x, ch, false);
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun cdma->torndown = false;
238*4882a593Smuzhiyun cdma_timeout_restart(cdma, getptr);
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun /*
242*4882a593Smuzhiyun * If this timeout fires, it indicates the current sync_queue entry has
243*4882a593Smuzhiyun * exceeded its TTL and the userctx should be timed out and remaining
244*4882a593Smuzhiyun * submits already issued cleaned up (future submits return an error).
245*4882a593Smuzhiyun */
cdma_timeout_handler(struct work_struct * work)246*4882a593Smuzhiyun static void cdma_timeout_handler(struct work_struct *work)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun u32 syncpt_val;
249*4882a593Smuzhiyun struct host1x_cdma *cdma;
250*4882a593Smuzhiyun struct host1x *host1x;
251*4882a593Smuzhiyun struct host1x_channel *ch;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun cdma = container_of(to_delayed_work(work), struct host1x_cdma,
254*4882a593Smuzhiyun timeout.wq);
255*4882a593Smuzhiyun host1x = cdma_to_host1x(cdma);
256*4882a593Smuzhiyun ch = cdma_to_channel(cdma);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun host1x_debug_dump(cdma_to_host1x(cdma));
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun mutex_lock(&cdma->lock);
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun if (!cdma->timeout.client) {
263*4882a593Smuzhiyun dev_dbg(host1x->dev,
264*4882a593Smuzhiyun "cdma_timeout: expired, but has no clientid\n");
265*4882a593Smuzhiyun mutex_unlock(&cdma->lock);
266*4882a593Smuzhiyun return;
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun /* stop processing to get a clean snapshot */
270*4882a593Smuzhiyun cdma_hw_cmdproc_stop(host1x, ch, true);
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun syncpt_val = host1x_syncpt_load(cdma->timeout.syncpt);
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun /* has buffer actually completed? */
275*4882a593Smuzhiyun if ((s32)(syncpt_val - cdma->timeout.syncpt_val) >= 0) {
276*4882a593Smuzhiyun dev_dbg(host1x->dev,
277*4882a593Smuzhiyun "cdma_timeout: expired, but buffer had completed\n");
278*4882a593Smuzhiyun /* restore */
279*4882a593Smuzhiyun cdma_hw_cmdproc_stop(host1x, ch, false);
280*4882a593Smuzhiyun mutex_unlock(&cdma->lock);
281*4882a593Smuzhiyun return;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun dev_warn(host1x->dev, "%s: timeout: %u (%s), HW thresh %d, done %d\n",
285*4882a593Smuzhiyun __func__, cdma->timeout.syncpt->id, cdma->timeout.syncpt->name,
286*4882a593Smuzhiyun syncpt_val, cdma->timeout.syncpt_val);
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun /* stop HW, resetting channel/module */
289*4882a593Smuzhiyun host1x_hw_cdma_freeze(host1x, cdma);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun host1x_cdma_update_sync_queue(cdma, ch->dev);
292*4882a593Smuzhiyun mutex_unlock(&cdma->lock);
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun /*
296*4882a593Smuzhiyun * Init timeout resources
297*4882a593Smuzhiyun */
cdma_timeout_init(struct host1x_cdma * cdma,unsigned int syncpt)298*4882a593Smuzhiyun static int cdma_timeout_init(struct host1x_cdma *cdma, unsigned int syncpt)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun INIT_DELAYED_WORK(&cdma->timeout.wq, cdma_timeout_handler);
301*4882a593Smuzhiyun cdma->timeout.initialized = true;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun return 0;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun /*
307*4882a593Smuzhiyun * Clean up timeout resources
308*4882a593Smuzhiyun */
cdma_timeout_destroy(struct host1x_cdma * cdma)309*4882a593Smuzhiyun static void cdma_timeout_destroy(struct host1x_cdma *cdma)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun if (cdma->timeout.initialized)
312*4882a593Smuzhiyun cancel_delayed_work(&cdma->timeout.wq);
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun cdma->timeout.initialized = false;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun static const struct host1x_cdma_ops host1x_cdma_ops = {
318*4882a593Smuzhiyun .start = cdma_start,
319*4882a593Smuzhiyun .stop = cdma_stop,
320*4882a593Smuzhiyun .flush = cdma_flush,
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun .timeout_init = cdma_timeout_init,
323*4882a593Smuzhiyun .timeout_destroy = cdma_timeout_destroy,
324*4882a593Smuzhiyun .freeze = cdma_freeze,
325*4882a593Smuzhiyun .resume = cdma_resume,
326*4882a593Smuzhiyun .timeout_cpu_incr = cdma_timeout_cpu_incr,
327*4882a593Smuzhiyun };
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun static const struct host1x_pushbuffer_ops host1x_pushbuffer_ops = {
330*4882a593Smuzhiyun .init = push_buffer_init,
331*4882a593Smuzhiyun };
332