1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2016 Linaro Ltd. 4*4882a593Smuzhiyun * Copyright 2016 ZTE Corporation. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __ZX_DRM_DRV_H__ 8*4882a593Smuzhiyun #define __ZX_DRM_DRV_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun extern struct platform_driver zx_crtc_driver; 11*4882a593Smuzhiyun extern struct platform_driver zx_hdmi_driver; 12*4882a593Smuzhiyun extern struct platform_driver zx_tvenc_driver; 13*4882a593Smuzhiyun extern struct platform_driver zx_vga_driver; 14*4882a593Smuzhiyun zx_readl(void __iomem * reg)15*4882a593Smuzhiyunstatic inline u32 zx_readl(void __iomem *reg) 16*4882a593Smuzhiyun { 17*4882a593Smuzhiyun return readl_relaxed(reg); 18*4882a593Smuzhiyun } 19*4882a593Smuzhiyun zx_writel(void __iomem * reg,u32 val)20*4882a593Smuzhiyunstatic inline void zx_writel(void __iomem *reg, u32 val) 21*4882a593Smuzhiyun { 22*4882a593Smuzhiyun writel_relaxed(val, reg); 23*4882a593Smuzhiyun } 24*4882a593Smuzhiyun zx_writel_mask(void __iomem * reg,u32 mask,u32 val)25*4882a593Smuzhiyunstatic inline void zx_writel_mask(void __iomem *reg, u32 mask, u32 val) 26*4882a593Smuzhiyun { 27*4882a593Smuzhiyun u32 tmp; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun tmp = zx_readl(reg); 30*4882a593Smuzhiyun tmp = (tmp & ~mask) | (val & mask); 31*4882a593Smuzhiyun zx_writel(reg, tmp); 32*4882a593Smuzhiyun } 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #endif /* __ZX_DRM_DRV_H__ */ 35