1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 OR MIT
2*4882a593Smuzhiyun /**************************************************************************
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright 2009-2015 VMware, Inc., Palo Alto, CA., USA
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
7*4882a593Smuzhiyun * copy of this software and associated documentation files (the
8*4882a593Smuzhiyun * "Software"), to deal in the Software without restriction, including
9*4882a593Smuzhiyun * without limitation the rights to use, copy, modify, merge, publish,
10*4882a593Smuzhiyun * distribute, sub license, and/or sell copies of the Software, and to
11*4882a593Smuzhiyun * permit persons to whom the Software is furnished to do so, subject to
12*4882a593Smuzhiyun * the following conditions:
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the
15*4882a593Smuzhiyun * next paragraph) shall be included in all copies or substantial portions
16*4882a593Smuzhiyun * of the Software.
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21*4882a593Smuzhiyun * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22*4882a593Smuzhiyun * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23*4882a593Smuzhiyun * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24*4882a593Smuzhiyun * USE OR OTHER DEALINGS IN THE SOFTWARE.
25*4882a593Smuzhiyun *
26*4882a593Smuzhiyun **************************************************************************/
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #include <drm/drm_atomic.h>
29*4882a593Smuzhiyun #include <drm/drm_atomic_helper.h>
30*4882a593Smuzhiyun #include <drm/drm_damage_helper.h>
31*4882a593Smuzhiyun #include <drm/drm_fourcc.h>
32*4882a593Smuzhiyun #include <drm/drm_plane_helper.h>
33*4882a593Smuzhiyun #include <drm/drm_rect.h>
34*4882a593Smuzhiyun #include <drm/drm_sysfs.h>
35*4882a593Smuzhiyun #include <drm/drm_vblank.h>
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #include "vmwgfx_kms.h"
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /* Might need a hrtimer here? */
40*4882a593Smuzhiyun #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
41*4882a593Smuzhiyun
vmw_du_cleanup(struct vmw_display_unit * du)42*4882a593Smuzhiyun void vmw_du_cleanup(struct vmw_display_unit *du)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun drm_plane_cleanup(&du->primary);
45*4882a593Smuzhiyun drm_plane_cleanup(&du->cursor);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun drm_connector_unregister(&du->connector);
48*4882a593Smuzhiyun drm_crtc_cleanup(&du->crtc);
49*4882a593Smuzhiyun drm_encoder_cleanup(&du->encoder);
50*4882a593Smuzhiyun drm_connector_cleanup(&du->connector);
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /*
54*4882a593Smuzhiyun * Display Unit Cursor functions
55*4882a593Smuzhiyun */
56*4882a593Smuzhiyun
vmw_cursor_update_image(struct vmw_private * dev_priv,u32 * image,u32 width,u32 height,u32 hotspotX,u32 hotspotY)57*4882a593Smuzhiyun static int vmw_cursor_update_image(struct vmw_private *dev_priv,
58*4882a593Smuzhiyun u32 *image, u32 width, u32 height,
59*4882a593Smuzhiyun u32 hotspotX, u32 hotspotY)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun struct {
62*4882a593Smuzhiyun u32 cmd;
63*4882a593Smuzhiyun SVGAFifoCmdDefineAlphaCursor cursor;
64*4882a593Smuzhiyun } *cmd;
65*4882a593Smuzhiyun u32 image_size = width * height * 4;
66*4882a593Smuzhiyun u32 cmd_size = sizeof(*cmd) + image_size;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun if (!image)
69*4882a593Smuzhiyun return -EINVAL;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE(dev_priv, cmd_size);
72*4882a593Smuzhiyun if (unlikely(cmd == NULL))
73*4882a593Smuzhiyun return -ENOMEM;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun memset(cmd, 0, sizeof(*cmd));
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun memcpy(&cmd[1], image, image_size);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun cmd->cmd = SVGA_CMD_DEFINE_ALPHA_CURSOR;
80*4882a593Smuzhiyun cmd->cursor.id = 0;
81*4882a593Smuzhiyun cmd->cursor.width = width;
82*4882a593Smuzhiyun cmd->cursor.height = height;
83*4882a593Smuzhiyun cmd->cursor.hotspotX = hotspotX;
84*4882a593Smuzhiyun cmd->cursor.hotspotY = hotspotY;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun vmw_fifo_commit_flush(dev_priv, cmd_size);
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun return 0;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
vmw_cursor_update_bo(struct vmw_private * dev_priv,struct vmw_buffer_object * bo,u32 width,u32 height,u32 hotspotX,u32 hotspotY)91*4882a593Smuzhiyun static int vmw_cursor_update_bo(struct vmw_private *dev_priv,
92*4882a593Smuzhiyun struct vmw_buffer_object *bo,
93*4882a593Smuzhiyun u32 width, u32 height,
94*4882a593Smuzhiyun u32 hotspotX, u32 hotspotY)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun struct ttm_bo_kmap_obj map;
97*4882a593Smuzhiyun unsigned long kmap_offset;
98*4882a593Smuzhiyun unsigned long kmap_num;
99*4882a593Smuzhiyun void *virtual;
100*4882a593Smuzhiyun bool dummy;
101*4882a593Smuzhiyun int ret;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun kmap_offset = 0;
104*4882a593Smuzhiyun kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun ret = ttm_bo_reserve(&bo->base, true, false, NULL);
107*4882a593Smuzhiyun if (unlikely(ret != 0)) {
108*4882a593Smuzhiyun DRM_ERROR("reserve failed\n");
109*4882a593Smuzhiyun return -EINVAL;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun ret = ttm_bo_kmap(&bo->base, kmap_offset, kmap_num, &map);
113*4882a593Smuzhiyun if (unlikely(ret != 0))
114*4882a593Smuzhiyun goto err_unreserve;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun virtual = ttm_kmap_obj_virtual(&map, &dummy);
117*4882a593Smuzhiyun ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
118*4882a593Smuzhiyun hotspotX, hotspotY);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun ttm_bo_kunmap(&map);
121*4882a593Smuzhiyun err_unreserve:
122*4882a593Smuzhiyun ttm_bo_unreserve(&bo->base);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun return ret;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun
vmw_cursor_update_position(struct vmw_private * dev_priv,bool show,int x,int y)128*4882a593Smuzhiyun static void vmw_cursor_update_position(struct vmw_private *dev_priv,
129*4882a593Smuzhiyun bool show, int x, int y)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun u32 *fifo_mem = dev_priv->mmio_virt;
132*4882a593Smuzhiyun uint32_t count;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun spin_lock(&dev_priv->cursor_lock);
135*4882a593Smuzhiyun vmw_mmio_write(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
136*4882a593Smuzhiyun vmw_mmio_write(x, fifo_mem + SVGA_FIFO_CURSOR_X);
137*4882a593Smuzhiyun vmw_mmio_write(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
138*4882a593Smuzhiyun count = vmw_mmio_read(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
139*4882a593Smuzhiyun vmw_mmio_write(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
140*4882a593Smuzhiyun spin_unlock(&dev_priv->cursor_lock);
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun
vmw_kms_cursor_snoop(struct vmw_surface * srf,struct ttm_object_file * tfile,struct ttm_buffer_object * bo,SVGA3dCmdHeader * header)144*4882a593Smuzhiyun void vmw_kms_cursor_snoop(struct vmw_surface *srf,
145*4882a593Smuzhiyun struct ttm_object_file *tfile,
146*4882a593Smuzhiyun struct ttm_buffer_object *bo,
147*4882a593Smuzhiyun SVGA3dCmdHeader *header)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun struct ttm_bo_kmap_obj map;
150*4882a593Smuzhiyun unsigned long kmap_offset;
151*4882a593Smuzhiyun unsigned long kmap_num;
152*4882a593Smuzhiyun SVGA3dCopyBox *box;
153*4882a593Smuzhiyun unsigned box_count;
154*4882a593Smuzhiyun void *virtual;
155*4882a593Smuzhiyun bool dummy;
156*4882a593Smuzhiyun struct vmw_dma_cmd {
157*4882a593Smuzhiyun SVGA3dCmdHeader header;
158*4882a593Smuzhiyun SVGA3dCmdSurfaceDMA dma;
159*4882a593Smuzhiyun } *cmd;
160*4882a593Smuzhiyun int i, ret;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun cmd = container_of(header, struct vmw_dma_cmd, header);
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun /* No snooper installed */
165*4882a593Smuzhiyun if (!srf->snooper.image)
166*4882a593Smuzhiyun return;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
169*4882a593Smuzhiyun DRM_ERROR("face and mipmap for cursors should never != 0\n");
170*4882a593Smuzhiyun return;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun if (cmd->header.size < 64) {
174*4882a593Smuzhiyun DRM_ERROR("at least one full copy box must be given\n");
175*4882a593Smuzhiyun return;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun box = (SVGA3dCopyBox *)&cmd[1];
179*4882a593Smuzhiyun box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
180*4882a593Smuzhiyun sizeof(SVGA3dCopyBox);
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
183*4882a593Smuzhiyun box->x != 0 || box->y != 0 || box->z != 0 ||
184*4882a593Smuzhiyun box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
185*4882a593Smuzhiyun box->d != 1 || box_count != 1) {
186*4882a593Smuzhiyun /* TODO handle none page aligned offsets */
187*4882a593Smuzhiyun /* TODO handle more dst & src != 0 */
188*4882a593Smuzhiyun /* TODO handle more then one copy */
189*4882a593Smuzhiyun DRM_ERROR("Can't snoop dma request for cursor!\n");
190*4882a593Smuzhiyun DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
191*4882a593Smuzhiyun box->srcx, box->srcy, box->srcz,
192*4882a593Smuzhiyun box->x, box->y, box->z,
193*4882a593Smuzhiyun box->w, box->h, box->d, box_count,
194*4882a593Smuzhiyun cmd->dma.guest.ptr.offset);
195*4882a593Smuzhiyun return;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
199*4882a593Smuzhiyun kmap_num = (64*64*4) >> PAGE_SHIFT;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun ret = ttm_bo_reserve(bo, true, false, NULL);
202*4882a593Smuzhiyun if (unlikely(ret != 0)) {
203*4882a593Smuzhiyun DRM_ERROR("reserve failed\n");
204*4882a593Smuzhiyun return;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
208*4882a593Smuzhiyun if (unlikely(ret != 0))
209*4882a593Smuzhiyun goto err_unreserve;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun virtual = ttm_kmap_obj_virtual(&map, &dummy);
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
214*4882a593Smuzhiyun memcpy(srf->snooper.image, virtual, 64*64*4);
215*4882a593Smuzhiyun } else {
216*4882a593Smuzhiyun /* Image is unsigned pointer. */
217*4882a593Smuzhiyun for (i = 0; i < box->h; i++)
218*4882a593Smuzhiyun memcpy(srf->snooper.image + i * 64,
219*4882a593Smuzhiyun virtual + i * cmd->dma.guest.pitch,
220*4882a593Smuzhiyun box->w * 4);
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun srf->snooper.age++;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun ttm_bo_kunmap(&map);
226*4882a593Smuzhiyun err_unreserve:
227*4882a593Smuzhiyun ttm_bo_unreserve(bo);
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun /**
231*4882a593Smuzhiyun * vmw_kms_legacy_hotspot_clear - Clear legacy hotspots
232*4882a593Smuzhiyun *
233*4882a593Smuzhiyun * @dev_priv: Pointer to the device private struct.
234*4882a593Smuzhiyun *
235*4882a593Smuzhiyun * Clears all legacy hotspots.
236*4882a593Smuzhiyun */
vmw_kms_legacy_hotspot_clear(struct vmw_private * dev_priv)237*4882a593Smuzhiyun void vmw_kms_legacy_hotspot_clear(struct vmw_private *dev_priv)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun struct drm_device *dev = dev_priv->dev;
240*4882a593Smuzhiyun struct vmw_display_unit *du;
241*4882a593Smuzhiyun struct drm_crtc *crtc;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun drm_modeset_lock_all(dev);
244*4882a593Smuzhiyun drm_for_each_crtc(crtc, dev) {
245*4882a593Smuzhiyun du = vmw_crtc_to_du(crtc);
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun du->hotspot_x = 0;
248*4882a593Smuzhiyun du->hotspot_y = 0;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun drm_modeset_unlock_all(dev);
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
vmw_kms_cursor_post_execbuf(struct vmw_private * dev_priv)253*4882a593Smuzhiyun void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun struct drm_device *dev = dev_priv->dev;
256*4882a593Smuzhiyun struct vmw_display_unit *du;
257*4882a593Smuzhiyun struct drm_crtc *crtc;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun mutex_lock(&dev->mode_config.mutex);
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
262*4882a593Smuzhiyun du = vmw_crtc_to_du(crtc);
263*4882a593Smuzhiyun if (!du->cursor_surface ||
264*4882a593Smuzhiyun du->cursor_age == du->cursor_surface->snooper.age)
265*4882a593Smuzhiyun continue;
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun du->cursor_age = du->cursor_surface->snooper.age;
268*4882a593Smuzhiyun vmw_cursor_update_image(dev_priv,
269*4882a593Smuzhiyun du->cursor_surface->snooper.image,
270*4882a593Smuzhiyun 64, 64,
271*4882a593Smuzhiyun du->hotspot_x + du->core_hotspot_x,
272*4882a593Smuzhiyun du->hotspot_y + du->core_hotspot_y);
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun mutex_unlock(&dev->mode_config.mutex);
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun
vmw_du_cursor_plane_destroy(struct drm_plane * plane)279*4882a593Smuzhiyun void vmw_du_cursor_plane_destroy(struct drm_plane *plane)
280*4882a593Smuzhiyun {
281*4882a593Smuzhiyun vmw_cursor_update_position(plane->dev->dev_private, false, 0, 0);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun drm_plane_cleanup(plane);
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun
vmw_du_primary_plane_destroy(struct drm_plane * plane)287*4882a593Smuzhiyun void vmw_du_primary_plane_destroy(struct drm_plane *plane)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun drm_plane_cleanup(plane);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun /* Planes are static in our case so we don't free it */
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun /**
296*4882a593Smuzhiyun * vmw_du_vps_unpin_surf - unpins resource associated with a framebuffer surface
297*4882a593Smuzhiyun *
298*4882a593Smuzhiyun * @vps: plane state associated with the display surface
299*4882a593Smuzhiyun * @unreference: true if we also want to unreference the display.
300*4882a593Smuzhiyun */
vmw_du_plane_unpin_surf(struct vmw_plane_state * vps,bool unreference)301*4882a593Smuzhiyun void vmw_du_plane_unpin_surf(struct vmw_plane_state *vps,
302*4882a593Smuzhiyun bool unreference)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun if (vps->surf) {
305*4882a593Smuzhiyun if (vps->pinned) {
306*4882a593Smuzhiyun vmw_resource_unpin(&vps->surf->res);
307*4882a593Smuzhiyun vps->pinned--;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun if (unreference) {
311*4882a593Smuzhiyun if (vps->pinned)
312*4882a593Smuzhiyun DRM_ERROR("Surface still pinned\n");
313*4882a593Smuzhiyun vmw_surface_unreference(&vps->surf);
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun /**
320*4882a593Smuzhiyun * vmw_du_plane_cleanup_fb - Unpins the cursor
321*4882a593Smuzhiyun *
322*4882a593Smuzhiyun * @plane: display plane
323*4882a593Smuzhiyun * @old_state: Contains the FB to clean up
324*4882a593Smuzhiyun *
325*4882a593Smuzhiyun * Unpins the framebuffer surface
326*4882a593Smuzhiyun *
327*4882a593Smuzhiyun * Returns 0 on success
328*4882a593Smuzhiyun */
329*4882a593Smuzhiyun void
vmw_du_plane_cleanup_fb(struct drm_plane * plane,struct drm_plane_state * old_state)330*4882a593Smuzhiyun vmw_du_plane_cleanup_fb(struct drm_plane *plane,
331*4882a593Smuzhiyun struct drm_plane_state *old_state)
332*4882a593Smuzhiyun {
333*4882a593Smuzhiyun struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun vmw_du_plane_unpin_surf(vps, false);
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun /**
340*4882a593Smuzhiyun * vmw_du_cursor_plane_prepare_fb - Readies the cursor by referencing it
341*4882a593Smuzhiyun *
342*4882a593Smuzhiyun * @plane: display plane
343*4882a593Smuzhiyun * @new_state: info on the new plane state, including the FB
344*4882a593Smuzhiyun *
345*4882a593Smuzhiyun * Returns 0 on success
346*4882a593Smuzhiyun */
347*4882a593Smuzhiyun int
vmw_du_cursor_plane_prepare_fb(struct drm_plane * plane,struct drm_plane_state * new_state)348*4882a593Smuzhiyun vmw_du_cursor_plane_prepare_fb(struct drm_plane *plane,
349*4882a593Smuzhiyun struct drm_plane_state *new_state)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun struct drm_framebuffer *fb = new_state->fb;
352*4882a593Smuzhiyun struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun if (vps->surf)
356*4882a593Smuzhiyun vmw_surface_unreference(&vps->surf);
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun if (vps->bo)
359*4882a593Smuzhiyun vmw_bo_unreference(&vps->bo);
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun if (fb) {
362*4882a593Smuzhiyun if (vmw_framebuffer_to_vfb(fb)->bo) {
363*4882a593Smuzhiyun vps->bo = vmw_framebuffer_to_vfbd(fb)->buffer;
364*4882a593Smuzhiyun vmw_bo_reference(vps->bo);
365*4882a593Smuzhiyun } else {
366*4882a593Smuzhiyun vps->surf = vmw_framebuffer_to_vfbs(fb)->surface;
367*4882a593Smuzhiyun vmw_surface_reference(vps->surf);
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun return 0;
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun void
vmw_du_cursor_plane_atomic_update(struct drm_plane * plane,struct drm_plane_state * old_state)376*4882a593Smuzhiyun vmw_du_cursor_plane_atomic_update(struct drm_plane *plane,
377*4882a593Smuzhiyun struct drm_plane_state *old_state)
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc;
380*4882a593Smuzhiyun struct vmw_private *dev_priv = vmw_priv(crtc->dev);
381*4882a593Smuzhiyun struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
382*4882a593Smuzhiyun struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state);
383*4882a593Smuzhiyun s32 hotspot_x, hotspot_y;
384*4882a593Smuzhiyun int ret = 0;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun hotspot_x = du->hotspot_x;
388*4882a593Smuzhiyun hotspot_y = du->hotspot_y;
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun if (plane->state->fb) {
391*4882a593Smuzhiyun hotspot_x += plane->state->fb->hot_x;
392*4882a593Smuzhiyun hotspot_y += plane->state->fb->hot_y;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun du->cursor_surface = vps->surf;
396*4882a593Smuzhiyun du->cursor_bo = vps->bo;
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun if (vps->surf) {
399*4882a593Smuzhiyun du->cursor_age = du->cursor_surface->snooper.age;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun ret = vmw_cursor_update_image(dev_priv,
402*4882a593Smuzhiyun vps->surf->snooper.image,
403*4882a593Smuzhiyun 64, 64, hotspot_x,
404*4882a593Smuzhiyun hotspot_y);
405*4882a593Smuzhiyun } else if (vps->bo) {
406*4882a593Smuzhiyun ret = vmw_cursor_update_bo(dev_priv, vps->bo,
407*4882a593Smuzhiyun plane->state->crtc_w,
408*4882a593Smuzhiyun plane->state->crtc_h,
409*4882a593Smuzhiyun hotspot_x, hotspot_y);
410*4882a593Smuzhiyun } else {
411*4882a593Smuzhiyun vmw_cursor_update_position(dev_priv, false, 0, 0);
412*4882a593Smuzhiyun return;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun if (!ret) {
416*4882a593Smuzhiyun du->cursor_x = plane->state->crtc_x + du->set_gui_x;
417*4882a593Smuzhiyun du->cursor_y = plane->state->crtc_y + du->set_gui_y;
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun vmw_cursor_update_position(dev_priv, true,
420*4882a593Smuzhiyun du->cursor_x + hotspot_x,
421*4882a593Smuzhiyun du->cursor_y + hotspot_y);
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun du->core_hotspot_x = hotspot_x - du->hotspot_x;
424*4882a593Smuzhiyun du->core_hotspot_y = hotspot_y - du->hotspot_y;
425*4882a593Smuzhiyun } else {
426*4882a593Smuzhiyun DRM_ERROR("Failed to update cursor image\n");
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun /**
432*4882a593Smuzhiyun * vmw_du_primary_plane_atomic_check - check if the new state is okay
433*4882a593Smuzhiyun *
434*4882a593Smuzhiyun * @plane: display plane
435*4882a593Smuzhiyun * @state: info on the new plane state, including the FB
436*4882a593Smuzhiyun *
437*4882a593Smuzhiyun * Check if the new state is settable given the current state. Other
438*4882a593Smuzhiyun * than what the atomic helper checks, we care about crtc fitting
439*4882a593Smuzhiyun * the FB and maintaining one active framebuffer.
440*4882a593Smuzhiyun *
441*4882a593Smuzhiyun * Returns 0 on success
442*4882a593Smuzhiyun */
vmw_du_primary_plane_atomic_check(struct drm_plane * plane,struct drm_plane_state * state)443*4882a593Smuzhiyun int vmw_du_primary_plane_atomic_check(struct drm_plane *plane,
444*4882a593Smuzhiyun struct drm_plane_state *state)
445*4882a593Smuzhiyun {
446*4882a593Smuzhiyun struct drm_crtc_state *crtc_state = NULL;
447*4882a593Smuzhiyun struct drm_framebuffer *new_fb = state->fb;
448*4882a593Smuzhiyun int ret;
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun if (state->crtc)
451*4882a593Smuzhiyun crtc_state = drm_atomic_get_new_crtc_state(state->state, state->crtc);
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun ret = drm_atomic_helper_check_plane_state(state, crtc_state,
454*4882a593Smuzhiyun DRM_PLANE_HELPER_NO_SCALING,
455*4882a593Smuzhiyun DRM_PLANE_HELPER_NO_SCALING,
456*4882a593Smuzhiyun false, true);
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun if (!ret && new_fb) {
459*4882a593Smuzhiyun struct drm_crtc *crtc = state->crtc;
460*4882a593Smuzhiyun struct vmw_connector_state *vcs;
461*4882a593Smuzhiyun struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun vcs = vmw_connector_state_to_vcs(du->connector.state);
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun return ret;
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun /**
472*4882a593Smuzhiyun * vmw_du_cursor_plane_atomic_check - check if the new state is okay
473*4882a593Smuzhiyun *
474*4882a593Smuzhiyun * @plane: cursor plane
475*4882a593Smuzhiyun * @state: info on the new plane state
476*4882a593Smuzhiyun *
477*4882a593Smuzhiyun * This is a chance to fail if the new cursor state does not fit
478*4882a593Smuzhiyun * our requirements.
479*4882a593Smuzhiyun *
480*4882a593Smuzhiyun * Returns 0 on success
481*4882a593Smuzhiyun */
vmw_du_cursor_plane_atomic_check(struct drm_plane * plane,struct drm_plane_state * new_state)482*4882a593Smuzhiyun int vmw_du_cursor_plane_atomic_check(struct drm_plane *plane,
483*4882a593Smuzhiyun struct drm_plane_state *new_state)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun int ret = 0;
486*4882a593Smuzhiyun struct drm_crtc_state *crtc_state = NULL;
487*4882a593Smuzhiyun struct vmw_surface *surface = NULL;
488*4882a593Smuzhiyun struct drm_framebuffer *fb = new_state->fb;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun if (new_state->crtc)
491*4882a593Smuzhiyun crtc_state = drm_atomic_get_new_crtc_state(new_state->state,
492*4882a593Smuzhiyun new_state->crtc);
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun ret = drm_atomic_helper_check_plane_state(new_state, crtc_state,
495*4882a593Smuzhiyun DRM_PLANE_HELPER_NO_SCALING,
496*4882a593Smuzhiyun DRM_PLANE_HELPER_NO_SCALING,
497*4882a593Smuzhiyun true, true);
498*4882a593Smuzhiyun if (ret)
499*4882a593Smuzhiyun return ret;
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun /* Turning off */
502*4882a593Smuzhiyun if (!fb)
503*4882a593Smuzhiyun return 0;
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun /* A lot of the code assumes this */
506*4882a593Smuzhiyun if (new_state->crtc_w != 64 || new_state->crtc_h != 64) {
507*4882a593Smuzhiyun DRM_ERROR("Invalid cursor dimensions (%d, %d)\n",
508*4882a593Smuzhiyun new_state->crtc_w, new_state->crtc_h);
509*4882a593Smuzhiyun ret = -EINVAL;
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun if (!vmw_framebuffer_to_vfb(fb)->bo)
513*4882a593Smuzhiyun surface = vmw_framebuffer_to_vfbs(fb)->surface;
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun if (surface && !surface->snooper.image) {
516*4882a593Smuzhiyun DRM_ERROR("surface not suitable for cursor\n");
517*4882a593Smuzhiyun ret = -EINVAL;
518*4882a593Smuzhiyun }
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun return ret;
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun
vmw_du_crtc_atomic_check(struct drm_crtc * crtc,struct drm_crtc_state * new_state)524*4882a593Smuzhiyun int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
525*4882a593Smuzhiyun struct drm_crtc_state *new_state)
526*4882a593Smuzhiyun {
527*4882a593Smuzhiyun struct vmw_display_unit *du = vmw_crtc_to_du(new_state->crtc);
528*4882a593Smuzhiyun int connector_mask = drm_connector_mask(&du->connector);
529*4882a593Smuzhiyun bool has_primary = new_state->plane_mask &
530*4882a593Smuzhiyun drm_plane_mask(crtc->primary);
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun /* We always want to have an active plane with an active CRTC */
533*4882a593Smuzhiyun if (has_primary != new_state->enable)
534*4882a593Smuzhiyun return -EINVAL;
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun if (new_state->connector_mask != connector_mask &&
538*4882a593Smuzhiyun new_state->connector_mask != 0) {
539*4882a593Smuzhiyun DRM_ERROR("Invalid connectors configuration\n");
540*4882a593Smuzhiyun return -EINVAL;
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun /*
544*4882a593Smuzhiyun * Our virtual device does not have a dot clock, so use the logical
545*4882a593Smuzhiyun * clock value as the dot clock.
546*4882a593Smuzhiyun */
547*4882a593Smuzhiyun if (new_state->mode.crtc_clock == 0)
548*4882a593Smuzhiyun new_state->adjusted_mode.crtc_clock = new_state->mode.clock;
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun return 0;
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun
vmw_du_crtc_atomic_begin(struct drm_crtc * crtc,struct drm_crtc_state * old_crtc_state)554*4882a593Smuzhiyun void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,
555*4882a593Smuzhiyun struct drm_crtc_state *old_crtc_state)
556*4882a593Smuzhiyun {
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun
vmw_du_crtc_atomic_flush(struct drm_crtc * crtc,struct drm_crtc_state * old_crtc_state)560*4882a593Smuzhiyun void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc,
561*4882a593Smuzhiyun struct drm_crtc_state *old_crtc_state)
562*4882a593Smuzhiyun {
563*4882a593Smuzhiyun struct drm_pending_vblank_event *event = crtc->state->event;
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun if (event) {
566*4882a593Smuzhiyun crtc->state->event = NULL;
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun spin_lock_irq(&crtc->dev->event_lock);
569*4882a593Smuzhiyun drm_crtc_send_vblank_event(crtc, event);
570*4882a593Smuzhiyun spin_unlock_irq(&crtc->dev->event_lock);
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun }
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun /**
576*4882a593Smuzhiyun * vmw_du_crtc_duplicate_state - duplicate crtc state
577*4882a593Smuzhiyun * @crtc: DRM crtc
578*4882a593Smuzhiyun *
579*4882a593Smuzhiyun * Allocates and returns a copy of the crtc state (both common and
580*4882a593Smuzhiyun * vmw-specific) for the specified crtc.
581*4882a593Smuzhiyun *
582*4882a593Smuzhiyun * Returns: The newly allocated crtc state, or NULL on failure.
583*4882a593Smuzhiyun */
584*4882a593Smuzhiyun struct drm_crtc_state *
vmw_du_crtc_duplicate_state(struct drm_crtc * crtc)585*4882a593Smuzhiyun vmw_du_crtc_duplicate_state(struct drm_crtc *crtc)
586*4882a593Smuzhiyun {
587*4882a593Smuzhiyun struct drm_crtc_state *state;
588*4882a593Smuzhiyun struct vmw_crtc_state *vcs;
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun if (WARN_ON(!crtc->state))
591*4882a593Smuzhiyun return NULL;
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun vcs = kmemdup(crtc->state, sizeof(*vcs), GFP_KERNEL);
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun if (!vcs)
596*4882a593Smuzhiyun return NULL;
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun state = &vcs->base;
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun __drm_atomic_helper_crtc_duplicate_state(crtc, state);
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun return state;
603*4882a593Smuzhiyun }
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun /**
607*4882a593Smuzhiyun * vmw_du_crtc_reset - creates a blank vmw crtc state
608*4882a593Smuzhiyun * @crtc: DRM crtc
609*4882a593Smuzhiyun *
610*4882a593Smuzhiyun * Resets the atomic state for @crtc by freeing the state pointer (which
611*4882a593Smuzhiyun * might be NULL, e.g. at driver load time) and allocating a new empty state
612*4882a593Smuzhiyun * object.
613*4882a593Smuzhiyun */
vmw_du_crtc_reset(struct drm_crtc * crtc)614*4882a593Smuzhiyun void vmw_du_crtc_reset(struct drm_crtc *crtc)
615*4882a593Smuzhiyun {
616*4882a593Smuzhiyun struct vmw_crtc_state *vcs;
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun if (crtc->state) {
620*4882a593Smuzhiyun __drm_atomic_helper_crtc_destroy_state(crtc->state);
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun kfree(vmw_crtc_state_to_vcs(crtc->state));
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun vcs = kzalloc(sizeof(*vcs), GFP_KERNEL);
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun if (!vcs) {
628*4882a593Smuzhiyun DRM_ERROR("Cannot allocate vmw_crtc_state\n");
629*4882a593Smuzhiyun return;
630*4882a593Smuzhiyun }
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun __drm_atomic_helper_crtc_reset(crtc, &vcs->base);
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun /**
637*4882a593Smuzhiyun * vmw_du_crtc_destroy_state - destroy crtc state
638*4882a593Smuzhiyun * @crtc: DRM crtc
639*4882a593Smuzhiyun * @state: state object to destroy
640*4882a593Smuzhiyun *
641*4882a593Smuzhiyun * Destroys the crtc state (both common and vmw-specific) for the
642*4882a593Smuzhiyun * specified plane.
643*4882a593Smuzhiyun */
644*4882a593Smuzhiyun void
vmw_du_crtc_destroy_state(struct drm_crtc * crtc,struct drm_crtc_state * state)645*4882a593Smuzhiyun vmw_du_crtc_destroy_state(struct drm_crtc *crtc,
646*4882a593Smuzhiyun struct drm_crtc_state *state)
647*4882a593Smuzhiyun {
648*4882a593Smuzhiyun drm_atomic_helper_crtc_destroy_state(crtc, state);
649*4882a593Smuzhiyun }
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun /**
653*4882a593Smuzhiyun * vmw_du_plane_duplicate_state - duplicate plane state
654*4882a593Smuzhiyun * @plane: drm plane
655*4882a593Smuzhiyun *
656*4882a593Smuzhiyun * Allocates and returns a copy of the plane state (both common and
657*4882a593Smuzhiyun * vmw-specific) for the specified plane.
658*4882a593Smuzhiyun *
659*4882a593Smuzhiyun * Returns: The newly allocated plane state, or NULL on failure.
660*4882a593Smuzhiyun */
661*4882a593Smuzhiyun struct drm_plane_state *
vmw_du_plane_duplicate_state(struct drm_plane * plane)662*4882a593Smuzhiyun vmw_du_plane_duplicate_state(struct drm_plane *plane)
663*4882a593Smuzhiyun {
664*4882a593Smuzhiyun struct drm_plane_state *state;
665*4882a593Smuzhiyun struct vmw_plane_state *vps;
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun vps = kmemdup(plane->state, sizeof(*vps), GFP_KERNEL);
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun if (!vps)
670*4882a593Smuzhiyun return NULL;
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun vps->pinned = 0;
673*4882a593Smuzhiyun vps->cpp = 0;
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun /* Each ref counted resource needs to be acquired again */
676*4882a593Smuzhiyun if (vps->surf)
677*4882a593Smuzhiyun (void) vmw_surface_reference(vps->surf);
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun if (vps->bo)
680*4882a593Smuzhiyun (void) vmw_bo_reference(vps->bo);
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun state = &vps->base;
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun __drm_atomic_helper_plane_duplicate_state(plane, state);
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun return state;
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun /**
691*4882a593Smuzhiyun * vmw_du_plane_reset - creates a blank vmw plane state
692*4882a593Smuzhiyun * @plane: drm plane
693*4882a593Smuzhiyun *
694*4882a593Smuzhiyun * Resets the atomic state for @plane by freeing the state pointer (which might
695*4882a593Smuzhiyun * be NULL, e.g. at driver load time) and allocating a new empty state object.
696*4882a593Smuzhiyun */
vmw_du_plane_reset(struct drm_plane * plane)697*4882a593Smuzhiyun void vmw_du_plane_reset(struct drm_plane *plane)
698*4882a593Smuzhiyun {
699*4882a593Smuzhiyun struct vmw_plane_state *vps;
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun if (plane->state)
703*4882a593Smuzhiyun vmw_du_plane_destroy_state(plane, plane->state);
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun vps = kzalloc(sizeof(*vps), GFP_KERNEL);
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun if (!vps) {
708*4882a593Smuzhiyun DRM_ERROR("Cannot allocate vmw_plane_state\n");
709*4882a593Smuzhiyun return;
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun __drm_atomic_helper_plane_reset(plane, &vps->base);
713*4882a593Smuzhiyun }
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun /**
717*4882a593Smuzhiyun * vmw_du_plane_destroy_state - destroy plane state
718*4882a593Smuzhiyun * @plane: DRM plane
719*4882a593Smuzhiyun * @state: state object to destroy
720*4882a593Smuzhiyun *
721*4882a593Smuzhiyun * Destroys the plane state (both common and vmw-specific) for the
722*4882a593Smuzhiyun * specified plane.
723*4882a593Smuzhiyun */
724*4882a593Smuzhiyun void
vmw_du_plane_destroy_state(struct drm_plane * plane,struct drm_plane_state * state)725*4882a593Smuzhiyun vmw_du_plane_destroy_state(struct drm_plane *plane,
726*4882a593Smuzhiyun struct drm_plane_state *state)
727*4882a593Smuzhiyun {
728*4882a593Smuzhiyun struct vmw_plane_state *vps = vmw_plane_state_to_vps(state);
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun /* Should have been freed by cleanup_fb */
732*4882a593Smuzhiyun if (vps->surf)
733*4882a593Smuzhiyun vmw_surface_unreference(&vps->surf);
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun if (vps->bo)
736*4882a593Smuzhiyun vmw_bo_unreference(&vps->bo);
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun drm_atomic_helper_plane_destroy_state(plane, state);
739*4882a593Smuzhiyun }
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun /**
743*4882a593Smuzhiyun * vmw_du_connector_duplicate_state - duplicate connector state
744*4882a593Smuzhiyun * @connector: DRM connector
745*4882a593Smuzhiyun *
746*4882a593Smuzhiyun * Allocates and returns a copy of the connector state (both common and
747*4882a593Smuzhiyun * vmw-specific) for the specified connector.
748*4882a593Smuzhiyun *
749*4882a593Smuzhiyun * Returns: The newly allocated connector state, or NULL on failure.
750*4882a593Smuzhiyun */
751*4882a593Smuzhiyun struct drm_connector_state *
vmw_du_connector_duplicate_state(struct drm_connector * connector)752*4882a593Smuzhiyun vmw_du_connector_duplicate_state(struct drm_connector *connector)
753*4882a593Smuzhiyun {
754*4882a593Smuzhiyun struct drm_connector_state *state;
755*4882a593Smuzhiyun struct vmw_connector_state *vcs;
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun if (WARN_ON(!connector->state))
758*4882a593Smuzhiyun return NULL;
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun vcs = kmemdup(connector->state, sizeof(*vcs), GFP_KERNEL);
761*4882a593Smuzhiyun
762*4882a593Smuzhiyun if (!vcs)
763*4882a593Smuzhiyun return NULL;
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun state = &vcs->base;
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun __drm_atomic_helper_connector_duplicate_state(connector, state);
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun return state;
770*4882a593Smuzhiyun }
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun /**
774*4882a593Smuzhiyun * vmw_du_connector_reset - creates a blank vmw connector state
775*4882a593Smuzhiyun * @connector: DRM connector
776*4882a593Smuzhiyun *
777*4882a593Smuzhiyun * Resets the atomic state for @connector by freeing the state pointer (which
778*4882a593Smuzhiyun * might be NULL, e.g. at driver load time) and allocating a new empty state
779*4882a593Smuzhiyun * object.
780*4882a593Smuzhiyun */
vmw_du_connector_reset(struct drm_connector * connector)781*4882a593Smuzhiyun void vmw_du_connector_reset(struct drm_connector *connector)
782*4882a593Smuzhiyun {
783*4882a593Smuzhiyun struct vmw_connector_state *vcs;
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun if (connector->state) {
787*4882a593Smuzhiyun __drm_atomic_helper_connector_destroy_state(connector->state);
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun kfree(vmw_connector_state_to_vcs(connector->state));
790*4882a593Smuzhiyun }
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun vcs = kzalloc(sizeof(*vcs), GFP_KERNEL);
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun if (!vcs) {
795*4882a593Smuzhiyun DRM_ERROR("Cannot allocate vmw_connector_state\n");
796*4882a593Smuzhiyun return;
797*4882a593Smuzhiyun }
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun __drm_atomic_helper_connector_reset(connector, &vcs->base);
800*4882a593Smuzhiyun }
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun /**
804*4882a593Smuzhiyun * vmw_du_connector_destroy_state - destroy connector state
805*4882a593Smuzhiyun * @connector: DRM connector
806*4882a593Smuzhiyun * @state: state object to destroy
807*4882a593Smuzhiyun *
808*4882a593Smuzhiyun * Destroys the connector state (both common and vmw-specific) for the
809*4882a593Smuzhiyun * specified plane.
810*4882a593Smuzhiyun */
811*4882a593Smuzhiyun void
vmw_du_connector_destroy_state(struct drm_connector * connector,struct drm_connector_state * state)812*4882a593Smuzhiyun vmw_du_connector_destroy_state(struct drm_connector *connector,
813*4882a593Smuzhiyun struct drm_connector_state *state)
814*4882a593Smuzhiyun {
815*4882a593Smuzhiyun drm_atomic_helper_connector_destroy_state(connector, state);
816*4882a593Smuzhiyun }
817*4882a593Smuzhiyun /*
818*4882a593Smuzhiyun * Generic framebuffer code
819*4882a593Smuzhiyun */
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun /*
822*4882a593Smuzhiyun * Surface framebuffer code
823*4882a593Smuzhiyun */
824*4882a593Smuzhiyun
vmw_framebuffer_surface_destroy(struct drm_framebuffer * framebuffer)825*4882a593Smuzhiyun static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
826*4882a593Smuzhiyun {
827*4882a593Smuzhiyun struct vmw_framebuffer_surface *vfbs =
828*4882a593Smuzhiyun vmw_framebuffer_to_vfbs(framebuffer);
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun drm_framebuffer_cleanup(framebuffer);
831*4882a593Smuzhiyun vmw_surface_unreference(&vfbs->surface);
832*4882a593Smuzhiyun if (vfbs->base.user_obj)
833*4882a593Smuzhiyun ttm_base_object_unref(&vfbs->base.user_obj);
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun kfree(vfbs);
836*4882a593Smuzhiyun }
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun /**
839*4882a593Smuzhiyun * vmw_kms_readback - Perform a readback from the screen system to
840*4882a593Smuzhiyun * a buffer-object backed framebuffer.
841*4882a593Smuzhiyun *
842*4882a593Smuzhiyun * @dev_priv: Pointer to the device private structure.
843*4882a593Smuzhiyun * @file_priv: Pointer to a struct drm_file identifying the caller.
844*4882a593Smuzhiyun * Must be set to NULL if @user_fence_rep is NULL.
845*4882a593Smuzhiyun * @vfb: Pointer to the buffer-object backed framebuffer.
846*4882a593Smuzhiyun * @user_fence_rep: User-space provided structure for fence information.
847*4882a593Smuzhiyun * Must be set to non-NULL if @file_priv is non-NULL.
848*4882a593Smuzhiyun * @vclips: Array of clip rects.
849*4882a593Smuzhiyun * @num_clips: Number of clip rects in @vclips.
850*4882a593Smuzhiyun *
851*4882a593Smuzhiyun * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
852*4882a593Smuzhiyun * interrupted.
853*4882a593Smuzhiyun */
vmw_kms_readback(struct vmw_private * dev_priv,struct drm_file * file_priv,struct vmw_framebuffer * vfb,struct drm_vmw_fence_rep __user * user_fence_rep,struct drm_vmw_rect * vclips,uint32_t num_clips)854*4882a593Smuzhiyun int vmw_kms_readback(struct vmw_private *dev_priv,
855*4882a593Smuzhiyun struct drm_file *file_priv,
856*4882a593Smuzhiyun struct vmw_framebuffer *vfb,
857*4882a593Smuzhiyun struct drm_vmw_fence_rep __user *user_fence_rep,
858*4882a593Smuzhiyun struct drm_vmw_rect *vclips,
859*4882a593Smuzhiyun uint32_t num_clips)
860*4882a593Smuzhiyun {
861*4882a593Smuzhiyun switch (dev_priv->active_display_unit) {
862*4882a593Smuzhiyun case vmw_du_screen_object:
863*4882a593Smuzhiyun return vmw_kms_sou_readback(dev_priv, file_priv, vfb,
864*4882a593Smuzhiyun user_fence_rep, vclips, num_clips,
865*4882a593Smuzhiyun NULL);
866*4882a593Smuzhiyun case vmw_du_screen_target:
867*4882a593Smuzhiyun return vmw_kms_stdu_dma(dev_priv, file_priv, vfb,
868*4882a593Smuzhiyun user_fence_rep, NULL, vclips, num_clips,
869*4882a593Smuzhiyun 1, false, true, NULL);
870*4882a593Smuzhiyun default:
871*4882a593Smuzhiyun WARN_ONCE(true,
872*4882a593Smuzhiyun "Readback called with invalid display system.\n");
873*4882a593Smuzhiyun }
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun return -ENOSYS;
876*4882a593Smuzhiyun }
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun static const struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
880*4882a593Smuzhiyun .destroy = vmw_framebuffer_surface_destroy,
881*4882a593Smuzhiyun .dirty = drm_atomic_helper_dirtyfb,
882*4882a593Smuzhiyun };
883*4882a593Smuzhiyun
vmw_kms_new_framebuffer_surface(struct vmw_private * dev_priv,struct vmw_surface * surface,struct vmw_framebuffer ** out,const struct drm_mode_fb_cmd2 * mode_cmd,bool is_bo_proxy)884*4882a593Smuzhiyun static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
885*4882a593Smuzhiyun struct vmw_surface *surface,
886*4882a593Smuzhiyun struct vmw_framebuffer **out,
887*4882a593Smuzhiyun const struct drm_mode_fb_cmd2
888*4882a593Smuzhiyun *mode_cmd,
889*4882a593Smuzhiyun bool is_bo_proxy)
890*4882a593Smuzhiyun
891*4882a593Smuzhiyun {
892*4882a593Smuzhiyun struct drm_device *dev = dev_priv->dev;
893*4882a593Smuzhiyun struct vmw_framebuffer_surface *vfbs;
894*4882a593Smuzhiyun enum SVGA3dSurfaceFormat format;
895*4882a593Smuzhiyun int ret;
896*4882a593Smuzhiyun struct drm_format_name_buf format_name;
897*4882a593Smuzhiyun
898*4882a593Smuzhiyun /* 3D is only supported on HWv8 and newer hosts */
899*4882a593Smuzhiyun if (dev_priv->active_display_unit == vmw_du_legacy)
900*4882a593Smuzhiyun return -ENOSYS;
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun /*
903*4882a593Smuzhiyun * Sanity checks.
904*4882a593Smuzhiyun */
905*4882a593Smuzhiyun
906*4882a593Smuzhiyun /* Surface must be marked as a scanout. */
907*4882a593Smuzhiyun if (unlikely(!surface->metadata.scanout))
908*4882a593Smuzhiyun return -EINVAL;
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun if (unlikely(surface->metadata.mip_levels[0] != 1 ||
911*4882a593Smuzhiyun surface->metadata.num_sizes != 1 ||
912*4882a593Smuzhiyun surface->metadata.base_size.width < mode_cmd->width ||
913*4882a593Smuzhiyun surface->metadata.base_size.height < mode_cmd->height ||
914*4882a593Smuzhiyun surface->metadata.base_size.depth != 1)) {
915*4882a593Smuzhiyun DRM_ERROR("Incompatible surface dimensions "
916*4882a593Smuzhiyun "for requested mode.\n");
917*4882a593Smuzhiyun return -EINVAL;
918*4882a593Smuzhiyun }
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun switch (mode_cmd->pixel_format) {
921*4882a593Smuzhiyun case DRM_FORMAT_ARGB8888:
922*4882a593Smuzhiyun format = SVGA3D_A8R8G8B8;
923*4882a593Smuzhiyun break;
924*4882a593Smuzhiyun case DRM_FORMAT_XRGB8888:
925*4882a593Smuzhiyun format = SVGA3D_X8R8G8B8;
926*4882a593Smuzhiyun break;
927*4882a593Smuzhiyun case DRM_FORMAT_RGB565:
928*4882a593Smuzhiyun format = SVGA3D_R5G6B5;
929*4882a593Smuzhiyun break;
930*4882a593Smuzhiyun case DRM_FORMAT_XRGB1555:
931*4882a593Smuzhiyun format = SVGA3D_A1R5G5B5;
932*4882a593Smuzhiyun break;
933*4882a593Smuzhiyun default:
934*4882a593Smuzhiyun DRM_ERROR("Invalid pixel format: %s\n",
935*4882a593Smuzhiyun drm_get_format_name(mode_cmd->pixel_format, &format_name));
936*4882a593Smuzhiyun return -EINVAL;
937*4882a593Smuzhiyun }
938*4882a593Smuzhiyun
939*4882a593Smuzhiyun /*
940*4882a593Smuzhiyun * For DX, surface format validation is done when surface->scanout
941*4882a593Smuzhiyun * is set.
942*4882a593Smuzhiyun */
943*4882a593Smuzhiyun if (!has_sm4_context(dev_priv) && format != surface->metadata.format) {
944*4882a593Smuzhiyun DRM_ERROR("Invalid surface format for requested mode.\n");
945*4882a593Smuzhiyun return -EINVAL;
946*4882a593Smuzhiyun }
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
949*4882a593Smuzhiyun if (!vfbs) {
950*4882a593Smuzhiyun ret = -ENOMEM;
951*4882a593Smuzhiyun goto out_err1;
952*4882a593Smuzhiyun }
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun drm_helper_mode_fill_fb_struct(dev, &vfbs->base.base, mode_cmd);
955*4882a593Smuzhiyun vfbs->surface = vmw_surface_reference(surface);
956*4882a593Smuzhiyun vfbs->base.user_handle = mode_cmd->handles[0];
957*4882a593Smuzhiyun vfbs->is_bo_proxy = is_bo_proxy;
958*4882a593Smuzhiyun
959*4882a593Smuzhiyun *out = &vfbs->base;
960*4882a593Smuzhiyun
961*4882a593Smuzhiyun ret = drm_framebuffer_init(dev, &vfbs->base.base,
962*4882a593Smuzhiyun &vmw_framebuffer_surface_funcs);
963*4882a593Smuzhiyun if (ret)
964*4882a593Smuzhiyun goto out_err2;
965*4882a593Smuzhiyun
966*4882a593Smuzhiyun return 0;
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun out_err2:
969*4882a593Smuzhiyun vmw_surface_unreference(&surface);
970*4882a593Smuzhiyun kfree(vfbs);
971*4882a593Smuzhiyun out_err1:
972*4882a593Smuzhiyun return ret;
973*4882a593Smuzhiyun }
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun /*
976*4882a593Smuzhiyun * Buffer-object framebuffer code
977*4882a593Smuzhiyun */
978*4882a593Smuzhiyun
vmw_framebuffer_bo_destroy(struct drm_framebuffer * framebuffer)979*4882a593Smuzhiyun static void vmw_framebuffer_bo_destroy(struct drm_framebuffer *framebuffer)
980*4882a593Smuzhiyun {
981*4882a593Smuzhiyun struct vmw_framebuffer_bo *vfbd =
982*4882a593Smuzhiyun vmw_framebuffer_to_vfbd(framebuffer);
983*4882a593Smuzhiyun
984*4882a593Smuzhiyun drm_framebuffer_cleanup(framebuffer);
985*4882a593Smuzhiyun vmw_bo_unreference(&vfbd->buffer);
986*4882a593Smuzhiyun if (vfbd->base.user_obj)
987*4882a593Smuzhiyun ttm_base_object_unref(&vfbd->base.user_obj);
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun kfree(vfbd);
990*4882a593Smuzhiyun }
991*4882a593Smuzhiyun
vmw_framebuffer_bo_dirty(struct drm_framebuffer * framebuffer,struct drm_file * file_priv,unsigned int flags,unsigned int color,struct drm_clip_rect * clips,unsigned int num_clips)992*4882a593Smuzhiyun static int vmw_framebuffer_bo_dirty(struct drm_framebuffer *framebuffer,
993*4882a593Smuzhiyun struct drm_file *file_priv,
994*4882a593Smuzhiyun unsigned int flags, unsigned int color,
995*4882a593Smuzhiyun struct drm_clip_rect *clips,
996*4882a593Smuzhiyun unsigned int num_clips)
997*4882a593Smuzhiyun {
998*4882a593Smuzhiyun struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
999*4882a593Smuzhiyun struct vmw_framebuffer_bo *vfbd =
1000*4882a593Smuzhiyun vmw_framebuffer_to_vfbd(framebuffer);
1001*4882a593Smuzhiyun struct drm_clip_rect norect;
1002*4882a593Smuzhiyun int ret, increment = 1;
1003*4882a593Smuzhiyun
1004*4882a593Smuzhiyun drm_modeset_lock_all(dev_priv->dev);
1005*4882a593Smuzhiyun
1006*4882a593Smuzhiyun ret = ttm_read_lock(&dev_priv->reservation_sem, true);
1007*4882a593Smuzhiyun if (unlikely(ret != 0)) {
1008*4882a593Smuzhiyun drm_modeset_unlock_all(dev_priv->dev);
1009*4882a593Smuzhiyun return ret;
1010*4882a593Smuzhiyun }
1011*4882a593Smuzhiyun
1012*4882a593Smuzhiyun if (!num_clips) {
1013*4882a593Smuzhiyun num_clips = 1;
1014*4882a593Smuzhiyun clips = &norect;
1015*4882a593Smuzhiyun norect.x1 = norect.y1 = 0;
1016*4882a593Smuzhiyun norect.x2 = framebuffer->width;
1017*4882a593Smuzhiyun norect.y2 = framebuffer->height;
1018*4882a593Smuzhiyun } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
1019*4882a593Smuzhiyun num_clips /= 2;
1020*4882a593Smuzhiyun increment = 2;
1021*4882a593Smuzhiyun }
1022*4882a593Smuzhiyun
1023*4882a593Smuzhiyun switch (dev_priv->active_display_unit) {
1024*4882a593Smuzhiyun case vmw_du_legacy:
1025*4882a593Smuzhiyun ret = vmw_kms_ldu_do_bo_dirty(dev_priv, &vfbd->base, 0, 0,
1026*4882a593Smuzhiyun clips, num_clips, increment);
1027*4882a593Smuzhiyun break;
1028*4882a593Smuzhiyun default:
1029*4882a593Smuzhiyun ret = -EINVAL;
1030*4882a593Smuzhiyun WARN_ONCE(true, "Dirty called with invalid display system.\n");
1031*4882a593Smuzhiyun break;
1032*4882a593Smuzhiyun }
1033*4882a593Smuzhiyun
1034*4882a593Smuzhiyun vmw_fifo_flush(dev_priv, false);
1035*4882a593Smuzhiyun ttm_read_unlock(&dev_priv->reservation_sem);
1036*4882a593Smuzhiyun
1037*4882a593Smuzhiyun drm_modeset_unlock_all(dev_priv->dev);
1038*4882a593Smuzhiyun
1039*4882a593Smuzhiyun return ret;
1040*4882a593Smuzhiyun }
1041*4882a593Smuzhiyun
vmw_framebuffer_bo_dirty_ext(struct drm_framebuffer * framebuffer,struct drm_file * file_priv,unsigned int flags,unsigned int color,struct drm_clip_rect * clips,unsigned int num_clips)1042*4882a593Smuzhiyun static int vmw_framebuffer_bo_dirty_ext(struct drm_framebuffer *framebuffer,
1043*4882a593Smuzhiyun struct drm_file *file_priv,
1044*4882a593Smuzhiyun unsigned int flags, unsigned int color,
1045*4882a593Smuzhiyun struct drm_clip_rect *clips,
1046*4882a593Smuzhiyun unsigned int num_clips)
1047*4882a593Smuzhiyun {
1048*4882a593Smuzhiyun struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
1049*4882a593Smuzhiyun
1050*4882a593Smuzhiyun if (dev_priv->active_display_unit == vmw_du_legacy)
1051*4882a593Smuzhiyun return vmw_framebuffer_bo_dirty(framebuffer, file_priv, flags,
1052*4882a593Smuzhiyun color, clips, num_clips);
1053*4882a593Smuzhiyun
1054*4882a593Smuzhiyun return drm_atomic_helper_dirtyfb(framebuffer, file_priv, flags, color,
1055*4882a593Smuzhiyun clips, num_clips);
1056*4882a593Smuzhiyun }
1057*4882a593Smuzhiyun
1058*4882a593Smuzhiyun static const struct drm_framebuffer_funcs vmw_framebuffer_bo_funcs = {
1059*4882a593Smuzhiyun .destroy = vmw_framebuffer_bo_destroy,
1060*4882a593Smuzhiyun .dirty = vmw_framebuffer_bo_dirty_ext,
1061*4882a593Smuzhiyun };
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun /**
1064*4882a593Smuzhiyun * Pin the bofer in a location suitable for access by the
1065*4882a593Smuzhiyun * display system.
1066*4882a593Smuzhiyun */
vmw_framebuffer_pin(struct vmw_framebuffer * vfb)1067*4882a593Smuzhiyun static int vmw_framebuffer_pin(struct vmw_framebuffer *vfb)
1068*4882a593Smuzhiyun {
1069*4882a593Smuzhiyun struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
1070*4882a593Smuzhiyun struct vmw_buffer_object *buf;
1071*4882a593Smuzhiyun struct ttm_placement *placement;
1072*4882a593Smuzhiyun int ret;
1073*4882a593Smuzhiyun
1074*4882a593Smuzhiyun buf = vfb->bo ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
1075*4882a593Smuzhiyun vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
1076*4882a593Smuzhiyun
1077*4882a593Smuzhiyun if (!buf)
1078*4882a593Smuzhiyun return 0;
1079*4882a593Smuzhiyun
1080*4882a593Smuzhiyun switch (dev_priv->active_display_unit) {
1081*4882a593Smuzhiyun case vmw_du_legacy:
1082*4882a593Smuzhiyun vmw_overlay_pause_all(dev_priv);
1083*4882a593Smuzhiyun ret = vmw_bo_pin_in_start_of_vram(dev_priv, buf, false);
1084*4882a593Smuzhiyun vmw_overlay_resume_all(dev_priv);
1085*4882a593Smuzhiyun break;
1086*4882a593Smuzhiyun case vmw_du_screen_object:
1087*4882a593Smuzhiyun case vmw_du_screen_target:
1088*4882a593Smuzhiyun if (vfb->bo) {
1089*4882a593Smuzhiyun if (dev_priv->capabilities & SVGA_CAP_3D) {
1090*4882a593Smuzhiyun /*
1091*4882a593Smuzhiyun * Use surface DMA to get content to
1092*4882a593Smuzhiyun * sreen target surface.
1093*4882a593Smuzhiyun */
1094*4882a593Smuzhiyun placement = &vmw_vram_gmr_placement;
1095*4882a593Smuzhiyun } else {
1096*4882a593Smuzhiyun /* Use CPU blit. */
1097*4882a593Smuzhiyun placement = &vmw_sys_placement;
1098*4882a593Smuzhiyun }
1099*4882a593Smuzhiyun } else {
1100*4882a593Smuzhiyun /* Use surface / image update */
1101*4882a593Smuzhiyun placement = &vmw_mob_placement;
1102*4882a593Smuzhiyun }
1103*4882a593Smuzhiyun
1104*4882a593Smuzhiyun return vmw_bo_pin_in_placement(dev_priv, buf, placement, false);
1105*4882a593Smuzhiyun default:
1106*4882a593Smuzhiyun return -EINVAL;
1107*4882a593Smuzhiyun }
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun return ret;
1110*4882a593Smuzhiyun }
1111*4882a593Smuzhiyun
vmw_framebuffer_unpin(struct vmw_framebuffer * vfb)1112*4882a593Smuzhiyun static int vmw_framebuffer_unpin(struct vmw_framebuffer *vfb)
1113*4882a593Smuzhiyun {
1114*4882a593Smuzhiyun struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
1115*4882a593Smuzhiyun struct vmw_buffer_object *buf;
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun buf = vfb->bo ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
1118*4882a593Smuzhiyun vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
1119*4882a593Smuzhiyun
1120*4882a593Smuzhiyun if (WARN_ON(!buf))
1121*4882a593Smuzhiyun return 0;
1122*4882a593Smuzhiyun
1123*4882a593Smuzhiyun return vmw_bo_unpin(dev_priv, buf, false);
1124*4882a593Smuzhiyun }
1125*4882a593Smuzhiyun
1126*4882a593Smuzhiyun /**
1127*4882a593Smuzhiyun * vmw_create_bo_proxy - create a proxy surface for the buffer object
1128*4882a593Smuzhiyun *
1129*4882a593Smuzhiyun * @dev: DRM device
1130*4882a593Smuzhiyun * @mode_cmd: parameters for the new surface
1131*4882a593Smuzhiyun * @bo_mob: MOB backing the buffer object
1132*4882a593Smuzhiyun * @srf_out: newly created surface
1133*4882a593Smuzhiyun *
1134*4882a593Smuzhiyun * When the content FB is a buffer object, we create a surface as a proxy to the
1135*4882a593Smuzhiyun * same buffer. This way we can do a surface copy rather than a surface DMA.
1136*4882a593Smuzhiyun * This is a more efficient approach
1137*4882a593Smuzhiyun *
1138*4882a593Smuzhiyun * RETURNS:
1139*4882a593Smuzhiyun * 0 on success, error code otherwise
1140*4882a593Smuzhiyun */
vmw_create_bo_proxy(struct drm_device * dev,const struct drm_mode_fb_cmd2 * mode_cmd,struct vmw_buffer_object * bo_mob,struct vmw_surface ** srf_out)1141*4882a593Smuzhiyun static int vmw_create_bo_proxy(struct drm_device *dev,
1142*4882a593Smuzhiyun const struct drm_mode_fb_cmd2 *mode_cmd,
1143*4882a593Smuzhiyun struct vmw_buffer_object *bo_mob,
1144*4882a593Smuzhiyun struct vmw_surface **srf_out)
1145*4882a593Smuzhiyun {
1146*4882a593Smuzhiyun struct vmw_surface_metadata metadata = {0};
1147*4882a593Smuzhiyun uint32_t format;
1148*4882a593Smuzhiyun struct vmw_resource *res;
1149*4882a593Smuzhiyun unsigned int bytes_pp;
1150*4882a593Smuzhiyun struct drm_format_name_buf format_name;
1151*4882a593Smuzhiyun int ret;
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun switch (mode_cmd->pixel_format) {
1154*4882a593Smuzhiyun case DRM_FORMAT_ARGB8888:
1155*4882a593Smuzhiyun case DRM_FORMAT_XRGB8888:
1156*4882a593Smuzhiyun format = SVGA3D_X8R8G8B8;
1157*4882a593Smuzhiyun bytes_pp = 4;
1158*4882a593Smuzhiyun break;
1159*4882a593Smuzhiyun
1160*4882a593Smuzhiyun case DRM_FORMAT_RGB565:
1161*4882a593Smuzhiyun case DRM_FORMAT_XRGB1555:
1162*4882a593Smuzhiyun format = SVGA3D_R5G6B5;
1163*4882a593Smuzhiyun bytes_pp = 2;
1164*4882a593Smuzhiyun break;
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun case 8:
1167*4882a593Smuzhiyun format = SVGA3D_P8;
1168*4882a593Smuzhiyun bytes_pp = 1;
1169*4882a593Smuzhiyun break;
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun default:
1172*4882a593Smuzhiyun DRM_ERROR("Invalid framebuffer format %s\n",
1173*4882a593Smuzhiyun drm_get_format_name(mode_cmd->pixel_format, &format_name));
1174*4882a593Smuzhiyun return -EINVAL;
1175*4882a593Smuzhiyun }
1176*4882a593Smuzhiyun
1177*4882a593Smuzhiyun metadata.format = format;
1178*4882a593Smuzhiyun metadata.mip_levels[0] = 1;
1179*4882a593Smuzhiyun metadata.num_sizes = 1;
1180*4882a593Smuzhiyun metadata.base_size.width = mode_cmd->pitches[0] / bytes_pp;
1181*4882a593Smuzhiyun metadata.base_size.height = mode_cmd->height;
1182*4882a593Smuzhiyun metadata.base_size.depth = 1;
1183*4882a593Smuzhiyun metadata.scanout = true;
1184*4882a593Smuzhiyun
1185*4882a593Smuzhiyun ret = vmw_gb_surface_define(vmw_priv(dev), 0, &metadata, srf_out);
1186*4882a593Smuzhiyun if (ret) {
1187*4882a593Smuzhiyun DRM_ERROR("Failed to allocate proxy content buffer\n");
1188*4882a593Smuzhiyun return ret;
1189*4882a593Smuzhiyun }
1190*4882a593Smuzhiyun
1191*4882a593Smuzhiyun res = &(*srf_out)->res;
1192*4882a593Smuzhiyun
1193*4882a593Smuzhiyun /* Reserve and switch the backing mob. */
1194*4882a593Smuzhiyun mutex_lock(&res->dev_priv->cmdbuf_mutex);
1195*4882a593Smuzhiyun (void) vmw_resource_reserve(res, false, true);
1196*4882a593Smuzhiyun vmw_bo_unreference(&res->backup);
1197*4882a593Smuzhiyun res->backup = vmw_bo_reference(bo_mob);
1198*4882a593Smuzhiyun res->backup_offset = 0;
1199*4882a593Smuzhiyun vmw_resource_unreserve(res, false, false, false, NULL, 0);
1200*4882a593Smuzhiyun mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun return 0;
1203*4882a593Smuzhiyun }
1204*4882a593Smuzhiyun
1205*4882a593Smuzhiyun
1206*4882a593Smuzhiyun
vmw_kms_new_framebuffer_bo(struct vmw_private * dev_priv,struct vmw_buffer_object * bo,struct vmw_framebuffer ** out,const struct drm_mode_fb_cmd2 * mode_cmd)1207*4882a593Smuzhiyun static int vmw_kms_new_framebuffer_bo(struct vmw_private *dev_priv,
1208*4882a593Smuzhiyun struct vmw_buffer_object *bo,
1209*4882a593Smuzhiyun struct vmw_framebuffer **out,
1210*4882a593Smuzhiyun const struct drm_mode_fb_cmd2
1211*4882a593Smuzhiyun *mode_cmd)
1212*4882a593Smuzhiyun
1213*4882a593Smuzhiyun {
1214*4882a593Smuzhiyun struct drm_device *dev = dev_priv->dev;
1215*4882a593Smuzhiyun struct vmw_framebuffer_bo *vfbd;
1216*4882a593Smuzhiyun unsigned int requested_size;
1217*4882a593Smuzhiyun struct drm_format_name_buf format_name;
1218*4882a593Smuzhiyun int ret;
1219*4882a593Smuzhiyun
1220*4882a593Smuzhiyun requested_size = mode_cmd->height * mode_cmd->pitches[0];
1221*4882a593Smuzhiyun if (unlikely(requested_size > bo->base.num_pages * PAGE_SIZE)) {
1222*4882a593Smuzhiyun DRM_ERROR("Screen buffer object size is too small "
1223*4882a593Smuzhiyun "for requested mode.\n");
1224*4882a593Smuzhiyun return -EINVAL;
1225*4882a593Smuzhiyun }
1226*4882a593Smuzhiyun
1227*4882a593Smuzhiyun /* Limited framebuffer color depth support for screen objects */
1228*4882a593Smuzhiyun if (dev_priv->active_display_unit == vmw_du_screen_object) {
1229*4882a593Smuzhiyun switch (mode_cmd->pixel_format) {
1230*4882a593Smuzhiyun case DRM_FORMAT_XRGB8888:
1231*4882a593Smuzhiyun case DRM_FORMAT_ARGB8888:
1232*4882a593Smuzhiyun break;
1233*4882a593Smuzhiyun case DRM_FORMAT_XRGB1555:
1234*4882a593Smuzhiyun case DRM_FORMAT_RGB565:
1235*4882a593Smuzhiyun break;
1236*4882a593Smuzhiyun default:
1237*4882a593Smuzhiyun DRM_ERROR("Invalid pixel format: %s\n",
1238*4882a593Smuzhiyun drm_get_format_name(mode_cmd->pixel_format, &format_name));
1239*4882a593Smuzhiyun return -EINVAL;
1240*4882a593Smuzhiyun }
1241*4882a593Smuzhiyun }
1242*4882a593Smuzhiyun
1243*4882a593Smuzhiyun vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
1244*4882a593Smuzhiyun if (!vfbd) {
1245*4882a593Smuzhiyun ret = -ENOMEM;
1246*4882a593Smuzhiyun goto out_err1;
1247*4882a593Smuzhiyun }
1248*4882a593Smuzhiyun
1249*4882a593Smuzhiyun drm_helper_mode_fill_fb_struct(dev, &vfbd->base.base, mode_cmd);
1250*4882a593Smuzhiyun vfbd->base.bo = true;
1251*4882a593Smuzhiyun vfbd->buffer = vmw_bo_reference(bo);
1252*4882a593Smuzhiyun vfbd->base.user_handle = mode_cmd->handles[0];
1253*4882a593Smuzhiyun *out = &vfbd->base;
1254*4882a593Smuzhiyun
1255*4882a593Smuzhiyun ret = drm_framebuffer_init(dev, &vfbd->base.base,
1256*4882a593Smuzhiyun &vmw_framebuffer_bo_funcs);
1257*4882a593Smuzhiyun if (ret)
1258*4882a593Smuzhiyun goto out_err2;
1259*4882a593Smuzhiyun
1260*4882a593Smuzhiyun return 0;
1261*4882a593Smuzhiyun
1262*4882a593Smuzhiyun out_err2:
1263*4882a593Smuzhiyun vmw_bo_unreference(&bo);
1264*4882a593Smuzhiyun kfree(vfbd);
1265*4882a593Smuzhiyun out_err1:
1266*4882a593Smuzhiyun return ret;
1267*4882a593Smuzhiyun }
1268*4882a593Smuzhiyun
1269*4882a593Smuzhiyun
1270*4882a593Smuzhiyun /**
1271*4882a593Smuzhiyun * vmw_kms_srf_ok - check if a surface can be created
1272*4882a593Smuzhiyun *
1273*4882a593Smuzhiyun * @width: requested width
1274*4882a593Smuzhiyun * @height: requested height
1275*4882a593Smuzhiyun *
1276*4882a593Smuzhiyun * Surfaces need to be less than texture size
1277*4882a593Smuzhiyun */
1278*4882a593Smuzhiyun static bool
vmw_kms_srf_ok(struct vmw_private * dev_priv,uint32_t width,uint32_t height)1279*4882a593Smuzhiyun vmw_kms_srf_ok(struct vmw_private *dev_priv, uint32_t width, uint32_t height)
1280*4882a593Smuzhiyun {
1281*4882a593Smuzhiyun if (width > dev_priv->texture_max_width ||
1282*4882a593Smuzhiyun height > dev_priv->texture_max_height)
1283*4882a593Smuzhiyun return false;
1284*4882a593Smuzhiyun
1285*4882a593Smuzhiyun return true;
1286*4882a593Smuzhiyun }
1287*4882a593Smuzhiyun
1288*4882a593Smuzhiyun /**
1289*4882a593Smuzhiyun * vmw_kms_new_framebuffer - Create a new framebuffer.
1290*4882a593Smuzhiyun *
1291*4882a593Smuzhiyun * @dev_priv: Pointer to device private struct.
1292*4882a593Smuzhiyun * @bo: Pointer to buffer object to wrap the kms framebuffer around.
1293*4882a593Smuzhiyun * Either @bo or @surface must be NULL.
1294*4882a593Smuzhiyun * @surface: Pointer to a surface to wrap the kms framebuffer around.
1295*4882a593Smuzhiyun * Either @bo or @surface must be NULL.
1296*4882a593Smuzhiyun * @only_2d: No presents will occur to this buffer object based framebuffer.
1297*4882a593Smuzhiyun * This helps the code to do some important optimizations.
1298*4882a593Smuzhiyun * @mode_cmd: Frame-buffer metadata.
1299*4882a593Smuzhiyun */
1300*4882a593Smuzhiyun struct vmw_framebuffer *
vmw_kms_new_framebuffer(struct vmw_private * dev_priv,struct vmw_buffer_object * bo,struct vmw_surface * surface,bool only_2d,const struct drm_mode_fb_cmd2 * mode_cmd)1301*4882a593Smuzhiyun vmw_kms_new_framebuffer(struct vmw_private *dev_priv,
1302*4882a593Smuzhiyun struct vmw_buffer_object *bo,
1303*4882a593Smuzhiyun struct vmw_surface *surface,
1304*4882a593Smuzhiyun bool only_2d,
1305*4882a593Smuzhiyun const struct drm_mode_fb_cmd2 *mode_cmd)
1306*4882a593Smuzhiyun {
1307*4882a593Smuzhiyun struct vmw_framebuffer *vfb = NULL;
1308*4882a593Smuzhiyun bool is_bo_proxy = false;
1309*4882a593Smuzhiyun int ret;
1310*4882a593Smuzhiyun
1311*4882a593Smuzhiyun /*
1312*4882a593Smuzhiyun * We cannot use the SurfaceDMA command in an non-accelerated VM,
1313*4882a593Smuzhiyun * therefore, wrap the buffer object in a surface so we can use the
1314*4882a593Smuzhiyun * SurfaceCopy command.
1315*4882a593Smuzhiyun */
1316*4882a593Smuzhiyun if (vmw_kms_srf_ok(dev_priv, mode_cmd->width, mode_cmd->height) &&
1317*4882a593Smuzhiyun bo && only_2d &&
1318*4882a593Smuzhiyun mode_cmd->width > 64 && /* Don't create a proxy for cursor */
1319*4882a593Smuzhiyun dev_priv->active_display_unit == vmw_du_screen_target) {
1320*4882a593Smuzhiyun ret = vmw_create_bo_proxy(dev_priv->dev, mode_cmd,
1321*4882a593Smuzhiyun bo, &surface);
1322*4882a593Smuzhiyun if (ret)
1323*4882a593Smuzhiyun return ERR_PTR(ret);
1324*4882a593Smuzhiyun
1325*4882a593Smuzhiyun is_bo_proxy = true;
1326*4882a593Smuzhiyun }
1327*4882a593Smuzhiyun
1328*4882a593Smuzhiyun /* Create the new framebuffer depending one what we have */
1329*4882a593Smuzhiyun if (surface) {
1330*4882a593Smuzhiyun ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
1331*4882a593Smuzhiyun mode_cmd,
1332*4882a593Smuzhiyun is_bo_proxy);
1333*4882a593Smuzhiyun
1334*4882a593Smuzhiyun /*
1335*4882a593Smuzhiyun * vmw_create_bo_proxy() adds a reference that is no longer
1336*4882a593Smuzhiyun * needed
1337*4882a593Smuzhiyun */
1338*4882a593Smuzhiyun if (is_bo_proxy)
1339*4882a593Smuzhiyun vmw_surface_unreference(&surface);
1340*4882a593Smuzhiyun } else if (bo) {
1341*4882a593Smuzhiyun ret = vmw_kms_new_framebuffer_bo(dev_priv, bo, &vfb,
1342*4882a593Smuzhiyun mode_cmd);
1343*4882a593Smuzhiyun } else {
1344*4882a593Smuzhiyun BUG();
1345*4882a593Smuzhiyun }
1346*4882a593Smuzhiyun
1347*4882a593Smuzhiyun if (ret)
1348*4882a593Smuzhiyun return ERR_PTR(ret);
1349*4882a593Smuzhiyun
1350*4882a593Smuzhiyun vfb->pin = vmw_framebuffer_pin;
1351*4882a593Smuzhiyun vfb->unpin = vmw_framebuffer_unpin;
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun return vfb;
1354*4882a593Smuzhiyun }
1355*4882a593Smuzhiyun
1356*4882a593Smuzhiyun /*
1357*4882a593Smuzhiyun * Generic Kernel modesetting functions
1358*4882a593Smuzhiyun */
1359*4882a593Smuzhiyun
vmw_kms_fb_create(struct drm_device * dev,struct drm_file * file_priv,const struct drm_mode_fb_cmd2 * mode_cmd)1360*4882a593Smuzhiyun static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
1361*4882a593Smuzhiyun struct drm_file *file_priv,
1362*4882a593Smuzhiyun const struct drm_mode_fb_cmd2 *mode_cmd)
1363*4882a593Smuzhiyun {
1364*4882a593Smuzhiyun struct vmw_private *dev_priv = vmw_priv(dev);
1365*4882a593Smuzhiyun struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1366*4882a593Smuzhiyun struct vmw_framebuffer *vfb = NULL;
1367*4882a593Smuzhiyun struct vmw_surface *surface = NULL;
1368*4882a593Smuzhiyun struct vmw_buffer_object *bo = NULL;
1369*4882a593Smuzhiyun struct ttm_base_object *user_obj;
1370*4882a593Smuzhiyun int ret;
1371*4882a593Smuzhiyun
1372*4882a593Smuzhiyun /*
1373*4882a593Smuzhiyun * Take a reference on the user object of the resource
1374*4882a593Smuzhiyun * backing the kms fb. This ensures that user-space handle
1375*4882a593Smuzhiyun * lookups on that resource will always work as long as
1376*4882a593Smuzhiyun * it's registered with a kms framebuffer. This is important,
1377*4882a593Smuzhiyun * since vmw_execbuf_process identifies resources in the
1378*4882a593Smuzhiyun * command stream using user-space handles.
1379*4882a593Smuzhiyun */
1380*4882a593Smuzhiyun
1381*4882a593Smuzhiyun user_obj = ttm_base_object_lookup(tfile, mode_cmd->handles[0]);
1382*4882a593Smuzhiyun if (unlikely(user_obj == NULL)) {
1383*4882a593Smuzhiyun DRM_ERROR("Could not locate requested kms frame buffer.\n");
1384*4882a593Smuzhiyun return ERR_PTR(-ENOENT);
1385*4882a593Smuzhiyun }
1386*4882a593Smuzhiyun
1387*4882a593Smuzhiyun /**
1388*4882a593Smuzhiyun * End conditioned code.
1389*4882a593Smuzhiyun */
1390*4882a593Smuzhiyun
1391*4882a593Smuzhiyun /* returns either a bo or surface */
1392*4882a593Smuzhiyun ret = vmw_user_lookup_handle(dev_priv, tfile,
1393*4882a593Smuzhiyun mode_cmd->handles[0],
1394*4882a593Smuzhiyun &surface, &bo);
1395*4882a593Smuzhiyun if (ret)
1396*4882a593Smuzhiyun goto err_out;
1397*4882a593Smuzhiyun
1398*4882a593Smuzhiyun
1399*4882a593Smuzhiyun if (!bo &&
1400*4882a593Smuzhiyun !vmw_kms_srf_ok(dev_priv, mode_cmd->width, mode_cmd->height)) {
1401*4882a593Smuzhiyun DRM_ERROR("Surface size cannot exceed %dx%d",
1402*4882a593Smuzhiyun dev_priv->texture_max_width,
1403*4882a593Smuzhiyun dev_priv->texture_max_height);
1404*4882a593Smuzhiyun goto err_out;
1405*4882a593Smuzhiyun }
1406*4882a593Smuzhiyun
1407*4882a593Smuzhiyun
1408*4882a593Smuzhiyun vfb = vmw_kms_new_framebuffer(dev_priv, bo, surface,
1409*4882a593Smuzhiyun !(dev_priv->capabilities & SVGA_CAP_3D),
1410*4882a593Smuzhiyun mode_cmd);
1411*4882a593Smuzhiyun if (IS_ERR(vfb)) {
1412*4882a593Smuzhiyun ret = PTR_ERR(vfb);
1413*4882a593Smuzhiyun goto err_out;
1414*4882a593Smuzhiyun }
1415*4882a593Smuzhiyun
1416*4882a593Smuzhiyun err_out:
1417*4882a593Smuzhiyun /* vmw_user_lookup_handle takes one ref so does new_fb */
1418*4882a593Smuzhiyun if (bo)
1419*4882a593Smuzhiyun vmw_bo_unreference(&bo);
1420*4882a593Smuzhiyun if (surface)
1421*4882a593Smuzhiyun vmw_surface_unreference(&surface);
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun if (ret) {
1424*4882a593Smuzhiyun DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1425*4882a593Smuzhiyun ttm_base_object_unref(&user_obj);
1426*4882a593Smuzhiyun return ERR_PTR(ret);
1427*4882a593Smuzhiyun } else
1428*4882a593Smuzhiyun vfb->user_obj = user_obj;
1429*4882a593Smuzhiyun
1430*4882a593Smuzhiyun return &vfb->base;
1431*4882a593Smuzhiyun }
1432*4882a593Smuzhiyun
1433*4882a593Smuzhiyun /**
1434*4882a593Smuzhiyun * vmw_kms_check_display_memory - Validates display memory required for a
1435*4882a593Smuzhiyun * topology
1436*4882a593Smuzhiyun * @dev: DRM device
1437*4882a593Smuzhiyun * @num_rects: number of drm_rect in rects
1438*4882a593Smuzhiyun * @rects: array of drm_rect representing the topology to validate indexed by
1439*4882a593Smuzhiyun * crtc index.
1440*4882a593Smuzhiyun *
1441*4882a593Smuzhiyun * Returns:
1442*4882a593Smuzhiyun * 0 on success otherwise negative error code
1443*4882a593Smuzhiyun */
vmw_kms_check_display_memory(struct drm_device * dev,uint32_t num_rects,struct drm_rect * rects)1444*4882a593Smuzhiyun static int vmw_kms_check_display_memory(struct drm_device *dev,
1445*4882a593Smuzhiyun uint32_t num_rects,
1446*4882a593Smuzhiyun struct drm_rect *rects)
1447*4882a593Smuzhiyun {
1448*4882a593Smuzhiyun struct vmw_private *dev_priv = vmw_priv(dev);
1449*4882a593Smuzhiyun struct drm_rect bounding_box = {0};
1450*4882a593Smuzhiyun u64 total_pixels = 0, pixel_mem, bb_mem;
1451*4882a593Smuzhiyun int i;
1452*4882a593Smuzhiyun
1453*4882a593Smuzhiyun for (i = 0; i < num_rects; i++) {
1454*4882a593Smuzhiyun /*
1455*4882a593Smuzhiyun * For STDU only individual screen (screen target) is limited by
1456*4882a593Smuzhiyun * SCREENTARGET_MAX_WIDTH/HEIGHT registers.
1457*4882a593Smuzhiyun */
1458*4882a593Smuzhiyun if (dev_priv->active_display_unit == vmw_du_screen_target &&
1459*4882a593Smuzhiyun (drm_rect_width(&rects[i]) > dev_priv->stdu_max_width ||
1460*4882a593Smuzhiyun drm_rect_height(&rects[i]) > dev_priv->stdu_max_height)) {
1461*4882a593Smuzhiyun VMW_DEBUG_KMS("Screen size not supported.\n");
1462*4882a593Smuzhiyun return -EINVAL;
1463*4882a593Smuzhiyun }
1464*4882a593Smuzhiyun
1465*4882a593Smuzhiyun /* Bounding box upper left is at (0,0). */
1466*4882a593Smuzhiyun if (rects[i].x2 > bounding_box.x2)
1467*4882a593Smuzhiyun bounding_box.x2 = rects[i].x2;
1468*4882a593Smuzhiyun
1469*4882a593Smuzhiyun if (rects[i].y2 > bounding_box.y2)
1470*4882a593Smuzhiyun bounding_box.y2 = rects[i].y2;
1471*4882a593Smuzhiyun
1472*4882a593Smuzhiyun total_pixels += (u64) drm_rect_width(&rects[i]) *
1473*4882a593Smuzhiyun (u64) drm_rect_height(&rects[i]);
1474*4882a593Smuzhiyun }
1475*4882a593Smuzhiyun
1476*4882a593Smuzhiyun /* Virtual svga device primary limits are always in 32-bpp. */
1477*4882a593Smuzhiyun pixel_mem = total_pixels * 4;
1478*4882a593Smuzhiyun
1479*4882a593Smuzhiyun /*
1480*4882a593Smuzhiyun * For HV10 and below prim_bb_mem is vram size. When
1481*4882a593Smuzhiyun * SVGA_REG_MAX_PRIMARY_BOUNDING_BOX_MEM is not present vram size is
1482*4882a593Smuzhiyun * limit on primary bounding box
1483*4882a593Smuzhiyun */
1484*4882a593Smuzhiyun if (pixel_mem > dev_priv->prim_bb_mem) {
1485*4882a593Smuzhiyun VMW_DEBUG_KMS("Combined output size too large.\n");
1486*4882a593Smuzhiyun return -EINVAL;
1487*4882a593Smuzhiyun }
1488*4882a593Smuzhiyun
1489*4882a593Smuzhiyun /* SVGA_CAP_NO_BB_RESTRICTION is available for STDU only. */
1490*4882a593Smuzhiyun if (dev_priv->active_display_unit != vmw_du_screen_target ||
1491*4882a593Smuzhiyun !(dev_priv->capabilities & SVGA_CAP_NO_BB_RESTRICTION)) {
1492*4882a593Smuzhiyun bb_mem = (u64) bounding_box.x2 * bounding_box.y2 * 4;
1493*4882a593Smuzhiyun
1494*4882a593Smuzhiyun if (bb_mem > dev_priv->prim_bb_mem) {
1495*4882a593Smuzhiyun VMW_DEBUG_KMS("Topology is beyond supported limits.\n");
1496*4882a593Smuzhiyun return -EINVAL;
1497*4882a593Smuzhiyun }
1498*4882a593Smuzhiyun }
1499*4882a593Smuzhiyun
1500*4882a593Smuzhiyun return 0;
1501*4882a593Smuzhiyun }
1502*4882a593Smuzhiyun
1503*4882a593Smuzhiyun /**
1504*4882a593Smuzhiyun * vmw_crtc_state_and_lock - Return new or current crtc state with locked
1505*4882a593Smuzhiyun * crtc mutex
1506*4882a593Smuzhiyun * @state: The atomic state pointer containing the new atomic state
1507*4882a593Smuzhiyun * @crtc: The crtc
1508*4882a593Smuzhiyun *
1509*4882a593Smuzhiyun * This function returns the new crtc state if it's part of the state update.
1510*4882a593Smuzhiyun * Otherwise returns the current crtc state. It also makes sure that the
1511*4882a593Smuzhiyun * crtc mutex is locked.
1512*4882a593Smuzhiyun *
1513*4882a593Smuzhiyun * Returns: A valid crtc state pointer or NULL. It may also return a
1514*4882a593Smuzhiyun * pointer error, in particular -EDEADLK if locking needs to be rerun.
1515*4882a593Smuzhiyun */
1516*4882a593Smuzhiyun static struct drm_crtc_state *
vmw_crtc_state_and_lock(struct drm_atomic_state * state,struct drm_crtc * crtc)1517*4882a593Smuzhiyun vmw_crtc_state_and_lock(struct drm_atomic_state *state, struct drm_crtc *crtc)
1518*4882a593Smuzhiyun {
1519*4882a593Smuzhiyun struct drm_crtc_state *crtc_state;
1520*4882a593Smuzhiyun
1521*4882a593Smuzhiyun crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
1522*4882a593Smuzhiyun if (crtc_state) {
1523*4882a593Smuzhiyun lockdep_assert_held(&crtc->mutex.mutex.base);
1524*4882a593Smuzhiyun } else {
1525*4882a593Smuzhiyun int ret = drm_modeset_lock(&crtc->mutex, state->acquire_ctx);
1526*4882a593Smuzhiyun
1527*4882a593Smuzhiyun if (ret != 0 && ret != -EALREADY)
1528*4882a593Smuzhiyun return ERR_PTR(ret);
1529*4882a593Smuzhiyun
1530*4882a593Smuzhiyun crtc_state = crtc->state;
1531*4882a593Smuzhiyun }
1532*4882a593Smuzhiyun
1533*4882a593Smuzhiyun return crtc_state;
1534*4882a593Smuzhiyun }
1535*4882a593Smuzhiyun
1536*4882a593Smuzhiyun /**
1537*4882a593Smuzhiyun * vmw_kms_check_implicit - Verify that all implicit display units scan out
1538*4882a593Smuzhiyun * from the same fb after the new state is committed.
1539*4882a593Smuzhiyun * @dev: The drm_device.
1540*4882a593Smuzhiyun * @state: The new state to be checked.
1541*4882a593Smuzhiyun *
1542*4882a593Smuzhiyun * Returns:
1543*4882a593Smuzhiyun * Zero on success,
1544*4882a593Smuzhiyun * -EINVAL on invalid state,
1545*4882a593Smuzhiyun * -EDEADLK if modeset locking needs to be rerun.
1546*4882a593Smuzhiyun */
vmw_kms_check_implicit(struct drm_device * dev,struct drm_atomic_state * state)1547*4882a593Smuzhiyun static int vmw_kms_check_implicit(struct drm_device *dev,
1548*4882a593Smuzhiyun struct drm_atomic_state *state)
1549*4882a593Smuzhiyun {
1550*4882a593Smuzhiyun struct drm_framebuffer *implicit_fb = NULL;
1551*4882a593Smuzhiyun struct drm_crtc *crtc;
1552*4882a593Smuzhiyun struct drm_crtc_state *crtc_state;
1553*4882a593Smuzhiyun struct drm_plane_state *plane_state;
1554*4882a593Smuzhiyun
1555*4882a593Smuzhiyun drm_for_each_crtc(crtc, dev) {
1556*4882a593Smuzhiyun struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
1557*4882a593Smuzhiyun
1558*4882a593Smuzhiyun if (!du->is_implicit)
1559*4882a593Smuzhiyun continue;
1560*4882a593Smuzhiyun
1561*4882a593Smuzhiyun crtc_state = vmw_crtc_state_and_lock(state, crtc);
1562*4882a593Smuzhiyun if (IS_ERR(crtc_state))
1563*4882a593Smuzhiyun return PTR_ERR(crtc_state);
1564*4882a593Smuzhiyun
1565*4882a593Smuzhiyun if (!crtc_state || !crtc_state->enable)
1566*4882a593Smuzhiyun continue;
1567*4882a593Smuzhiyun
1568*4882a593Smuzhiyun /*
1569*4882a593Smuzhiyun * Can't move primary planes across crtcs, so this is OK.
1570*4882a593Smuzhiyun * It also means we don't need to take the plane mutex.
1571*4882a593Smuzhiyun */
1572*4882a593Smuzhiyun plane_state = du->primary.state;
1573*4882a593Smuzhiyun if (plane_state->crtc != crtc)
1574*4882a593Smuzhiyun continue;
1575*4882a593Smuzhiyun
1576*4882a593Smuzhiyun if (!implicit_fb)
1577*4882a593Smuzhiyun implicit_fb = plane_state->fb;
1578*4882a593Smuzhiyun else if (implicit_fb != plane_state->fb)
1579*4882a593Smuzhiyun return -EINVAL;
1580*4882a593Smuzhiyun }
1581*4882a593Smuzhiyun
1582*4882a593Smuzhiyun return 0;
1583*4882a593Smuzhiyun }
1584*4882a593Smuzhiyun
1585*4882a593Smuzhiyun /**
1586*4882a593Smuzhiyun * vmw_kms_check_topology - Validates topology in drm_atomic_state
1587*4882a593Smuzhiyun * @dev: DRM device
1588*4882a593Smuzhiyun * @state: the driver state object
1589*4882a593Smuzhiyun *
1590*4882a593Smuzhiyun * Returns:
1591*4882a593Smuzhiyun * 0 on success otherwise negative error code
1592*4882a593Smuzhiyun */
vmw_kms_check_topology(struct drm_device * dev,struct drm_atomic_state * state)1593*4882a593Smuzhiyun static int vmw_kms_check_topology(struct drm_device *dev,
1594*4882a593Smuzhiyun struct drm_atomic_state *state)
1595*4882a593Smuzhiyun {
1596*4882a593Smuzhiyun struct drm_crtc_state *old_crtc_state, *new_crtc_state;
1597*4882a593Smuzhiyun struct drm_rect *rects;
1598*4882a593Smuzhiyun struct drm_crtc *crtc;
1599*4882a593Smuzhiyun uint32_t i;
1600*4882a593Smuzhiyun int ret = 0;
1601*4882a593Smuzhiyun
1602*4882a593Smuzhiyun rects = kcalloc(dev->mode_config.num_crtc, sizeof(struct drm_rect),
1603*4882a593Smuzhiyun GFP_KERNEL);
1604*4882a593Smuzhiyun if (!rects)
1605*4882a593Smuzhiyun return -ENOMEM;
1606*4882a593Smuzhiyun
1607*4882a593Smuzhiyun drm_for_each_crtc(crtc, dev) {
1608*4882a593Smuzhiyun struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
1609*4882a593Smuzhiyun struct drm_crtc_state *crtc_state;
1610*4882a593Smuzhiyun
1611*4882a593Smuzhiyun i = drm_crtc_index(crtc);
1612*4882a593Smuzhiyun
1613*4882a593Smuzhiyun crtc_state = vmw_crtc_state_and_lock(state, crtc);
1614*4882a593Smuzhiyun if (IS_ERR(crtc_state)) {
1615*4882a593Smuzhiyun ret = PTR_ERR(crtc_state);
1616*4882a593Smuzhiyun goto clean;
1617*4882a593Smuzhiyun }
1618*4882a593Smuzhiyun
1619*4882a593Smuzhiyun if (!crtc_state)
1620*4882a593Smuzhiyun continue;
1621*4882a593Smuzhiyun
1622*4882a593Smuzhiyun if (crtc_state->enable) {
1623*4882a593Smuzhiyun rects[i].x1 = du->gui_x;
1624*4882a593Smuzhiyun rects[i].y1 = du->gui_y;
1625*4882a593Smuzhiyun rects[i].x2 = du->gui_x + crtc_state->mode.hdisplay;
1626*4882a593Smuzhiyun rects[i].y2 = du->gui_y + crtc_state->mode.vdisplay;
1627*4882a593Smuzhiyun } else {
1628*4882a593Smuzhiyun rects[i].x1 = 0;
1629*4882a593Smuzhiyun rects[i].y1 = 0;
1630*4882a593Smuzhiyun rects[i].x2 = 0;
1631*4882a593Smuzhiyun rects[i].y2 = 0;
1632*4882a593Smuzhiyun }
1633*4882a593Smuzhiyun }
1634*4882a593Smuzhiyun
1635*4882a593Smuzhiyun /* Determine change to topology due to new atomic state */
1636*4882a593Smuzhiyun for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
1637*4882a593Smuzhiyun new_crtc_state, i) {
1638*4882a593Smuzhiyun struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
1639*4882a593Smuzhiyun struct drm_connector *connector;
1640*4882a593Smuzhiyun struct drm_connector_state *conn_state;
1641*4882a593Smuzhiyun struct vmw_connector_state *vmw_conn_state;
1642*4882a593Smuzhiyun
1643*4882a593Smuzhiyun if (!du->pref_active && new_crtc_state->enable) {
1644*4882a593Smuzhiyun VMW_DEBUG_KMS("Enabling a disabled display unit\n");
1645*4882a593Smuzhiyun ret = -EINVAL;
1646*4882a593Smuzhiyun goto clean;
1647*4882a593Smuzhiyun }
1648*4882a593Smuzhiyun
1649*4882a593Smuzhiyun /*
1650*4882a593Smuzhiyun * For vmwgfx each crtc has only one connector attached and it
1651*4882a593Smuzhiyun * is not changed so don't really need to check the
1652*4882a593Smuzhiyun * crtc->connector_mask and iterate over it.
1653*4882a593Smuzhiyun */
1654*4882a593Smuzhiyun connector = &du->connector;
1655*4882a593Smuzhiyun conn_state = drm_atomic_get_connector_state(state, connector);
1656*4882a593Smuzhiyun if (IS_ERR(conn_state)) {
1657*4882a593Smuzhiyun ret = PTR_ERR(conn_state);
1658*4882a593Smuzhiyun goto clean;
1659*4882a593Smuzhiyun }
1660*4882a593Smuzhiyun
1661*4882a593Smuzhiyun vmw_conn_state = vmw_connector_state_to_vcs(conn_state);
1662*4882a593Smuzhiyun vmw_conn_state->gui_x = du->gui_x;
1663*4882a593Smuzhiyun vmw_conn_state->gui_y = du->gui_y;
1664*4882a593Smuzhiyun }
1665*4882a593Smuzhiyun
1666*4882a593Smuzhiyun ret = vmw_kms_check_display_memory(dev, dev->mode_config.num_crtc,
1667*4882a593Smuzhiyun rects);
1668*4882a593Smuzhiyun
1669*4882a593Smuzhiyun clean:
1670*4882a593Smuzhiyun kfree(rects);
1671*4882a593Smuzhiyun return ret;
1672*4882a593Smuzhiyun }
1673*4882a593Smuzhiyun
1674*4882a593Smuzhiyun /**
1675*4882a593Smuzhiyun * vmw_kms_atomic_check_modeset- validate state object for modeset changes
1676*4882a593Smuzhiyun *
1677*4882a593Smuzhiyun * @dev: DRM device
1678*4882a593Smuzhiyun * @state: the driver state object
1679*4882a593Smuzhiyun *
1680*4882a593Smuzhiyun * This is a simple wrapper around drm_atomic_helper_check_modeset() for
1681*4882a593Smuzhiyun * us to assign a value to mode->crtc_clock so that
1682*4882a593Smuzhiyun * drm_calc_timestamping_constants() won't throw an error message
1683*4882a593Smuzhiyun *
1684*4882a593Smuzhiyun * Returns:
1685*4882a593Smuzhiyun * Zero for success or -errno
1686*4882a593Smuzhiyun */
1687*4882a593Smuzhiyun static int
vmw_kms_atomic_check_modeset(struct drm_device * dev,struct drm_atomic_state * state)1688*4882a593Smuzhiyun vmw_kms_atomic_check_modeset(struct drm_device *dev,
1689*4882a593Smuzhiyun struct drm_atomic_state *state)
1690*4882a593Smuzhiyun {
1691*4882a593Smuzhiyun struct drm_crtc *crtc;
1692*4882a593Smuzhiyun struct drm_crtc_state *crtc_state;
1693*4882a593Smuzhiyun bool need_modeset = false;
1694*4882a593Smuzhiyun int i, ret;
1695*4882a593Smuzhiyun
1696*4882a593Smuzhiyun ret = drm_atomic_helper_check(dev, state);
1697*4882a593Smuzhiyun if (ret)
1698*4882a593Smuzhiyun return ret;
1699*4882a593Smuzhiyun
1700*4882a593Smuzhiyun ret = vmw_kms_check_implicit(dev, state);
1701*4882a593Smuzhiyun if (ret) {
1702*4882a593Smuzhiyun VMW_DEBUG_KMS("Invalid implicit state\n");
1703*4882a593Smuzhiyun return ret;
1704*4882a593Smuzhiyun }
1705*4882a593Smuzhiyun
1706*4882a593Smuzhiyun for_each_new_crtc_in_state(state, crtc, crtc_state, i) {
1707*4882a593Smuzhiyun if (drm_atomic_crtc_needs_modeset(crtc_state))
1708*4882a593Smuzhiyun need_modeset = true;
1709*4882a593Smuzhiyun }
1710*4882a593Smuzhiyun
1711*4882a593Smuzhiyun if (need_modeset)
1712*4882a593Smuzhiyun return vmw_kms_check_topology(dev, state);
1713*4882a593Smuzhiyun
1714*4882a593Smuzhiyun return ret;
1715*4882a593Smuzhiyun }
1716*4882a593Smuzhiyun
1717*4882a593Smuzhiyun static const struct drm_mode_config_funcs vmw_kms_funcs = {
1718*4882a593Smuzhiyun .fb_create = vmw_kms_fb_create,
1719*4882a593Smuzhiyun .atomic_check = vmw_kms_atomic_check_modeset,
1720*4882a593Smuzhiyun .atomic_commit = drm_atomic_helper_commit,
1721*4882a593Smuzhiyun };
1722*4882a593Smuzhiyun
vmw_kms_generic_present(struct vmw_private * dev_priv,struct drm_file * file_priv,struct vmw_framebuffer * vfb,struct vmw_surface * surface,uint32_t sid,int32_t destX,int32_t destY,struct drm_vmw_rect * clips,uint32_t num_clips)1723*4882a593Smuzhiyun static int vmw_kms_generic_present(struct vmw_private *dev_priv,
1724*4882a593Smuzhiyun struct drm_file *file_priv,
1725*4882a593Smuzhiyun struct vmw_framebuffer *vfb,
1726*4882a593Smuzhiyun struct vmw_surface *surface,
1727*4882a593Smuzhiyun uint32_t sid,
1728*4882a593Smuzhiyun int32_t destX, int32_t destY,
1729*4882a593Smuzhiyun struct drm_vmw_rect *clips,
1730*4882a593Smuzhiyun uint32_t num_clips)
1731*4882a593Smuzhiyun {
1732*4882a593Smuzhiyun return vmw_kms_sou_do_surface_dirty(dev_priv, vfb, NULL, clips,
1733*4882a593Smuzhiyun &surface->res, destX, destY,
1734*4882a593Smuzhiyun num_clips, 1, NULL, NULL);
1735*4882a593Smuzhiyun }
1736*4882a593Smuzhiyun
1737*4882a593Smuzhiyun
vmw_kms_present(struct vmw_private * dev_priv,struct drm_file * file_priv,struct vmw_framebuffer * vfb,struct vmw_surface * surface,uint32_t sid,int32_t destX,int32_t destY,struct drm_vmw_rect * clips,uint32_t num_clips)1738*4882a593Smuzhiyun int vmw_kms_present(struct vmw_private *dev_priv,
1739*4882a593Smuzhiyun struct drm_file *file_priv,
1740*4882a593Smuzhiyun struct vmw_framebuffer *vfb,
1741*4882a593Smuzhiyun struct vmw_surface *surface,
1742*4882a593Smuzhiyun uint32_t sid,
1743*4882a593Smuzhiyun int32_t destX, int32_t destY,
1744*4882a593Smuzhiyun struct drm_vmw_rect *clips,
1745*4882a593Smuzhiyun uint32_t num_clips)
1746*4882a593Smuzhiyun {
1747*4882a593Smuzhiyun int ret;
1748*4882a593Smuzhiyun
1749*4882a593Smuzhiyun switch (dev_priv->active_display_unit) {
1750*4882a593Smuzhiyun case vmw_du_screen_target:
1751*4882a593Smuzhiyun ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, clips,
1752*4882a593Smuzhiyun &surface->res, destX, destY,
1753*4882a593Smuzhiyun num_clips, 1, NULL, NULL);
1754*4882a593Smuzhiyun break;
1755*4882a593Smuzhiyun case vmw_du_screen_object:
1756*4882a593Smuzhiyun ret = vmw_kms_generic_present(dev_priv, file_priv, vfb, surface,
1757*4882a593Smuzhiyun sid, destX, destY, clips,
1758*4882a593Smuzhiyun num_clips);
1759*4882a593Smuzhiyun break;
1760*4882a593Smuzhiyun default:
1761*4882a593Smuzhiyun WARN_ONCE(true,
1762*4882a593Smuzhiyun "Present called with invalid display system.\n");
1763*4882a593Smuzhiyun ret = -ENOSYS;
1764*4882a593Smuzhiyun break;
1765*4882a593Smuzhiyun }
1766*4882a593Smuzhiyun if (ret)
1767*4882a593Smuzhiyun return ret;
1768*4882a593Smuzhiyun
1769*4882a593Smuzhiyun vmw_fifo_flush(dev_priv, false);
1770*4882a593Smuzhiyun
1771*4882a593Smuzhiyun return 0;
1772*4882a593Smuzhiyun }
1773*4882a593Smuzhiyun
1774*4882a593Smuzhiyun static void
vmw_kms_create_hotplug_mode_update_property(struct vmw_private * dev_priv)1775*4882a593Smuzhiyun vmw_kms_create_hotplug_mode_update_property(struct vmw_private *dev_priv)
1776*4882a593Smuzhiyun {
1777*4882a593Smuzhiyun if (dev_priv->hotplug_mode_update_property)
1778*4882a593Smuzhiyun return;
1779*4882a593Smuzhiyun
1780*4882a593Smuzhiyun dev_priv->hotplug_mode_update_property =
1781*4882a593Smuzhiyun drm_property_create_range(dev_priv->dev,
1782*4882a593Smuzhiyun DRM_MODE_PROP_IMMUTABLE,
1783*4882a593Smuzhiyun "hotplug_mode_update", 0, 1);
1784*4882a593Smuzhiyun
1785*4882a593Smuzhiyun if (!dev_priv->hotplug_mode_update_property)
1786*4882a593Smuzhiyun return;
1787*4882a593Smuzhiyun
1788*4882a593Smuzhiyun }
1789*4882a593Smuzhiyun
vmw_kms_init(struct vmw_private * dev_priv)1790*4882a593Smuzhiyun int vmw_kms_init(struct vmw_private *dev_priv)
1791*4882a593Smuzhiyun {
1792*4882a593Smuzhiyun struct drm_device *dev = dev_priv->dev;
1793*4882a593Smuzhiyun int ret;
1794*4882a593Smuzhiyun
1795*4882a593Smuzhiyun drm_mode_config_init(dev);
1796*4882a593Smuzhiyun dev->mode_config.funcs = &vmw_kms_funcs;
1797*4882a593Smuzhiyun dev->mode_config.min_width = 1;
1798*4882a593Smuzhiyun dev->mode_config.min_height = 1;
1799*4882a593Smuzhiyun dev->mode_config.max_width = dev_priv->texture_max_width;
1800*4882a593Smuzhiyun dev->mode_config.max_height = dev_priv->texture_max_height;
1801*4882a593Smuzhiyun
1802*4882a593Smuzhiyun drm_mode_create_suggested_offset_properties(dev);
1803*4882a593Smuzhiyun vmw_kms_create_hotplug_mode_update_property(dev_priv);
1804*4882a593Smuzhiyun
1805*4882a593Smuzhiyun ret = vmw_kms_stdu_init_display(dev_priv);
1806*4882a593Smuzhiyun if (ret) {
1807*4882a593Smuzhiyun ret = vmw_kms_sou_init_display(dev_priv);
1808*4882a593Smuzhiyun if (ret) /* Fallback */
1809*4882a593Smuzhiyun ret = vmw_kms_ldu_init_display(dev_priv);
1810*4882a593Smuzhiyun }
1811*4882a593Smuzhiyun
1812*4882a593Smuzhiyun return ret;
1813*4882a593Smuzhiyun }
1814*4882a593Smuzhiyun
vmw_kms_close(struct vmw_private * dev_priv)1815*4882a593Smuzhiyun int vmw_kms_close(struct vmw_private *dev_priv)
1816*4882a593Smuzhiyun {
1817*4882a593Smuzhiyun int ret = 0;
1818*4882a593Smuzhiyun
1819*4882a593Smuzhiyun /*
1820*4882a593Smuzhiyun * Docs says we should take the lock before calling this function
1821*4882a593Smuzhiyun * but since it destroys encoders and our destructor calls
1822*4882a593Smuzhiyun * drm_encoder_cleanup which takes the lock we deadlock.
1823*4882a593Smuzhiyun */
1824*4882a593Smuzhiyun drm_mode_config_cleanup(dev_priv->dev);
1825*4882a593Smuzhiyun if (dev_priv->active_display_unit == vmw_du_legacy)
1826*4882a593Smuzhiyun ret = vmw_kms_ldu_close_display(dev_priv);
1827*4882a593Smuzhiyun
1828*4882a593Smuzhiyun return ret;
1829*4882a593Smuzhiyun }
1830*4882a593Smuzhiyun
vmw_kms_cursor_bypass_ioctl(struct drm_device * dev,void * data,struct drm_file * file_priv)1831*4882a593Smuzhiyun int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1832*4882a593Smuzhiyun struct drm_file *file_priv)
1833*4882a593Smuzhiyun {
1834*4882a593Smuzhiyun struct drm_vmw_cursor_bypass_arg *arg = data;
1835*4882a593Smuzhiyun struct vmw_display_unit *du;
1836*4882a593Smuzhiyun struct drm_crtc *crtc;
1837*4882a593Smuzhiyun int ret = 0;
1838*4882a593Smuzhiyun
1839*4882a593Smuzhiyun
1840*4882a593Smuzhiyun mutex_lock(&dev->mode_config.mutex);
1841*4882a593Smuzhiyun if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1842*4882a593Smuzhiyun
1843*4882a593Smuzhiyun list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1844*4882a593Smuzhiyun du = vmw_crtc_to_du(crtc);
1845*4882a593Smuzhiyun du->hotspot_x = arg->xhot;
1846*4882a593Smuzhiyun du->hotspot_y = arg->yhot;
1847*4882a593Smuzhiyun }
1848*4882a593Smuzhiyun
1849*4882a593Smuzhiyun mutex_unlock(&dev->mode_config.mutex);
1850*4882a593Smuzhiyun return 0;
1851*4882a593Smuzhiyun }
1852*4882a593Smuzhiyun
1853*4882a593Smuzhiyun crtc = drm_crtc_find(dev, file_priv, arg->crtc_id);
1854*4882a593Smuzhiyun if (!crtc) {
1855*4882a593Smuzhiyun ret = -ENOENT;
1856*4882a593Smuzhiyun goto out;
1857*4882a593Smuzhiyun }
1858*4882a593Smuzhiyun
1859*4882a593Smuzhiyun du = vmw_crtc_to_du(crtc);
1860*4882a593Smuzhiyun
1861*4882a593Smuzhiyun du->hotspot_x = arg->xhot;
1862*4882a593Smuzhiyun du->hotspot_y = arg->yhot;
1863*4882a593Smuzhiyun
1864*4882a593Smuzhiyun out:
1865*4882a593Smuzhiyun mutex_unlock(&dev->mode_config.mutex);
1866*4882a593Smuzhiyun
1867*4882a593Smuzhiyun return ret;
1868*4882a593Smuzhiyun }
1869*4882a593Smuzhiyun
vmw_kms_write_svga(struct vmw_private * vmw_priv,unsigned width,unsigned height,unsigned pitch,unsigned bpp,unsigned depth)1870*4882a593Smuzhiyun int vmw_kms_write_svga(struct vmw_private *vmw_priv,
1871*4882a593Smuzhiyun unsigned width, unsigned height, unsigned pitch,
1872*4882a593Smuzhiyun unsigned bpp, unsigned depth)
1873*4882a593Smuzhiyun {
1874*4882a593Smuzhiyun if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1875*4882a593Smuzhiyun vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1876*4882a593Smuzhiyun else if (vmw_fifo_have_pitchlock(vmw_priv))
1877*4882a593Smuzhiyun vmw_mmio_write(pitch, vmw_priv->mmio_virt +
1878*4882a593Smuzhiyun SVGA_FIFO_PITCHLOCK);
1879*4882a593Smuzhiyun vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1880*4882a593Smuzhiyun vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
1881*4882a593Smuzhiyun vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
1882*4882a593Smuzhiyun
1883*4882a593Smuzhiyun if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1884*4882a593Smuzhiyun DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1885*4882a593Smuzhiyun depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1886*4882a593Smuzhiyun return -EINVAL;
1887*4882a593Smuzhiyun }
1888*4882a593Smuzhiyun
1889*4882a593Smuzhiyun return 0;
1890*4882a593Smuzhiyun }
1891*4882a593Smuzhiyun
vmw_kms_validate_mode_vram(struct vmw_private * dev_priv,uint32_t pitch,uint32_t height)1892*4882a593Smuzhiyun bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1893*4882a593Smuzhiyun uint32_t pitch,
1894*4882a593Smuzhiyun uint32_t height)
1895*4882a593Smuzhiyun {
1896*4882a593Smuzhiyun return ((u64) pitch * (u64) height) < (u64)
1897*4882a593Smuzhiyun ((dev_priv->active_display_unit == vmw_du_screen_target) ?
1898*4882a593Smuzhiyun dev_priv->prim_bb_mem : dev_priv->vram_size);
1899*4882a593Smuzhiyun }
1900*4882a593Smuzhiyun
1901*4882a593Smuzhiyun
1902*4882a593Smuzhiyun /**
1903*4882a593Smuzhiyun * Function called by DRM code called with vbl_lock held.
1904*4882a593Smuzhiyun */
vmw_get_vblank_counter(struct drm_crtc * crtc)1905*4882a593Smuzhiyun u32 vmw_get_vblank_counter(struct drm_crtc *crtc)
1906*4882a593Smuzhiyun {
1907*4882a593Smuzhiyun return 0;
1908*4882a593Smuzhiyun }
1909*4882a593Smuzhiyun
1910*4882a593Smuzhiyun /**
1911*4882a593Smuzhiyun * Function called by DRM code called with vbl_lock held.
1912*4882a593Smuzhiyun */
vmw_enable_vblank(struct drm_crtc * crtc)1913*4882a593Smuzhiyun int vmw_enable_vblank(struct drm_crtc *crtc)
1914*4882a593Smuzhiyun {
1915*4882a593Smuzhiyun return -EINVAL;
1916*4882a593Smuzhiyun }
1917*4882a593Smuzhiyun
1918*4882a593Smuzhiyun /**
1919*4882a593Smuzhiyun * Function called by DRM code called with vbl_lock held.
1920*4882a593Smuzhiyun */
vmw_disable_vblank(struct drm_crtc * crtc)1921*4882a593Smuzhiyun void vmw_disable_vblank(struct drm_crtc *crtc)
1922*4882a593Smuzhiyun {
1923*4882a593Smuzhiyun }
1924*4882a593Smuzhiyun
1925*4882a593Smuzhiyun /**
1926*4882a593Smuzhiyun * vmw_du_update_layout - Update the display unit with topology from resolution
1927*4882a593Smuzhiyun * plugin and generate DRM uevent
1928*4882a593Smuzhiyun * @dev_priv: device private
1929*4882a593Smuzhiyun * @num_rects: number of drm_rect in rects
1930*4882a593Smuzhiyun * @rects: toplogy to update
1931*4882a593Smuzhiyun */
vmw_du_update_layout(struct vmw_private * dev_priv,unsigned int num_rects,struct drm_rect * rects)1932*4882a593Smuzhiyun static int vmw_du_update_layout(struct vmw_private *dev_priv,
1933*4882a593Smuzhiyun unsigned int num_rects, struct drm_rect *rects)
1934*4882a593Smuzhiyun {
1935*4882a593Smuzhiyun struct drm_device *dev = dev_priv->dev;
1936*4882a593Smuzhiyun struct vmw_display_unit *du;
1937*4882a593Smuzhiyun struct drm_connector *con;
1938*4882a593Smuzhiyun struct drm_connector_list_iter conn_iter;
1939*4882a593Smuzhiyun struct drm_modeset_acquire_ctx ctx;
1940*4882a593Smuzhiyun struct drm_crtc *crtc;
1941*4882a593Smuzhiyun int ret;
1942*4882a593Smuzhiyun
1943*4882a593Smuzhiyun /* Currently gui_x/y is protected with the crtc mutex */
1944*4882a593Smuzhiyun mutex_lock(&dev->mode_config.mutex);
1945*4882a593Smuzhiyun drm_modeset_acquire_init(&ctx, 0);
1946*4882a593Smuzhiyun retry:
1947*4882a593Smuzhiyun drm_for_each_crtc(crtc, dev) {
1948*4882a593Smuzhiyun ret = drm_modeset_lock(&crtc->mutex, &ctx);
1949*4882a593Smuzhiyun if (ret < 0) {
1950*4882a593Smuzhiyun if (ret == -EDEADLK) {
1951*4882a593Smuzhiyun drm_modeset_backoff(&ctx);
1952*4882a593Smuzhiyun goto retry;
1953*4882a593Smuzhiyun }
1954*4882a593Smuzhiyun goto out_fini;
1955*4882a593Smuzhiyun }
1956*4882a593Smuzhiyun }
1957*4882a593Smuzhiyun
1958*4882a593Smuzhiyun drm_connector_list_iter_begin(dev, &conn_iter);
1959*4882a593Smuzhiyun drm_for_each_connector_iter(con, &conn_iter) {
1960*4882a593Smuzhiyun du = vmw_connector_to_du(con);
1961*4882a593Smuzhiyun if (num_rects > du->unit) {
1962*4882a593Smuzhiyun du->pref_width = drm_rect_width(&rects[du->unit]);
1963*4882a593Smuzhiyun du->pref_height = drm_rect_height(&rects[du->unit]);
1964*4882a593Smuzhiyun du->pref_active = true;
1965*4882a593Smuzhiyun du->gui_x = rects[du->unit].x1;
1966*4882a593Smuzhiyun du->gui_y = rects[du->unit].y1;
1967*4882a593Smuzhiyun } else {
1968*4882a593Smuzhiyun du->pref_width = 800;
1969*4882a593Smuzhiyun du->pref_height = 600;
1970*4882a593Smuzhiyun du->pref_active = false;
1971*4882a593Smuzhiyun du->gui_x = 0;
1972*4882a593Smuzhiyun du->gui_y = 0;
1973*4882a593Smuzhiyun }
1974*4882a593Smuzhiyun }
1975*4882a593Smuzhiyun drm_connector_list_iter_end(&conn_iter);
1976*4882a593Smuzhiyun
1977*4882a593Smuzhiyun list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1978*4882a593Smuzhiyun du = vmw_connector_to_du(con);
1979*4882a593Smuzhiyun if (num_rects > du->unit) {
1980*4882a593Smuzhiyun drm_object_property_set_value
1981*4882a593Smuzhiyun (&con->base, dev->mode_config.suggested_x_property,
1982*4882a593Smuzhiyun du->gui_x);
1983*4882a593Smuzhiyun drm_object_property_set_value
1984*4882a593Smuzhiyun (&con->base, dev->mode_config.suggested_y_property,
1985*4882a593Smuzhiyun du->gui_y);
1986*4882a593Smuzhiyun } else {
1987*4882a593Smuzhiyun drm_object_property_set_value
1988*4882a593Smuzhiyun (&con->base, dev->mode_config.suggested_x_property,
1989*4882a593Smuzhiyun 0);
1990*4882a593Smuzhiyun drm_object_property_set_value
1991*4882a593Smuzhiyun (&con->base, dev->mode_config.suggested_y_property,
1992*4882a593Smuzhiyun 0);
1993*4882a593Smuzhiyun }
1994*4882a593Smuzhiyun con->status = vmw_du_connector_detect(con, true);
1995*4882a593Smuzhiyun }
1996*4882a593Smuzhiyun
1997*4882a593Smuzhiyun drm_sysfs_hotplug_event(dev);
1998*4882a593Smuzhiyun out_fini:
1999*4882a593Smuzhiyun drm_modeset_drop_locks(&ctx);
2000*4882a593Smuzhiyun drm_modeset_acquire_fini(&ctx);
2001*4882a593Smuzhiyun mutex_unlock(&dev->mode_config.mutex);
2002*4882a593Smuzhiyun
2003*4882a593Smuzhiyun return 0;
2004*4882a593Smuzhiyun }
2005*4882a593Smuzhiyun
vmw_du_crtc_gamma_set(struct drm_crtc * crtc,u16 * r,u16 * g,u16 * b,uint32_t size,struct drm_modeset_acquire_ctx * ctx)2006*4882a593Smuzhiyun int vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
2007*4882a593Smuzhiyun u16 *r, u16 *g, u16 *b,
2008*4882a593Smuzhiyun uint32_t size,
2009*4882a593Smuzhiyun struct drm_modeset_acquire_ctx *ctx)
2010*4882a593Smuzhiyun {
2011*4882a593Smuzhiyun struct vmw_private *dev_priv = vmw_priv(crtc->dev);
2012*4882a593Smuzhiyun int i;
2013*4882a593Smuzhiyun
2014*4882a593Smuzhiyun for (i = 0; i < size; i++) {
2015*4882a593Smuzhiyun DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
2016*4882a593Smuzhiyun r[i], g[i], b[i]);
2017*4882a593Smuzhiyun vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
2018*4882a593Smuzhiyun vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
2019*4882a593Smuzhiyun vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
2020*4882a593Smuzhiyun }
2021*4882a593Smuzhiyun
2022*4882a593Smuzhiyun return 0;
2023*4882a593Smuzhiyun }
2024*4882a593Smuzhiyun
vmw_du_connector_dpms(struct drm_connector * connector,int mode)2025*4882a593Smuzhiyun int vmw_du_connector_dpms(struct drm_connector *connector, int mode)
2026*4882a593Smuzhiyun {
2027*4882a593Smuzhiyun return 0;
2028*4882a593Smuzhiyun }
2029*4882a593Smuzhiyun
2030*4882a593Smuzhiyun enum drm_connector_status
vmw_du_connector_detect(struct drm_connector * connector,bool force)2031*4882a593Smuzhiyun vmw_du_connector_detect(struct drm_connector *connector, bool force)
2032*4882a593Smuzhiyun {
2033*4882a593Smuzhiyun uint32_t num_displays;
2034*4882a593Smuzhiyun struct drm_device *dev = connector->dev;
2035*4882a593Smuzhiyun struct vmw_private *dev_priv = vmw_priv(dev);
2036*4882a593Smuzhiyun struct vmw_display_unit *du = vmw_connector_to_du(connector);
2037*4882a593Smuzhiyun
2038*4882a593Smuzhiyun num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
2039*4882a593Smuzhiyun
2040*4882a593Smuzhiyun return ((vmw_connector_to_du(connector)->unit < num_displays &&
2041*4882a593Smuzhiyun du->pref_active) ?
2042*4882a593Smuzhiyun connector_status_connected : connector_status_disconnected);
2043*4882a593Smuzhiyun }
2044*4882a593Smuzhiyun
2045*4882a593Smuzhiyun static struct drm_display_mode vmw_kms_connector_builtin[] = {
2046*4882a593Smuzhiyun /* 640x480@60Hz */
2047*4882a593Smuzhiyun { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
2048*4882a593Smuzhiyun 752, 800, 0, 480, 489, 492, 525, 0,
2049*4882a593Smuzhiyun DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
2050*4882a593Smuzhiyun /* 800x600@60Hz */
2051*4882a593Smuzhiyun { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
2052*4882a593Smuzhiyun 968, 1056, 0, 600, 601, 605, 628, 0,
2053*4882a593Smuzhiyun DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2054*4882a593Smuzhiyun /* 1024x768@60Hz */
2055*4882a593Smuzhiyun { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
2056*4882a593Smuzhiyun 1184, 1344, 0, 768, 771, 777, 806, 0,
2057*4882a593Smuzhiyun DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
2058*4882a593Smuzhiyun /* 1152x864@75Hz */
2059*4882a593Smuzhiyun { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
2060*4882a593Smuzhiyun 1344, 1600, 0, 864, 865, 868, 900, 0,
2061*4882a593Smuzhiyun DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2062*4882a593Smuzhiyun /* 1280x768@60Hz */
2063*4882a593Smuzhiyun { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
2064*4882a593Smuzhiyun 1472, 1664, 0, 768, 771, 778, 798, 0,
2065*4882a593Smuzhiyun DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
2066*4882a593Smuzhiyun /* 1280x800@60Hz */
2067*4882a593Smuzhiyun { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
2068*4882a593Smuzhiyun 1480, 1680, 0, 800, 803, 809, 831, 0,
2069*4882a593Smuzhiyun DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
2070*4882a593Smuzhiyun /* 1280x960@60Hz */
2071*4882a593Smuzhiyun { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
2072*4882a593Smuzhiyun 1488, 1800, 0, 960, 961, 964, 1000, 0,
2073*4882a593Smuzhiyun DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2074*4882a593Smuzhiyun /* 1280x1024@60Hz */
2075*4882a593Smuzhiyun { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
2076*4882a593Smuzhiyun 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
2077*4882a593Smuzhiyun DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2078*4882a593Smuzhiyun /* 1360x768@60Hz */
2079*4882a593Smuzhiyun { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
2080*4882a593Smuzhiyun 1536, 1792, 0, 768, 771, 777, 795, 0,
2081*4882a593Smuzhiyun DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2082*4882a593Smuzhiyun /* 1440x1050@60Hz */
2083*4882a593Smuzhiyun { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
2084*4882a593Smuzhiyun 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
2085*4882a593Smuzhiyun DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
2086*4882a593Smuzhiyun /* 1440x900@60Hz */
2087*4882a593Smuzhiyun { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
2088*4882a593Smuzhiyun 1672, 1904, 0, 900, 903, 909, 934, 0,
2089*4882a593Smuzhiyun DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
2090*4882a593Smuzhiyun /* 1600x1200@60Hz */
2091*4882a593Smuzhiyun { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
2092*4882a593Smuzhiyun 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
2093*4882a593Smuzhiyun DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2094*4882a593Smuzhiyun /* 1680x1050@60Hz */
2095*4882a593Smuzhiyun { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
2096*4882a593Smuzhiyun 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
2097*4882a593Smuzhiyun DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
2098*4882a593Smuzhiyun /* 1792x1344@60Hz */
2099*4882a593Smuzhiyun { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
2100*4882a593Smuzhiyun 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
2101*4882a593Smuzhiyun DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
2102*4882a593Smuzhiyun /* 1853x1392@60Hz */
2103*4882a593Smuzhiyun { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
2104*4882a593Smuzhiyun 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
2105*4882a593Smuzhiyun DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
2106*4882a593Smuzhiyun /* 1920x1200@60Hz */
2107*4882a593Smuzhiyun { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
2108*4882a593Smuzhiyun 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
2109*4882a593Smuzhiyun DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
2110*4882a593Smuzhiyun /* 1920x1440@60Hz */
2111*4882a593Smuzhiyun { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
2112*4882a593Smuzhiyun 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
2113*4882a593Smuzhiyun DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
2114*4882a593Smuzhiyun /* 2560x1600@60Hz */
2115*4882a593Smuzhiyun { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
2116*4882a593Smuzhiyun 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
2117*4882a593Smuzhiyun DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
2118*4882a593Smuzhiyun /* Terminate */
2119*4882a593Smuzhiyun { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
2120*4882a593Smuzhiyun };
2121*4882a593Smuzhiyun
2122*4882a593Smuzhiyun /**
2123*4882a593Smuzhiyun * vmw_guess_mode_timing - Provide fake timings for a
2124*4882a593Smuzhiyun * 60Hz vrefresh mode.
2125*4882a593Smuzhiyun *
2126*4882a593Smuzhiyun * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
2127*4882a593Smuzhiyun * members filled in.
2128*4882a593Smuzhiyun */
vmw_guess_mode_timing(struct drm_display_mode * mode)2129*4882a593Smuzhiyun void vmw_guess_mode_timing(struct drm_display_mode *mode)
2130*4882a593Smuzhiyun {
2131*4882a593Smuzhiyun mode->hsync_start = mode->hdisplay + 50;
2132*4882a593Smuzhiyun mode->hsync_end = mode->hsync_start + 50;
2133*4882a593Smuzhiyun mode->htotal = mode->hsync_end + 50;
2134*4882a593Smuzhiyun
2135*4882a593Smuzhiyun mode->vsync_start = mode->vdisplay + 50;
2136*4882a593Smuzhiyun mode->vsync_end = mode->vsync_start + 50;
2137*4882a593Smuzhiyun mode->vtotal = mode->vsync_end + 50;
2138*4882a593Smuzhiyun
2139*4882a593Smuzhiyun mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
2140*4882a593Smuzhiyun }
2141*4882a593Smuzhiyun
2142*4882a593Smuzhiyun
vmw_du_connector_fill_modes(struct drm_connector * connector,uint32_t max_width,uint32_t max_height)2143*4882a593Smuzhiyun int vmw_du_connector_fill_modes(struct drm_connector *connector,
2144*4882a593Smuzhiyun uint32_t max_width, uint32_t max_height)
2145*4882a593Smuzhiyun {
2146*4882a593Smuzhiyun struct vmw_display_unit *du = vmw_connector_to_du(connector);
2147*4882a593Smuzhiyun struct drm_device *dev = connector->dev;
2148*4882a593Smuzhiyun struct vmw_private *dev_priv = vmw_priv(dev);
2149*4882a593Smuzhiyun struct drm_display_mode *mode = NULL;
2150*4882a593Smuzhiyun struct drm_display_mode *bmode;
2151*4882a593Smuzhiyun struct drm_display_mode prefmode = { DRM_MODE("preferred",
2152*4882a593Smuzhiyun DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
2153*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2154*4882a593Smuzhiyun DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
2155*4882a593Smuzhiyun };
2156*4882a593Smuzhiyun int i;
2157*4882a593Smuzhiyun u32 assumed_bpp = 4;
2158*4882a593Smuzhiyun
2159*4882a593Smuzhiyun if (dev_priv->assume_16bpp)
2160*4882a593Smuzhiyun assumed_bpp = 2;
2161*4882a593Smuzhiyun
2162*4882a593Smuzhiyun max_width = min(max_width, dev_priv->texture_max_width);
2163*4882a593Smuzhiyun max_height = min(max_height, dev_priv->texture_max_height);
2164*4882a593Smuzhiyun
2165*4882a593Smuzhiyun /*
2166*4882a593Smuzhiyun * For STDU extra limit for a mode on SVGA_REG_SCREENTARGET_MAX_WIDTH/
2167*4882a593Smuzhiyun * HEIGHT registers.
2168*4882a593Smuzhiyun */
2169*4882a593Smuzhiyun if (dev_priv->active_display_unit == vmw_du_screen_target) {
2170*4882a593Smuzhiyun max_width = min(max_width, dev_priv->stdu_max_width);
2171*4882a593Smuzhiyun max_height = min(max_height, dev_priv->stdu_max_height);
2172*4882a593Smuzhiyun }
2173*4882a593Smuzhiyun
2174*4882a593Smuzhiyun /* Add preferred mode */
2175*4882a593Smuzhiyun mode = drm_mode_duplicate(dev, &prefmode);
2176*4882a593Smuzhiyun if (!mode)
2177*4882a593Smuzhiyun return 0;
2178*4882a593Smuzhiyun mode->hdisplay = du->pref_width;
2179*4882a593Smuzhiyun mode->vdisplay = du->pref_height;
2180*4882a593Smuzhiyun vmw_guess_mode_timing(mode);
2181*4882a593Smuzhiyun
2182*4882a593Smuzhiyun if (vmw_kms_validate_mode_vram(dev_priv,
2183*4882a593Smuzhiyun mode->hdisplay * assumed_bpp,
2184*4882a593Smuzhiyun mode->vdisplay)) {
2185*4882a593Smuzhiyun drm_mode_probed_add(connector, mode);
2186*4882a593Smuzhiyun } else {
2187*4882a593Smuzhiyun drm_mode_destroy(dev, mode);
2188*4882a593Smuzhiyun mode = NULL;
2189*4882a593Smuzhiyun }
2190*4882a593Smuzhiyun
2191*4882a593Smuzhiyun if (du->pref_mode) {
2192*4882a593Smuzhiyun list_del_init(&du->pref_mode->head);
2193*4882a593Smuzhiyun drm_mode_destroy(dev, du->pref_mode);
2194*4882a593Smuzhiyun }
2195*4882a593Smuzhiyun
2196*4882a593Smuzhiyun /* mode might be null here, this is intended */
2197*4882a593Smuzhiyun du->pref_mode = mode;
2198*4882a593Smuzhiyun
2199*4882a593Smuzhiyun for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
2200*4882a593Smuzhiyun bmode = &vmw_kms_connector_builtin[i];
2201*4882a593Smuzhiyun if (bmode->hdisplay > max_width ||
2202*4882a593Smuzhiyun bmode->vdisplay > max_height)
2203*4882a593Smuzhiyun continue;
2204*4882a593Smuzhiyun
2205*4882a593Smuzhiyun if (!vmw_kms_validate_mode_vram(dev_priv,
2206*4882a593Smuzhiyun bmode->hdisplay * assumed_bpp,
2207*4882a593Smuzhiyun bmode->vdisplay))
2208*4882a593Smuzhiyun continue;
2209*4882a593Smuzhiyun
2210*4882a593Smuzhiyun mode = drm_mode_duplicate(dev, bmode);
2211*4882a593Smuzhiyun if (!mode)
2212*4882a593Smuzhiyun return 0;
2213*4882a593Smuzhiyun
2214*4882a593Smuzhiyun drm_mode_probed_add(connector, mode);
2215*4882a593Smuzhiyun }
2216*4882a593Smuzhiyun
2217*4882a593Smuzhiyun drm_connector_list_update(connector);
2218*4882a593Smuzhiyun /* Move the prefered mode first, help apps pick the right mode. */
2219*4882a593Smuzhiyun drm_mode_sort(&connector->modes);
2220*4882a593Smuzhiyun
2221*4882a593Smuzhiyun return 1;
2222*4882a593Smuzhiyun }
2223*4882a593Smuzhiyun
2224*4882a593Smuzhiyun /**
2225*4882a593Smuzhiyun * vmw_kms_update_layout_ioctl - Handler for DRM_VMW_UPDATE_LAYOUT ioctl
2226*4882a593Smuzhiyun * @dev: drm device for the ioctl
2227*4882a593Smuzhiyun * @data: data pointer for the ioctl
2228*4882a593Smuzhiyun * @file_priv: drm file for the ioctl call
2229*4882a593Smuzhiyun *
2230*4882a593Smuzhiyun * Update preferred topology of display unit as per ioctl request. The topology
2231*4882a593Smuzhiyun * is expressed as array of drm_vmw_rect.
2232*4882a593Smuzhiyun * e.g.
2233*4882a593Smuzhiyun * [0 0 640 480] [640 0 800 600] [0 480 640 480]
2234*4882a593Smuzhiyun *
2235*4882a593Smuzhiyun * NOTE:
2236*4882a593Smuzhiyun * The x and y offset (upper left) in drm_vmw_rect cannot be less than 0. Beside
2237*4882a593Smuzhiyun * device limit on topology, x + w and y + h (lower right) cannot be greater
2238*4882a593Smuzhiyun * than INT_MAX. So topology beyond these limits will return with error.
2239*4882a593Smuzhiyun *
2240*4882a593Smuzhiyun * Returns:
2241*4882a593Smuzhiyun * Zero on success, negative errno on failure.
2242*4882a593Smuzhiyun */
vmw_kms_update_layout_ioctl(struct drm_device * dev,void * data,struct drm_file * file_priv)2243*4882a593Smuzhiyun int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
2244*4882a593Smuzhiyun struct drm_file *file_priv)
2245*4882a593Smuzhiyun {
2246*4882a593Smuzhiyun struct vmw_private *dev_priv = vmw_priv(dev);
2247*4882a593Smuzhiyun struct drm_mode_config *mode_config = &dev->mode_config;
2248*4882a593Smuzhiyun struct drm_vmw_update_layout_arg *arg =
2249*4882a593Smuzhiyun (struct drm_vmw_update_layout_arg *)data;
2250*4882a593Smuzhiyun void __user *user_rects;
2251*4882a593Smuzhiyun struct drm_vmw_rect *rects;
2252*4882a593Smuzhiyun struct drm_rect *drm_rects;
2253*4882a593Smuzhiyun unsigned rects_size;
2254*4882a593Smuzhiyun int ret, i;
2255*4882a593Smuzhiyun
2256*4882a593Smuzhiyun if (!arg->num_outputs) {
2257*4882a593Smuzhiyun struct drm_rect def_rect = {0, 0, 800, 600};
2258*4882a593Smuzhiyun VMW_DEBUG_KMS("Default layout x1 = %d y1 = %d x2 = %d y2 = %d\n",
2259*4882a593Smuzhiyun def_rect.x1, def_rect.y1,
2260*4882a593Smuzhiyun def_rect.x2, def_rect.y2);
2261*4882a593Smuzhiyun vmw_du_update_layout(dev_priv, 1, &def_rect);
2262*4882a593Smuzhiyun return 0;
2263*4882a593Smuzhiyun }
2264*4882a593Smuzhiyun
2265*4882a593Smuzhiyun rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
2266*4882a593Smuzhiyun rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
2267*4882a593Smuzhiyun GFP_KERNEL);
2268*4882a593Smuzhiyun if (unlikely(!rects))
2269*4882a593Smuzhiyun return -ENOMEM;
2270*4882a593Smuzhiyun
2271*4882a593Smuzhiyun user_rects = (void __user *)(unsigned long)arg->rects;
2272*4882a593Smuzhiyun ret = copy_from_user(rects, user_rects, rects_size);
2273*4882a593Smuzhiyun if (unlikely(ret != 0)) {
2274*4882a593Smuzhiyun DRM_ERROR("Failed to get rects.\n");
2275*4882a593Smuzhiyun ret = -EFAULT;
2276*4882a593Smuzhiyun goto out_free;
2277*4882a593Smuzhiyun }
2278*4882a593Smuzhiyun
2279*4882a593Smuzhiyun drm_rects = (struct drm_rect *)rects;
2280*4882a593Smuzhiyun
2281*4882a593Smuzhiyun VMW_DEBUG_KMS("Layout count = %u\n", arg->num_outputs);
2282*4882a593Smuzhiyun for (i = 0; i < arg->num_outputs; i++) {
2283*4882a593Smuzhiyun struct drm_vmw_rect curr_rect;
2284*4882a593Smuzhiyun
2285*4882a593Smuzhiyun /* Verify user-space for overflow as kernel use drm_rect */
2286*4882a593Smuzhiyun if ((rects[i].x + rects[i].w > INT_MAX) ||
2287*4882a593Smuzhiyun (rects[i].y + rects[i].h > INT_MAX)) {
2288*4882a593Smuzhiyun ret = -ERANGE;
2289*4882a593Smuzhiyun goto out_free;
2290*4882a593Smuzhiyun }
2291*4882a593Smuzhiyun
2292*4882a593Smuzhiyun curr_rect = rects[i];
2293*4882a593Smuzhiyun drm_rects[i].x1 = curr_rect.x;
2294*4882a593Smuzhiyun drm_rects[i].y1 = curr_rect.y;
2295*4882a593Smuzhiyun drm_rects[i].x2 = curr_rect.x + curr_rect.w;
2296*4882a593Smuzhiyun drm_rects[i].y2 = curr_rect.y + curr_rect.h;
2297*4882a593Smuzhiyun
2298*4882a593Smuzhiyun VMW_DEBUG_KMS(" x1 = %d y1 = %d x2 = %d y2 = %d\n",
2299*4882a593Smuzhiyun drm_rects[i].x1, drm_rects[i].y1,
2300*4882a593Smuzhiyun drm_rects[i].x2, drm_rects[i].y2);
2301*4882a593Smuzhiyun
2302*4882a593Smuzhiyun /*
2303*4882a593Smuzhiyun * Currently this check is limiting the topology within
2304*4882a593Smuzhiyun * mode_config->max (which actually is max texture size
2305*4882a593Smuzhiyun * supported by virtual device). This limit is here to address
2306*4882a593Smuzhiyun * window managers that create a big framebuffer for whole
2307*4882a593Smuzhiyun * topology.
2308*4882a593Smuzhiyun */
2309*4882a593Smuzhiyun if (drm_rects[i].x1 < 0 || drm_rects[i].y1 < 0 ||
2310*4882a593Smuzhiyun drm_rects[i].x2 > mode_config->max_width ||
2311*4882a593Smuzhiyun drm_rects[i].y2 > mode_config->max_height) {
2312*4882a593Smuzhiyun VMW_DEBUG_KMS("Invalid layout %d %d %d %d\n",
2313*4882a593Smuzhiyun drm_rects[i].x1, drm_rects[i].y1,
2314*4882a593Smuzhiyun drm_rects[i].x2, drm_rects[i].y2);
2315*4882a593Smuzhiyun ret = -EINVAL;
2316*4882a593Smuzhiyun goto out_free;
2317*4882a593Smuzhiyun }
2318*4882a593Smuzhiyun }
2319*4882a593Smuzhiyun
2320*4882a593Smuzhiyun ret = vmw_kms_check_display_memory(dev, arg->num_outputs, drm_rects);
2321*4882a593Smuzhiyun
2322*4882a593Smuzhiyun if (ret == 0)
2323*4882a593Smuzhiyun vmw_du_update_layout(dev_priv, arg->num_outputs, drm_rects);
2324*4882a593Smuzhiyun
2325*4882a593Smuzhiyun out_free:
2326*4882a593Smuzhiyun kfree(rects);
2327*4882a593Smuzhiyun return ret;
2328*4882a593Smuzhiyun }
2329*4882a593Smuzhiyun
2330*4882a593Smuzhiyun /**
2331*4882a593Smuzhiyun * vmw_kms_helper_dirty - Helper to build commands and perform actions based
2332*4882a593Smuzhiyun * on a set of cliprects and a set of display units.
2333*4882a593Smuzhiyun *
2334*4882a593Smuzhiyun * @dev_priv: Pointer to a device private structure.
2335*4882a593Smuzhiyun * @framebuffer: Pointer to the framebuffer on which to perform the actions.
2336*4882a593Smuzhiyun * @clips: A set of struct drm_clip_rect. Either this os @vclips must be NULL.
2337*4882a593Smuzhiyun * Cliprects are given in framebuffer coordinates.
2338*4882a593Smuzhiyun * @vclips: A set of struct drm_vmw_rect cliprects. Either this or @clips must
2339*4882a593Smuzhiyun * be NULL. Cliprects are given in source coordinates.
2340*4882a593Smuzhiyun * @dest_x: X coordinate offset for the crtc / destination clip rects.
2341*4882a593Smuzhiyun * @dest_y: Y coordinate offset for the crtc / destination clip rects.
2342*4882a593Smuzhiyun * @num_clips: Number of cliprects in the @clips or @vclips array.
2343*4882a593Smuzhiyun * @increment: Integer with which to increment the clip counter when looping.
2344*4882a593Smuzhiyun * Used to skip a predetermined number of clip rects.
2345*4882a593Smuzhiyun * @dirty: Closure structure. See the description of struct vmw_kms_dirty.
2346*4882a593Smuzhiyun */
vmw_kms_helper_dirty(struct vmw_private * dev_priv,struct vmw_framebuffer * framebuffer,const struct drm_clip_rect * clips,const struct drm_vmw_rect * vclips,s32 dest_x,s32 dest_y,int num_clips,int increment,struct vmw_kms_dirty * dirty)2347*4882a593Smuzhiyun int vmw_kms_helper_dirty(struct vmw_private *dev_priv,
2348*4882a593Smuzhiyun struct vmw_framebuffer *framebuffer,
2349*4882a593Smuzhiyun const struct drm_clip_rect *clips,
2350*4882a593Smuzhiyun const struct drm_vmw_rect *vclips,
2351*4882a593Smuzhiyun s32 dest_x, s32 dest_y,
2352*4882a593Smuzhiyun int num_clips,
2353*4882a593Smuzhiyun int increment,
2354*4882a593Smuzhiyun struct vmw_kms_dirty *dirty)
2355*4882a593Smuzhiyun {
2356*4882a593Smuzhiyun struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
2357*4882a593Smuzhiyun struct drm_crtc *crtc;
2358*4882a593Smuzhiyun u32 num_units = 0;
2359*4882a593Smuzhiyun u32 i, k;
2360*4882a593Smuzhiyun
2361*4882a593Smuzhiyun dirty->dev_priv = dev_priv;
2362*4882a593Smuzhiyun
2363*4882a593Smuzhiyun /* If crtc is passed, no need to iterate over other display units */
2364*4882a593Smuzhiyun if (dirty->crtc) {
2365*4882a593Smuzhiyun units[num_units++] = vmw_crtc_to_du(dirty->crtc);
2366*4882a593Smuzhiyun } else {
2367*4882a593Smuzhiyun list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
2368*4882a593Smuzhiyun head) {
2369*4882a593Smuzhiyun struct drm_plane *plane = crtc->primary;
2370*4882a593Smuzhiyun
2371*4882a593Smuzhiyun if (plane->state->fb == &framebuffer->base)
2372*4882a593Smuzhiyun units[num_units++] = vmw_crtc_to_du(crtc);
2373*4882a593Smuzhiyun }
2374*4882a593Smuzhiyun }
2375*4882a593Smuzhiyun
2376*4882a593Smuzhiyun for (k = 0; k < num_units; k++) {
2377*4882a593Smuzhiyun struct vmw_display_unit *unit = units[k];
2378*4882a593Smuzhiyun s32 crtc_x = unit->crtc.x;
2379*4882a593Smuzhiyun s32 crtc_y = unit->crtc.y;
2380*4882a593Smuzhiyun s32 crtc_width = unit->crtc.mode.hdisplay;
2381*4882a593Smuzhiyun s32 crtc_height = unit->crtc.mode.vdisplay;
2382*4882a593Smuzhiyun const struct drm_clip_rect *clips_ptr = clips;
2383*4882a593Smuzhiyun const struct drm_vmw_rect *vclips_ptr = vclips;
2384*4882a593Smuzhiyun
2385*4882a593Smuzhiyun dirty->unit = unit;
2386*4882a593Smuzhiyun if (dirty->fifo_reserve_size > 0) {
2387*4882a593Smuzhiyun dirty->cmd = VMW_FIFO_RESERVE(dev_priv,
2388*4882a593Smuzhiyun dirty->fifo_reserve_size);
2389*4882a593Smuzhiyun if (!dirty->cmd)
2390*4882a593Smuzhiyun return -ENOMEM;
2391*4882a593Smuzhiyun
2392*4882a593Smuzhiyun memset(dirty->cmd, 0, dirty->fifo_reserve_size);
2393*4882a593Smuzhiyun }
2394*4882a593Smuzhiyun dirty->num_hits = 0;
2395*4882a593Smuzhiyun for (i = 0; i < num_clips; i++, clips_ptr += increment,
2396*4882a593Smuzhiyun vclips_ptr += increment) {
2397*4882a593Smuzhiyun s32 clip_left;
2398*4882a593Smuzhiyun s32 clip_top;
2399*4882a593Smuzhiyun
2400*4882a593Smuzhiyun /*
2401*4882a593Smuzhiyun * Select clip array type. Note that integer type
2402*4882a593Smuzhiyun * in @clips is unsigned short, whereas in @vclips
2403*4882a593Smuzhiyun * it's 32-bit.
2404*4882a593Smuzhiyun */
2405*4882a593Smuzhiyun if (clips) {
2406*4882a593Smuzhiyun dirty->fb_x = (s32) clips_ptr->x1;
2407*4882a593Smuzhiyun dirty->fb_y = (s32) clips_ptr->y1;
2408*4882a593Smuzhiyun dirty->unit_x2 = (s32) clips_ptr->x2 + dest_x -
2409*4882a593Smuzhiyun crtc_x;
2410*4882a593Smuzhiyun dirty->unit_y2 = (s32) clips_ptr->y2 + dest_y -
2411*4882a593Smuzhiyun crtc_y;
2412*4882a593Smuzhiyun } else {
2413*4882a593Smuzhiyun dirty->fb_x = vclips_ptr->x;
2414*4882a593Smuzhiyun dirty->fb_y = vclips_ptr->y;
2415*4882a593Smuzhiyun dirty->unit_x2 = dirty->fb_x + vclips_ptr->w +
2416*4882a593Smuzhiyun dest_x - crtc_x;
2417*4882a593Smuzhiyun dirty->unit_y2 = dirty->fb_y + vclips_ptr->h +
2418*4882a593Smuzhiyun dest_y - crtc_y;
2419*4882a593Smuzhiyun }
2420*4882a593Smuzhiyun
2421*4882a593Smuzhiyun dirty->unit_x1 = dirty->fb_x + dest_x - crtc_x;
2422*4882a593Smuzhiyun dirty->unit_y1 = dirty->fb_y + dest_y - crtc_y;
2423*4882a593Smuzhiyun
2424*4882a593Smuzhiyun /* Skip this clip if it's outside the crtc region */
2425*4882a593Smuzhiyun if (dirty->unit_x1 >= crtc_width ||
2426*4882a593Smuzhiyun dirty->unit_y1 >= crtc_height ||
2427*4882a593Smuzhiyun dirty->unit_x2 <= 0 || dirty->unit_y2 <= 0)
2428*4882a593Smuzhiyun continue;
2429*4882a593Smuzhiyun
2430*4882a593Smuzhiyun /* Clip right and bottom to crtc limits */
2431*4882a593Smuzhiyun dirty->unit_x2 = min_t(s32, dirty->unit_x2,
2432*4882a593Smuzhiyun crtc_width);
2433*4882a593Smuzhiyun dirty->unit_y2 = min_t(s32, dirty->unit_y2,
2434*4882a593Smuzhiyun crtc_height);
2435*4882a593Smuzhiyun
2436*4882a593Smuzhiyun /* Clip left and top to crtc limits */
2437*4882a593Smuzhiyun clip_left = min_t(s32, dirty->unit_x1, 0);
2438*4882a593Smuzhiyun clip_top = min_t(s32, dirty->unit_y1, 0);
2439*4882a593Smuzhiyun dirty->unit_x1 -= clip_left;
2440*4882a593Smuzhiyun dirty->unit_y1 -= clip_top;
2441*4882a593Smuzhiyun dirty->fb_x -= clip_left;
2442*4882a593Smuzhiyun dirty->fb_y -= clip_top;
2443*4882a593Smuzhiyun
2444*4882a593Smuzhiyun dirty->clip(dirty);
2445*4882a593Smuzhiyun }
2446*4882a593Smuzhiyun
2447*4882a593Smuzhiyun dirty->fifo_commit(dirty);
2448*4882a593Smuzhiyun }
2449*4882a593Smuzhiyun
2450*4882a593Smuzhiyun return 0;
2451*4882a593Smuzhiyun }
2452*4882a593Smuzhiyun
2453*4882a593Smuzhiyun /**
2454*4882a593Smuzhiyun * vmw_kms_helper_validation_finish - Helper for post KMS command submission
2455*4882a593Smuzhiyun * cleanup and fencing
2456*4882a593Smuzhiyun * @dev_priv: Pointer to the device-private struct
2457*4882a593Smuzhiyun * @file_priv: Pointer identifying the client when user-space fencing is used
2458*4882a593Smuzhiyun * @ctx: Pointer to the validation context
2459*4882a593Smuzhiyun * @out_fence: If non-NULL, returned refcounted fence-pointer
2460*4882a593Smuzhiyun * @user_fence_rep: If non-NULL, pointer to user-space address area
2461*4882a593Smuzhiyun * in which to copy user-space fence info
2462*4882a593Smuzhiyun */
vmw_kms_helper_validation_finish(struct vmw_private * dev_priv,struct drm_file * file_priv,struct vmw_validation_context * ctx,struct vmw_fence_obj ** out_fence,struct drm_vmw_fence_rep __user * user_fence_rep)2463*4882a593Smuzhiyun void vmw_kms_helper_validation_finish(struct vmw_private *dev_priv,
2464*4882a593Smuzhiyun struct drm_file *file_priv,
2465*4882a593Smuzhiyun struct vmw_validation_context *ctx,
2466*4882a593Smuzhiyun struct vmw_fence_obj **out_fence,
2467*4882a593Smuzhiyun struct drm_vmw_fence_rep __user *
2468*4882a593Smuzhiyun user_fence_rep)
2469*4882a593Smuzhiyun {
2470*4882a593Smuzhiyun struct vmw_fence_obj *fence = NULL;
2471*4882a593Smuzhiyun uint32_t handle = 0;
2472*4882a593Smuzhiyun int ret = 0;
2473*4882a593Smuzhiyun
2474*4882a593Smuzhiyun if (file_priv || user_fence_rep || vmw_validation_has_bos(ctx) ||
2475*4882a593Smuzhiyun out_fence)
2476*4882a593Smuzhiyun ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,
2477*4882a593Smuzhiyun file_priv ? &handle : NULL);
2478*4882a593Smuzhiyun vmw_validation_done(ctx, fence);
2479*4882a593Smuzhiyun if (file_priv)
2480*4882a593Smuzhiyun vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv),
2481*4882a593Smuzhiyun ret, user_fence_rep, fence,
2482*4882a593Smuzhiyun handle, -1);
2483*4882a593Smuzhiyun if (out_fence)
2484*4882a593Smuzhiyun *out_fence = fence;
2485*4882a593Smuzhiyun else
2486*4882a593Smuzhiyun vmw_fence_obj_unreference(&fence);
2487*4882a593Smuzhiyun }
2488*4882a593Smuzhiyun
2489*4882a593Smuzhiyun /**
2490*4882a593Smuzhiyun * vmw_kms_update_proxy - Helper function to update a proxy surface from
2491*4882a593Smuzhiyun * its backing MOB.
2492*4882a593Smuzhiyun *
2493*4882a593Smuzhiyun * @res: Pointer to the surface resource
2494*4882a593Smuzhiyun * @clips: Clip rects in framebuffer (surface) space.
2495*4882a593Smuzhiyun * @num_clips: Number of clips in @clips.
2496*4882a593Smuzhiyun * @increment: Integer with which to increment the clip counter when looping.
2497*4882a593Smuzhiyun * Used to skip a predetermined number of clip rects.
2498*4882a593Smuzhiyun *
2499*4882a593Smuzhiyun * This function makes sure the proxy surface is updated from its backing MOB
2500*4882a593Smuzhiyun * using the region given by @clips. The surface resource @res and its backing
2501*4882a593Smuzhiyun * MOB needs to be reserved and validated on call.
2502*4882a593Smuzhiyun */
vmw_kms_update_proxy(struct vmw_resource * res,const struct drm_clip_rect * clips,unsigned num_clips,int increment)2503*4882a593Smuzhiyun int vmw_kms_update_proxy(struct vmw_resource *res,
2504*4882a593Smuzhiyun const struct drm_clip_rect *clips,
2505*4882a593Smuzhiyun unsigned num_clips,
2506*4882a593Smuzhiyun int increment)
2507*4882a593Smuzhiyun {
2508*4882a593Smuzhiyun struct vmw_private *dev_priv = res->dev_priv;
2509*4882a593Smuzhiyun struct drm_vmw_size *size = &vmw_res_to_srf(res)->metadata.base_size;
2510*4882a593Smuzhiyun struct {
2511*4882a593Smuzhiyun SVGA3dCmdHeader header;
2512*4882a593Smuzhiyun SVGA3dCmdUpdateGBImage body;
2513*4882a593Smuzhiyun } *cmd;
2514*4882a593Smuzhiyun SVGA3dBox *box;
2515*4882a593Smuzhiyun size_t copy_size = 0;
2516*4882a593Smuzhiyun int i;
2517*4882a593Smuzhiyun
2518*4882a593Smuzhiyun if (!clips)
2519*4882a593Smuzhiyun return 0;
2520*4882a593Smuzhiyun
2521*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd) * num_clips);
2522*4882a593Smuzhiyun if (!cmd)
2523*4882a593Smuzhiyun return -ENOMEM;
2524*4882a593Smuzhiyun
2525*4882a593Smuzhiyun for (i = 0; i < num_clips; ++i, clips += increment, ++cmd) {
2526*4882a593Smuzhiyun box = &cmd->body.box;
2527*4882a593Smuzhiyun
2528*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
2529*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body);
2530*4882a593Smuzhiyun cmd->body.image.sid = res->id;
2531*4882a593Smuzhiyun cmd->body.image.face = 0;
2532*4882a593Smuzhiyun cmd->body.image.mipmap = 0;
2533*4882a593Smuzhiyun
2534*4882a593Smuzhiyun if (clips->x1 > size->width || clips->x2 > size->width ||
2535*4882a593Smuzhiyun clips->y1 > size->height || clips->y2 > size->height) {
2536*4882a593Smuzhiyun DRM_ERROR("Invalid clips outsize of framebuffer.\n");
2537*4882a593Smuzhiyun return -EINVAL;
2538*4882a593Smuzhiyun }
2539*4882a593Smuzhiyun
2540*4882a593Smuzhiyun box->x = clips->x1;
2541*4882a593Smuzhiyun box->y = clips->y1;
2542*4882a593Smuzhiyun box->z = 0;
2543*4882a593Smuzhiyun box->w = clips->x2 - clips->x1;
2544*4882a593Smuzhiyun box->h = clips->y2 - clips->y1;
2545*4882a593Smuzhiyun box->d = 1;
2546*4882a593Smuzhiyun
2547*4882a593Smuzhiyun copy_size += sizeof(*cmd);
2548*4882a593Smuzhiyun }
2549*4882a593Smuzhiyun
2550*4882a593Smuzhiyun vmw_fifo_commit(dev_priv, copy_size);
2551*4882a593Smuzhiyun
2552*4882a593Smuzhiyun return 0;
2553*4882a593Smuzhiyun }
2554*4882a593Smuzhiyun
vmw_kms_fbdev_init_data(struct vmw_private * dev_priv,unsigned unit,u32 max_width,u32 max_height,struct drm_connector ** p_con,struct drm_crtc ** p_crtc,struct drm_display_mode ** p_mode)2555*4882a593Smuzhiyun int vmw_kms_fbdev_init_data(struct vmw_private *dev_priv,
2556*4882a593Smuzhiyun unsigned unit,
2557*4882a593Smuzhiyun u32 max_width,
2558*4882a593Smuzhiyun u32 max_height,
2559*4882a593Smuzhiyun struct drm_connector **p_con,
2560*4882a593Smuzhiyun struct drm_crtc **p_crtc,
2561*4882a593Smuzhiyun struct drm_display_mode **p_mode)
2562*4882a593Smuzhiyun {
2563*4882a593Smuzhiyun struct drm_connector *con;
2564*4882a593Smuzhiyun struct vmw_display_unit *du;
2565*4882a593Smuzhiyun struct drm_display_mode *mode;
2566*4882a593Smuzhiyun int i = 0;
2567*4882a593Smuzhiyun int ret = 0;
2568*4882a593Smuzhiyun
2569*4882a593Smuzhiyun mutex_lock(&dev_priv->dev->mode_config.mutex);
2570*4882a593Smuzhiyun list_for_each_entry(con, &dev_priv->dev->mode_config.connector_list,
2571*4882a593Smuzhiyun head) {
2572*4882a593Smuzhiyun if (i == unit)
2573*4882a593Smuzhiyun break;
2574*4882a593Smuzhiyun
2575*4882a593Smuzhiyun ++i;
2576*4882a593Smuzhiyun }
2577*4882a593Smuzhiyun
2578*4882a593Smuzhiyun if (&con->head == &dev_priv->dev->mode_config.connector_list) {
2579*4882a593Smuzhiyun DRM_ERROR("Could not find initial display unit.\n");
2580*4882a593Smuzhiyun ret = -EINVAL;
2581*4882a593Smuzhiyun goto out_unlock;
2582*4882a593Smuzhiyun }
2583*4882a593Smuzhiyun
2584*4882a593Smuzhiyun if (list_empty(&con->modes))
2585*4882a593Smuzhiyun (void) vmw_du_connector_fill_modes(con, max_width, max_height);
2586*4882a593Smuzhiyun
2587*4882a593Smuzhiyun if (list_empty(&con->modes)) {
2588*4882a593Smuzhiyun DRM_ERROR("Could not find initial display mode.\n");
2589*4882a593Smuzhiyun ret = -EINVAL;
2590*4882a593Smuzhiyun goto out_unlock;
2591*4882a593Smuzhiyun }
2592*4882a593Smuzhiyun
2593*4882a593Smuzhiyun du = vmw_connector_to_du(con);
2594*4882a593Smuzhiyun *p_con = con;
2595*4882a593Smuzhiyun *p_crtc = &du->crtc;
2596*4882a593Smuzhiyun
2597*4882a593Smuzhiyun list_for_each_entry(mode, &con->modes, head) {
2598*4882a593Smuzhiyun if (mode->type & DRM_MODE_TYPE_PREFERRED)
2599*4882a593Smuzhiyun break;
2600*4882a593Smuzhiyun }
2601*4882a593Smuzhiyun
2602*4882a593Smuzhiyun if (&mode->head == &con->modes) {
2603*4882a593Smuzhiyun WARN_ONCE(true, "Could not find initial preferred mode.\n");
2604*4882a593Smuzhiyun *p_mode = list_first_entry(&con->modes,
2605*4882a593Smuzhiyun struct drm_display_mode,
2606*4882a593Smuzhiyun head);
2607*4882a593Smuzhiyun } else {
2608*4882a593Smuzhiyun *p_mode = mode;
2609*4882a593Smuzhiyun }
2610*4882a593Smuzhiyun
2611*4882a593Smuzhiyun out_unlock:
2612*4882a593Smuzhiyun mutex_unlock(&dev_priv->dev->mode_config.mutex);
2613*4882a593Smuzhiyun
2614*4882a593Smuzhiyun return ret;
2615*4882a593Smuzhiyun }
2616*4882a593Smuzhiyun
2617*4882a593Smuzhiyun /**
2618*4882a593Smuzhiyun * vmw_kms_create_implicit_placement_proparty - Set up the implicit placement
2619*4882a593Smuzhiyun * property.
2620*4882a593Smuzhiyun *
2621*4882a593Smuzhiyun * @dev_priv: Pointer to a device private struct.
2622*4882a593Smuzhiyun *
2623*4882a593Smuzhiyun * Sets up the implicit placement property unless it's already set up.
2624*4882a593Smuzhiyun */
2625*4882a593Smuzhiyun void
vmw_kms_create_implicit_placement_property(struct vmw_private * dev_priv)2626*4882a593Smuzhiyun vmw_kms_create_implicit_placement_property(struct vmw_private *dev_priv)
2627*4882a593Smuzhiyun {
2628*4882a593Smuzhiyun if (dev_priv->implicit_placement_property)
2629*4882a593Smuzhiyun return;
2630*4882a593Smuzhiyun
2631*4882a593Smuzhiyun dev_priv->implicit_placement_property =
2632*4882a593Smuzhiyun drm_property_create_range(dev_priv->dev,
2633*4882a593Smuzhiyun DRM_MODE_PROP_IMMUTABLE,
2634*4882a593Smuzhiyun "implicit_placement", 0, 1);
2635*4882a593Smuzhiyun }
2636*4882a593Smuzhiyun
2637*4882a593Smuzhiyun /**
2638*4882a593Smuzhiyun * vmw_kms_suspend - Save modesetting state and turn modesetting off.
2639*4882a593Smuzhiyun *
2640*4882a593Smuzhiyun * @dev: Pointer to the drm device
2641*4882a593Smuzhiyun * Return: 0 on success. Negative error code on failure.
2642*4882a593Smuzhiyun */
vmw_kms_suspend(struct drm_device * dev)2643*4882a593Smuzhiyun int vmw_kms_suspend(struct drm_device *dev)
2644*4882a593Smuzhiyun {
2645*4882a593Smuzhiyun struct vmw_private *dev_priv = vmw_priv(dev);
2646*4882a593Smuzhiyun
2647*4882a593Smuzhiyun dev_priv->suspend_state = drm_atomic_helper_suspend(dev);
2648*4882a593Smuzhiyun if (IS_ERR(dev_priv->suspend_state)) {
2649*4882a593Smuzhiyun int ret = PTR_ERR(dev_priv->suspend_state);
2650*4882a593Smuzhiyun
2651*4882a593Smuzhiyun DRM_ERROR("Failed kms suspend: %d\n", ret);
2652*4882a593Smuzhiyun dev_priv->suspend_state = NULL;
2653*4882a593Smuzhiyun
2654*4882a593Smuzhiyun return ret;
2655*4882a593Smuzhiyun }
2656*4882a593Smuzhiyun
2657*4882a593Smuzhiyun return 0;
2658*4882a593Smuzhiyun }
2659*4882a593Smuzhiyun
2660*4882a593Smuzhiyun
2661*4882a593Smuzhiyun /**
2662*4882a593Smuzhiyun * vmw_kms_resume - Re-enable modesetting and restore state
2663*4882a593Smuzhiyun *
2664*4882a593Smuzhiyun * @dev: Pointer to the drm device
2665*4882a593Smuzhiyun * Return: 0 on success. Negative error code on failure.
2666*4882a593Smuzhiyun *
2667*4882a593Smuzhiyun * State is resumed from a previous vmw_kms_suspend(). It's illegal
2668*4882a593Smuzhiyun * to call this function without a previous vmw_kms_suspend().
2669*4882a593Smuzhiyun */
vmw_kms_resume(struct drm_device * dev)2670*4882a593Smuzhiyun int vmw_kms_resume(struct drm_device *dev)
2671*4882a593Smuzhiyun {
2672*4882a593Smuzhiyun struct vmw_private *dev_priv = vmw_priv(dev);
2673*4882a593Smuzhiyun int ret;
2674*4882a593Smuzhiyun
2675*4882a593Smuzhiyun if (WARN_ON(!dev_priv->suspend_state))
2676*4882a593Smuzhiyun return 0;
2677*4882a593Smuzhiyun
2678*4882a593Smuzhiyun ret = drm_atomic_helper_resume(dev, dev_priv->suspend_state);
2679*4882a593Smuzhiyun dev_priv->suspend_state = NULL;
2680*4882a593Smuzhiyun
2681*4882a593Smuzhiyun return ret;
2682*4882a593Smuzhiyun }
2683*4882a593Smuzhiyun
2684*4882a593Smuzhiyun /**
2685*4882a593Smuzhiyun * vmw_kms_lost_device - Notify kms that modesetting capabilities will be lost
2686*4882a593Smuzhiyun *
2687*4882a593Smuzhiyun * @dev: Pointer to the drm device
2688*4882a593Smuzhiyun */
vmw_kms_lost_device(struct drm_device * dev)2689*4882a593Smuzhiyun void vmw_kms_lost_device(struct drm_device *dev)
2690*4882a593Smuzhiyun {
2691*4882a593Smuzhiyun drm_atomic_helper_shutdown(dev);
2692*4882a593Smuzhiyun }
2693*4882a593Smuzhiyun
2694*4882a593Smuzhiyun /**
2695*4882a593Smuzhiyun * vmw_du_helper_plane_update - Helper to do plane update on a display unit.
2696*4882a593Smuzhiyun * @update: The closure structure.
2697*4882a593Smuzhiyun *
2698*4882a593Smuzhiyun * Call this helper after setting callbacks in &vmw_du_update_plane to do plane
2699*4882a593Smuzhiyun * update on display unit.
2700*4882a593Smuzhiyun *
2701*4882a593Smuzhiyun * Return: 0 on success or a negative error code on failure.
2702*4882a593Smuzhiyun */
vmw_du_helper_plane_update(struct vmw_du_update_plane * update)2703*4882a593Smuzhiyun int vmw_du_helper_plane_update(struct vmw_du_update_plane *update)
2704*4882a593Smuzhiyun {
2705*4882a593Smuzhiyun struct drm_plane_state *state = update->plane->state;
2706*4882a593Smuzhiyun struct drm_plane_state *old_state = update->old_state;
2707*4882a593Smuzhiyun struct drm_atomic_helper_damage_iter iter;
2708*4882a593Smuzhiyun struct drm_rect clip;
2709*4882a593Smuzhiyun struct drm_rect bb;
2710*4882a593Smuzhiyun DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
2711*4882a593Smuzhiyun uint32_t reserved_size = 0;
2712*4882a593Smuzhiyun uint32_t submit_size = 0;
2713*4882a593Smuzhiyun uint32_t curr_size = 0;
2714*4882a593Smuzhiyun uint32_t num_hits = 0;
2715*4882a593Smuzhiyun void *cmd_start;
2716*4882a593Smuzhiyun char *cmd_next;
2717*4882a593Smuzhiyun int ret;
2718*4882a593Smuzhiyun
2719*4882a593Smuzhiyun /*
2720*4882a593Smuzhiyun * Iterate in advance to check if really need plane update and find the
2721*4882a593Smuzhiyun * number of clips that actually are in plane src for fifo allocation.
2722*4882a593Smuzhiyun */
2723*4882a593Smuzhiyun drm_atomic_helper_damage_iter_init(&iter, old_state, state);
2724*4882a593Smuzhiyun drm_atomic_for_each_plane_damage(&iter, &clip)
2725*4882a593Smuzhiyun num_hits++;
2726*4882a593Smuzhiyun
2727*4882a593Smuzhiyun if (num_hits == 0)
2728*4882a593Smuzhiyun return 0;
2729*4882a593Smuzhiyun
2730*4882a593Smuzhiyun if (update->vfb->bo) {
2731*4882a593Smuzhiyun struct vmw_framebuffer_bo *vfbbo =
2732*4882a593Smuzhiyun container_of(update->vfb, typeof(*vfbbo), base);
2733*4882a593Smuzhiyun
2734*4882a593Smuzhiyun ret = vmw_validation_add_bo(&val_ctx, vfbbo->buffer, false,
2735*4882a593Smuzhiyun update->cpu_blit);
2736*4882a593Smuzhiyun } else {
2737*4882a593Smuzhiyun struct vmw_framebuffer_surface *vfbs =
2738*4882a593Smuzhiyun container_of(update->vfb, typeof(*vfbs), base);
2739*4882a593Smuzhiyun
2740*4882a593Smuzhiyun ret = vmw_validation_add_resource(&val_ctx, &vfbs->surface->res,
2741*4882a593Smuzhiyun 0, VMW_RES_DIRTY_NONE, NULL,
2742*4882a593Smuzhiyun NULL);
2743*4882a593Smuzhiyun }
2744*4882a593Smuzhiyun
2745*4882a593Smuzhiyun if (ret)
2746*4882a593Smuzhiyun return ret;
2747*4882a593Smuzhiyun
2748*4882a593Smuzhiyun ret = vmw_validation_prepare(&val_ctx, update->mutex, update->intr);
2749*4882a593Smuzhiyun if (ret)
2750*4882a593Smuzhiyun goto out_unref;
2751*4882a593Smuzhiyun
2752*4882a593Smuzhiyun reserved_size = update->calc_fifo_size(update, num_hits);
2753*4882a593Smuzhiyun cmd_start = VMW_FIFO_RESERVE(update->dev_priv, reserved_size);
2754*4882a593Smuzhiyun if (!cmd_start) {
2755*4882a593Smuzhiyun ret = -ENOMEM;
2756*4882a593Smuzhiyun goto out_revert;
2757*4882a593Smuzhiyun }
2758*4882a593Smuzhiyun
2759*4882a593Smuzhiyun cmd_next = cmd_start;
2760*4882a593Smuzhiyun
2761*4882a593Smuzhiyun if (update->post_prepare) {
2762*4882a593Smuzhiyun curr_size = update->post_prepare(update, cmd_next);
2763*4882a593Smuzhiyun cmd_next += curr_size;
2764*4882a593Smuzhiyun submit_size += curr_size;
2765*4882a593Smuzhiyun }
2766*4882a593Smuzhiyun
2767*4882a593Smuzhiyun if (update->pre_clip) {
2768*4882a593Smuzhiyun curr_size = update->pre_clip(update, cmd_next, num_hits);
2769*4882a593Smuzhiyun cmd_next += curr_size;
2770*4882a593Smuzhiyun submit_size += curr_size;
2771*4882a593Smuzhiyun }
2772*4882a593Smuzhiyun
2773*4882a593Smuzhiyun bb.x1 = INT_MAX;
2774*4882a593Smuzhiyun bb.y1 = INT_MAX;
2775*4882a593Smuzhiyun bb.x2 = INT_MIN;
2776*4882a593Smuzhiyun bb.y2 = INT_MIN;
2777*4882a593Smuzhiyun
2778*4882a593Smuzhiyun drm_atomic_helper_damage_iter_init(&iter, old_state, state);
2779*4882a593Smuzhiyun drm_atomic_for_each_plane_damage(&iter, &clip) {
2780*4882a593Smuzhiyun uint32_t fb_x = clip.x1;
2781*4882a593Smuzhiyun uint32_t fb_y = clip.y1;
2782*4882a593Smuzhiyun
2783*4882a593Smuzhiyun vmw_du_translate_to_crtc(state, &clip);
2784*4882a593Smuzhiyun if (update->clip) {
2785*4882a593Smuzhiyun curr_size = update->clip(update, cmd_next, &clip, fb_x,
2786*4882a593Smuzhiyun fb_y);
2787*4882a593Smuzhiyun cmd_next += curr_size;
2788*4882a593Smuzhiyun submit_size += curr_size;
2789*4882a593Smuzhiyun }
2790*4882a593Smuzhiyun bb.x1 = min_t(int, bb.x1, clip.x1);
2791*4882a593Smuzhiyun bb.y1 = min_t(int, bb.y1, clip.y1);
2792*4882a593Smuzhiyun bb.x2 = max_t(int, bb.x2, clip.x2);
2793*4882a593Smuzhiyun bb.y2 = max_t(int, bb.y2, clip.y2);
2794*4882a593Smuzhiyun }
2795*4882a593Smuzhiyun
2796*4882a593Smuzhiyun curr_size = update->post_clip(update, cmd_next, &bb);
2797*4882a593Smuzhiyun submit_size += curr_size;
2798*4882a593Smuzhiyun
2799*4882a593Smuzhiyun if (reserved_size < submit_size)
2800*4882a593Smuzhiyun submit_size = 0;
2801*4882a593Smuzhiyun
2802*4882a593Smuzhiyun vmw_fifo_commit(update->dev_priv, submit_size);
2803*4882a593Smuzhiyun
2804*4882a593Smuzhiyun vmw_kms_helper_validation_finish(update->dev_priv, NULL, &val_ctx,
2805*4882a593Smuzhiyun update->out_fence, NULL);
2806*4882a593Smuzhiyun return ret;
2807*4882a593Smuzhiyun
2808*4882a593Smuzhiyun out_revert:
2809*4882a593Smuzhiyun vmw_validation_revert(&val_ctx);
2810*4882a593Smuzhiyun
2811*4882a593Smuzhiyun out_unref:
2812*4882a593Smuzhiyun vmw_validation_unref_lists(&val_ctx);
2813*4882a593Smuzhiyun return ret;
2814*4882a593Smuzhiyun }
2815