1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 OR MIT
2*4882a593Smuzhiyun /**************************************************************************
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright 2015 VMware, Inc., Palo Alto, CA., USA
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
7*4882a593Smuzhiyun * copy of this software and associated documentation files (the
8*4882a593Smuzhiyun * "Software"), to deal in the Software without restriction, including
9*4882a593Smuzhiyun * without limitation the rights to use, copy, modify, merge, publish,
10*4882a593Smuzhiyun * distribute, sub license, and/or sell copies of the Software, and to
11*4882a593Smuzhiyun * permit persons to whom the Software is furnished to do so, subject to
12*4882a593Smuzhiyun * the following conditions:
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the
15*4882a593Smuzhiyun * next paragraph) shall be included in all copies or substantial portions
16*4882a593Smuzhiyun * of the Software.
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21*4882a593Smuzhiyun * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22*4882a593Smuzhiyun * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23*4882a593Smuzhiyun * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24*4882a593Smuzhiyun * USE OR OTHER DEALINGS IN THE SOFTWARE.
25*4882a593Smuzhiyun *
26*4882a593Smuzhiyun **************************************************************************/
27*4882a593Smuzhiyun /*
28*4882a593Smuzhiyun * This file implements the vmwgfx context binding manager,
29*4882a593Smuzhiyun * The sole reason for having to use this code is that vmware guest
30*4882a593Smuzhiyun * backed contexts can be swapped out to their backing mobs by the device
31*4882a593Smuzhiyun * at any time, also swapped in at any time. At swapin time, the device
32*4882a593Smuzhiyun * validates the context bindings to make sure they point to valid resources.
33*4882a593Smuzhiyun * It's this outside-of-drawcall validation (that can happen at any time),
34*4882a593Smuzhiyun * that makes this code necessary.
35*4882a593Smuzhiyun *
36*4882a593Smuzhiyun * We therefore need to kill any context bindings pointing to a resource
37*4882a593Smuzhiyun * when the resource is swapped out. Furthermore, if the vmwgfx driver has
38*4882a593Smuzhiyun * swapped out the context we can't swap it in again to kill bindings because
39*4882a593Smuzhiyun * of backing mob reservation lockdep violations, so as part of
40*4882a593Smuzhiyun * context swapout, also kill all bindings of a context, so that they are
41*4882a593Smuzhiyun * already killed if a resource to which a binding points
42*4882a593Smuzhiyun * needs to be swapped out.
43*4882a593Smuzhiyun *
44*4882a593Smuzhiyun * Note that a resource can be pointed to by bindings from multiple contexts,
45*4882a593Smuzhiyun * Therefore we can't easily protect this data by a per context mutex
46*4882a593Smuzhiyun * (unless we use deadlock-safe WW mutexes). So we use a global binding_mutex
47*4882a593Smuzhiyun * to protect all binding manager data.
48*4882a593Smuzhiyun *
49*4882a593Smuzhiyun * Finally, any association between a context and a global resource
50*4882a593Smuzhiyun * (surface, shader or even DX query) is conceptually a context binding that
51*4882a593Smuzhiyun * needs to be tracked by this code.
52*4882a593Smuzhiyun */
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #include "vmwgfx_drv.h"
55*4882a593Smuzhiyun #include "vmwgfx_binding.h"
56*4882a593Smuzhiyun #include "device_include/svga3d_reg.h"
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun #define VMW_BINDING_RT_BIT 0
59*4882a593Smuzhiyun #define VMW_BINDING_PS_BIT 1
60*4882a593Smuzhiyun #define VMW_BINDING_SO_T_BIT 2
61*4882a593Smuzhiyun #define VMW_BINDING_VB_BIT 3
62*4882a593Smuzhiyun #define VMW_BINDING_UAV_BIT 4
63*4882a593Smuzhiyun #define VMW_BINDING_CS_UAV_BIT 5
64*4882a593Smuzhiyun #define VMW_BINDING_NUM_BITS 6
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #define VMW_BINDING_PS_SR_BIT 0
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /**
69*4882a593Smuzhiyun * struct vmw_ctx_binding_state - per context binding state
70*4882a593Smuzhiyun *
71*4882a593Smuzhiyun * @dev_priv: Pointer to device private structure.
72*4882a593Smuzhiyun * @list: linked list of individual active bindings.
73*4882a593Smuzhiyun * @render_targets: Render target bindings.
74*4882a593Smuzhiyun * @texture_units: Texture units bindings.
75*4882a593Smuzhiyun * @ds_view: Depth-stencil view binding.
76*4882a593Smuzhiyun * @so_targets: StreamOutput target bindings.
77*4882a593Smuzhiyun * @vertex_buffers: Vertex buffer bindings.
78*4882a593Smuzhiyun * @index_buffer: Index buffer binding.
79*4882a593Smuzhiyun * @per_shader: Per shader-type bindings.
80*4882a593Smuzhiyun * @ua_views: UAV bindings.
81*4882a593Smuzhiyun * @so_state: StreamOutput bindings.
82*4882a593Smuzhiyun * @dirty: Bitmap tracking per binding-type changes that have not yet
83*4882a593Smuzhiyun * been emitted to the device.
84*4882a593Smuzhiyun * @dirty_vb: Bitmap tracking individual vertex buffer binding changes that
85*4882a593Smuzhiyun * have not yet been emitted to the device.
86*4882a593Smuzhiyun * @bind_cmd_buffer: Scratch space used to construct binding commands.
87*4882a593Smuzhiyun * @bind_cmd_count: Number of binding command data entries in @bind_cmd_buffer
88*4882a593Smuzhiyun * @bind_first_slot: Used together with @bind_cmd_buffer to indicate the
89*4882a593Smuzhiyun * device binding slot of the first command data entry in @bind_cmd_buffer.
90*4882a593Smuzhiyun *
91*4882a593Smuzhiyun * Note that this structure also provides storage space for the individual
92*4882a593Smuzhiyun * struct vmw_ctx_binding objects, so that no dynamic allocation is needed
93*4882a593Smuzhiyun * for individual bindings.
94*4882a593Smuzhiyun *
95*4882a593Smuzhiyun */
96*4882a593Smuzhiyun struct vmw_ctx_binding_state {
97*4882a593Smuzhiyun struct vmw_private *dev_priv;
98*4882a593Smuzhiyun struct list_head list;
99*4882a593Smuzhiyun struct vmw_ctx_bindinfo_view render_targets[SVGA3D_RT_MAX];
100*4882a593Smuzhiyun struct vmw_ctx_bindinfo_tex texture_units[SVGA3D_NUM_TEXTURE_UNITS];
101*4882a593Smuzhiyun struct vmw_ctx_bindinfo_view ds_view;
102*4882a593Smuzhiyun struct vmw_ctx_bindinfo_so_target so_targets[SVGA3D_DX_MAX_SOTARGETS];
103*4882a593Smuzhiyun struct vmw_ctx_bindinfo_vb vertex_buffers[SVGA3D_DX_MAX_VERTEXBUFFERS];
104*4882a593Smuzhiyun struct vmw_ctx_bindinfo_ib index_buffer;
105*4882a593Smuzhiyun struct vmw_dx_shader_bindings per_shader[SVGA3D_NUM_SHADERTYPE];
106*4882a593Smuzhiyun struct vmw_ctx_bindinfo_uav ua_views[VMW_MAX_UAV_BIND_TYPE];
107*4882a593Smuzhiyun struct vmw_ctx_bindinfo_so so_state;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun unsigned long dirty;
110*4882a593Smuzhiyun DECLARE_BITMAP(dirty_vb, SVGA3D_DX_MAX_VERTEXBUFFERS);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun u32 bind_cmd_buffer[VMW_MAX_VIEW_BINDINGS];
113*4882a593Smuzhiyun u32 bind_cmd_count;
114*4882a593Smuzhiyun u32 bind_first_slot;
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun static int vmw_binding_scrub_shader(struct vmw_ctx_bindinfo *bi, bool rebind);
118*4882a593Smuzhiyun static int vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo *bi,
119*4882a593Smuzhiyun bool rebind);
120*4882a593Smuzhiyun static int vmw_binding_scrub_texture(struct vmw_ctx_bindinfo *bi, bool rebind);
121*4882a593Smuzhiyun static int vmw_binding_scrub_cb(struct vmw_ctx_bindinfo *bi, bool rebind);
122*4882a593Smuzhiyun static int vmw_binding_scrub_dx_rt(struct vmw_ctx_bindinfo *bi, bool rebind);
123*4882a593Smuzhiyun static int vmw_binding_scrub_sr(struct vmw_ctx_bindinfo *bi, bool rebind);
124*4882a593Smuzhiyun static int vmw_binding_scrub_so_target(struct vmw_ctx_bindinfo *bi, bool rebind);
125*4882a593Smuzhiyun static int vmw_binding_emit_dirty(struct vmw_ctx_binding_state *cbs);
126*4882a593Smuzhiyun static int vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo *bi,
127*4882a593Smuzhiyun bool rebind);
128*4882a593Smuzhiyun static int vmw_binding_scrub_ib(struct vmw_ctx_bindinfo *bi, bool rebind);
129*4882a593Smuzhiyun static int vmw_binding_scrub_vb(struct vmw_ctx_bindinfo *bi, bool rebind);
130*4882a593Smuzhiyun static int vmw_binding_scrub_uav(struct vmw_ctx_bindinfo *bi, bool rebind);
131*4882a593Smuzhiyun static int vmw_binding_scrub_cs_uav(struct vmw_ctx_bindinfo *bi, bool rebind);
132*4882a593Smuzhiyun static int vmw_binding_scrub_so(struct vmw_ctx_bindinfo *bi, bool rebind);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun static void vmw_binding_build_asserts(void) __attribute__ ((unused));
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun typedef int (*vmw_scrub_func)(struct vmw_ctx_bindinfo *, bool);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun /**
139*4882a593Smuzhiyun * struct vmw_binding_info - Per binding type information for the binding
140*4882a593Smuzhiyun * manager
141*4882a593Smuzhiyun *
142*4882a593Smuzhiyun * @size: The size of the struct binding derived from a struct vmw_ctx_bindinfo.
143*4882a593Smuzhiyun * @offsets: array[shader_slot] of offsets to the array[slot]
144*4882a593Smuzhiyun * of struct bindings for the binding type.
145*4882a593Smuzhiyun * @scrub_func: Pointer to the scrub function for this binding type.
146*4882a593Smuzhiyun *
147*4882a593Smuzhiyun * Holds static information to help optimize the binding manager and avoid
148*4882a593Smuzhiyun * an excessive amount of switch statements.
149*4882a593Smuzhiyun */
150*4882a593Smuzhiyun struct vmw_binding_info {
151*4882a593Smuzhiyun size_t size;
152*4882a593Smuzhiyun const size_t *offsets;
153*4882a593Smuzhiyun vmw_scrub_func scrub_func;
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /*
157*4882a593Smuzhiyun * A number of static variables that help determine the scrub func and the
158*4882a593Smuzhiyun * location of the struct vmw_ctx_bindinfo slots for each binding type.
159*4882a593Smuzhiyun */
160*4882a593Smuzhiyun static const size_t vmw_binding_shader_offsets[] = {
161*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[0].shader),
162*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[1].shader),
163*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[2].shader),
164*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[3].shader),
165*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[4].shader),
166*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[5].shader),
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun static const size_t vmw_binding_rt_offsets[] = {
169*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, render_targets),
170*4882a593Smuzhiyun };
171*4882a593Smuzhiyun static const size_t vmw_binding_tex_offsets[] = {
172*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, texture_units),
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun static const size_t vmw_binding_cb_offsets[] = {
175*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[0].const_buffers),
176*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[1].const_buffers),
177*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[2].const_buffers),
178*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[3].const_buffers),
179*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[4].const_buffers),
180*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[5].const_buffers),
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun static const size_t vmw_binding_dx_ds_offsets[] = {
183*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, ds_view),
184*4882a593Smuzhiyun };
185*4882a593Smuzhiyun static const size_t vmw_binding_sr_offsets[] = {
186*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[0].shader_res),
187*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[1].shader_res),
188*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[2].shader_res),
189*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[3].shader_res),
190*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[4].shader_res),
191*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, per_shader[5].shader_res),
192*4882a593Smuzhiyun };
193*4882a593Smuzhiyun static const size_t vmw_binding_so_target_offsets[] = {
194*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, so_targets),
195*4882a593Smuzhiyun };
196*4882a593Smuzhiyun static const size_t vmw_binding_vb_offsets[] = {
197*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, vertex_buffers),
198*4882a593Smuzhiyun };
199*4882a593Smuzhiyun static const size_t vmw_binding_ib_offsets[] = {
200*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, index_buffer),
201*4882a593Smuzhiyun };
202*4882a593Smuzhiyun static const size_t vmw_binding_uav_offsets[] = {
203*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, ua_views[0].views),
204*4882a593Smuzhiyun };
205*4882a593Smuzhiyun static const size_t vmw_binding_cs_uav_offsets[] = {
206*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, ua_views[1].views),
207*4882a593Smuzhiyun };
208*4882a593Smuzhiyun static const size_t vmw_binding_so_offsets[] = {
209*4882a593Smuzhiyun offsetof(struct vmw_ctx_binding_state, so_state),
210*4882a593Smuzhiyun };
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun static const struct vmw_binding_info vmw_binding_infos[] = {
213*4882a593Smuzhiyun [vmw_ctx_binding_shader] = {
214*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_shader),
215*4882a593Smuzhiyun .offsets = vmw_binding_shader_offsets,
216*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_shader},
217*4882a593Smuzhiyun [vmw_ctx_binding_rt] = {
218*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_view),
219*4882a593Smuzhiyun .offsets = vmw_binding_rt_offsets,
220*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_render_target},
221*4882a593Smuzhiyun [vmw_ctx_binding_tex] = {
222*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_tex),
223*4882a593Smuzhiyun .offsets = vmw_binding_tex_offsets,
224*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_texture},
225*4882a593Smuzhiyun [vmw_ctx_binding_cb] = {
226*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_cb),
227*4882a593Smuzhiyun .offsets = vmw_binding_cb_offsets,
228*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_cb},
229*4882a593Smuzhiyun [vmw_ctx_binding_dx_shader] = {
230*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_shader),
231*4882a593Smuzhiyun .offsets = vmw_binding_shader_offsets,
232*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_dx_shader},
233*4882a593Smuzhiyun [vmw_ctx_binding_dx_rt] = {
234*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_view),
235*4882a593Smuzhiyun .offsets = vmw_binding_rt_offsets,
236*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_dx_rt},
237*4882a593Smuzhiyun [vmw_ctx_binding_sr] = {
238*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_view),
239*4882a593Smuzhiyun .offsets = vmw_binding_sr_offsets,
240*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_sr},
241*4882a593Smuzhiyun [vmw_ctx_binding_ds] = {
242*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_view),
243*4882a593Smuzhiyun .offsets = vmw_binding_dx_ds_offsets,
244*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_dx_rt},
245*4882a593Smuzhiyun [vmw_ctx_binding_so_target] = {
246*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_so_target),
247*4882a593Smuzhiyun .offsets = vmw_binding_so_target_offsets,
248*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_so_target},
249*4882a593Smuzhiyun [vmw_ctx_binding_vb] = {
250*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_vb),
251*4882a593Smuzhiyun .offsets = vmw_binding_vb_offsets,
252*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_vb},
253*4882a593Smuzhiyun [vmw_ctx_binding_ib] = {
254*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_ib),
255*4882a593Smuzhiyun .offsets = vmw_binding_ib_offsets,
256*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_ib},
257*4882a593Smuzhiyun [vmw_ctx_binding_uav] = {
258*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_view),
259*4882a593Smuzhiyun .offsets = vmw_binding_uav_offsets,
260*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_uav},
261*4882a593Smuzhiyun [vmw_ctx_binding_cs_uav] = {
262*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_view),
263*4882a593Smuzhiyun .offsets = vmw_binding_cs_uav_offsets,
264*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_cs_uav},
265*4882a593Smuzhiyun [vmw_ctx_binding_so] = {
266*4882a593Smuzhiyun .size = sizeof(struct vmw_ctx_bindinfo_so),
267*4882a593Smuzhiyun .offsets = vmw_binding_so_offsets,
268*4882a593Smuzhiyun .scrub_func = vmw_binding_scrub_so},
269*4882a593Smuzhiyun };
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun /**
272*4882a593Smuzhiyun * vmw_cbs_context - Return a pointer to the context resource of a
273*4882a593Smuzhiyun * context binding state tracker.
274*4882a593Smuzhiyun *
275*4882a593Smuzhiyun * @cbs: The context binding state tracker.
276*4882a593Smuzhiyun *
277*4882a593Smuzhiyun * Provided there are any active bindings, this function will return an
278*4882a593Smuzhiyun * unreferenced pointer to the context resource that owns the context
279*4882a593Smuzhiyun * binding state tracker. If there are no active bindings, this function
280*4882a593Smuzhiyun * will return NULL. Note that the caller must somehow ensure that a reference
281*4882a593Smuzhiyun * is held on the context resource prior to calling this function.
282*4882a593Smuzhiyun */
283*4882a593Smuzhiyun static const struct vmw_resource *
vmw_cbs_context(const struct vmw_ctx_binding_state * cbs)284*4882a593Smuzhiyun vmw_cbs_context(const struct vmw_ctx_binding_state *cbs)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun if (list_empty(&cbs->list))
287*4882a593Smuzhiyun return NULL;
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun return list_first_entry(&cbs->list, struct vmw_ctx_bindinfo,
290*4882a593Smuzhiyun ctx_list)->ctx;
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun /**
294*4882a593Smuzhiyun * vmw_binding_loc - determine the struct vmw_ctx_bindinfo slot location.
295*4882a593Smuzhiyun *
296*4882a593Smuzhiyun * @cbs: Pointer to a struct vmw_ctx_binding state which holds the slot.
297*4882a593Smuzhiyun * @bt: The binding type.
298*4882a593Smuzhiyun * @shader_slot: The shader slot of the binding. If none, then set to 0.
299*4882a593Smuzhiyun * @slot: The slot of the binding.
300*4882a593Smuzhiyun */
301*4882a593Smuzhiyun static struct vmw_ctx_bindinfo *
vmw_binding_loc(struct vmw_ctx_binding_state * cbs,enum vmw_ctx_binding_type bt,u32 shader_slot,u32 slot)302*4882a593Smuzhiyun vmw_binding_loc(struct vmw_ctx_binding_state *cbs,
303*4882a593Smuzhiyun enum vmw_ctx_binding_type bt, u32 shader_slot, u32 slot)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun const struct vmw_binding_info *b = &vmw_binding_infos[bt];
306*4882a593Smuzhiyun size_t offset = b->offsets[shader_slot] + b->size*slot;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun return (struct vmw_ctx_bindinfo *)((u8 *) cbs + offset);
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun /**
312*4882a593Smuzhiyun * vmw_binding_drop: Stop tracking a context binding
313*4882a593Smuzhiyun *
314*4882a593Smuzhiyun * @bi: Pointer to binding tracker storage.
315*4882a593Smuzhiyun *
316*4882a593Smuzhiyun * Stops tracking a context binding, and re-initializes its storage.
317*4882a593Smuzhiyun * Typically used when the context binding is replaced with a binding to
318*4882a593Smuzhiyun * another (or the same, for that matter) resource.
319*4882a593Smuzhiyun */
vmw_binding_drop(struct vmw_ctx_bindinfo * bi)320*4882a593Smuzhiyun static void vmw_binding_drop(struct vmw_ctx_bindinfo *bi)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun list_del(&bi->ctx_list);
323*4882a593Smuzhiyun if (!list_empty(&bi->res_list))
324*4882a593Smuzhiyun list_del(&bi->res_list);
325*4882a593Smuzhiyun bi->ctx = NULL;
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun /**
329*4882a593Smuzhiyun * vmw_binding_add: Start tracking a context binding
330*4882a593Smuzhiyun *
331*4882a593Smuzhiyun * @cbs: Pointer to the context binding state tracker.
332*4882a593Smuzhiyun * @bi: Information about the binding to track.
333*4882a593Smuzhiyun *
334*4882a593Smuzhiyun * Starts tracking the binding in the context binding
335*4882a593Smuzhiyun * state structure @cbs.
336*4882a593Smuzhiyun */
vmw_binding_add(struct vmw_ctx_binding_state * cbs,const struct vmw_ctx_bindinfo * bi,u32 shader_slot,u32 slot)337*4882a593Smuzhiyun void vmw_binding_add(struct vmw_ctx_binding_state *cbs,
338*4882a593Smuzhiyun const struct vmw_ctx_bindinfo *bi,
339*4882a593Smuzhiyun u32 shader_slot, u32 slot)
340*4882a593Smuzhiyun {
341*4882a593Smuzhiyun struct vmw_ctx_bindinfo *loc =
342*4882a593Smuzhiyun vmw_binding_loc(cbs, bi->bt, shader_slot, slot);
343*4882a593Smuzhiyun const struct vmw_binding_info *b = &vmw_binding_infos[bi->bt];
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun if (loc->ctx != NULL)
346*4882a593Smuzhiyun vmw_binding_drop(loc);
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun memcpy(loc, bi, b->size);
349*4882a593Smuzhiyun loc->scrubbed = false;
350*4882a593Smuzhiyun list_add(&loc->ctx_list, &cbs->list);
351*4882a593Smuzhiyun INIT_LIST_HEAD(&loc->res_list);
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun /**
355*4882a593Smuzhiyun * vmw_binding_add_uav_index - Add UAV index for tracking.
356*4882a593Smuzhiyun * @cbs: Pointer to the context binding state tracker.
357*4882a593Smuzhiyun * @slot: UAV type to which bind this index.
358*4882a593Smuzhiyun * @index: The splice index to track.
359*4882a593Smuzhiyun */
vmw_binding_add_uav_index(struct vmw_ctx_binding_state * cbs,uint32 slot,uint32 index)360*4882a593Smuzhiyun void vmw_binding_add_uav_index(struct vmw_ctx_binding_state *cbs, uint32 slot,
361*4882a593Smuzhiyun uint32 index)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun cbs->ua_views[slot].index = index;
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun /**
367*4882a593Smuzhiyun * vmw_binding_transfer: Transfer a context binding tracking entry.
368*4882a593Smuzhiyun *
369*4882a593Smuzhiyun * @cbs: Pointer to the persistent context binding state tracker.
370*4882a593Smuzhiyun * @bi: Information about the binding to track.
371*4882a593Smuzhiyun *
372*4882a593Smuzhiyun */
vmw_binding_transfer(struct vmw_ctx_binding_state * cbs,const struct vmw_ctx_binding_state * from,const struct vmw_ctx_bindinfo * bi)373*4882a593Smuzhiyun static void vmw_binding_transfer(struct vmw_ctx_binding_state *cbs,
374*4882a593Smuzhiyun const struct vmw_ctx_binding_state *from,
375*4882a593Smuzhiyun const struct vmw_ctx_bindinfo *bi)
376*4882a593Smuzhiyun {
377*4882a593Smuzhiyun size_t offset = (unsigned long)bi - (unsigned long)from;
378*4882a593Smuzhiyun struct vmw_ctx_bindinfo *loc = (struct vmw_ctx_bindinfo *)
379*4882a593Smuzhiyun ((unsigned long) cbs + offset);
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun if (loc->ctx != NULL) {
382*4882a593Smuzhiyun WARN_ON(bi->scrubbed);
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun vmw_binding_drop(loc);
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun if (bi->res != NULL) {
388*4882a593Smuzhiyun memcpy(loc, bi, vmw_binding_infos[bi->bt].size);
389*4882a593Smuzhiyun list_add_tail(&loc->ctx_list, &cbs->list);
390*4882a593Smuzhiyun list_add_tail(&loc->res_list, &loc->res->binding_head);
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun /**
395*4882a593Smuzhiyun * vmw_binding_state_kill - Kill all bindings associated with a
396*4882a593Smuzhiyun * struct vmw_ctx_binding state structure, and re-initialize the structure.
397*4882a593Smuzhiyun *
398*4882a593Smuzhiyun * @cbs: Pointer to the context binding state tracker.
399*4882a593Smuzhiyun *
400*4882a593Smuzhiyun * Emits commands to scrub all bindings associated with the
401*4882a593Smuzhiyun * context binding state tracker. Then re-initializes the whole structure.
402*4882a593Smuzhiyun */
vmw_binding_state_kill(struct vmw_ctx_binding_state * cbs)403*4882a593Smuzhiyun void vmw_binding_state_kill(struct vmw_ctx_binding_state *cbs)
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun struct vmw_ctx_bindinfo *entry, *next;
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun vmw_binding_state_scrub(cbs);
408*4882a593Smuzhiyun list_for_each_entry_safe(entry, next, &cbs->list, ctx_list)
409*4882a593Smuzhiyun vmw_binding_drop(entry);
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun /**
413*4882a593Smuzhiyun * vmw_binding_state_scrub - Scrub all bindings associated with a
414*4882a593Smuzhiyun * struct vmw_ctx_binding state structure.
415*4882a593Smuzhiyun *
416*4882a593Smuzhiyun * @cbs: Pointer to the context binding state tracker.
417*4882a593Smuzhiyun *
418*4882a593Smuzhiyun * Emits commands to scrub all bindings associated with the
419*4882a593Smuzhiyun * context binding state tracker.
420*4882a593Smuzhiyun */
vmw_binding_state_scrub(struct vmw_ctx_binding_state * cbs)421*4882a593Smuzhiyun void vmw_binding_state_scrub(struct vmw_ctx_binding_state *cbs)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun struct vmw_ctx_bindinfo *entry;
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun list_for_each_entry(entry, &cbs->list, ctx_list) {
426*4882a593Smuzhiyun if (!entry->scrubbed) {
427*4882a593Smuzhiyun (void) vmw_binding_infos[entry->bt].scrub_func
428*4882a593Smuzhiyun (entry, false);
429*4882a593Smuzhiyun entry->scrubbed = true;
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun (void) vmw_binding_emit_dirty(cbs);
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun /**
437*4882a593Smuzhiyun * vmw_binding_res_list_kill - Kill all bindings on a
438*4882a593Smuzhiyun * resource binding list
439*4882a593Smuzhiyun *
440*4882a593Smuzhiyun * @head: list head of resource binding list
441*4882a593Smuzhiyun *
442*4882a593Smuzhiyun * Kills all bindings associated with a specific resource. Typically
443*4882a593Smuzhiyun * called before the resource is destroyed.
444*4882a593Smuzhiyun */
vmw_binding_res_list_kill(struct list_head * head)445*4882a593Smuzhiyun void vmw_binding_res_list_kill(struct list_head *head)
446*4882a593Smuzhiyun {
447*4882a593Smuzhiyun struct vmw_ctx_bindinfo *entry, *next;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun vmw_binding_res_list_scrub(head);
450*4882a593Smuzhiyun list_for_each_entry_safe(entry, next, head, res_list)
451*4882a593Smuzhiyun vmw_binding_drop(entry);
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun /**
455*4882a593Smuzhiyun * vmw_binding_res_list_scrub - Scrub all bindings on a
456*4882a593Smuzhiyun * resource binding list
457*4882a593Smuzhiyun *
458*4882a593Smuzhiyun * @head: list head of resource binding list
459*4882a593Smuzhiyun *
460*4882a593Smuzhiyun * Scrub all bindings associated with a specific resource. Typically
461*4882a593Smuzhiyun * called before the resource is evicted.
462*4882a593Smuzhiyun */
vmw_binding_res_list_scrub(struct list_head * head)463*4882a593Smuzhiyun void vmw_binding_res_list_scrub(struct list_head *head)
464*4882a593Smuzhiyun {
465*4882a593Smuzhiyun struct vmw_ctx_bindinfo *entry;
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun list_for_each_entry(entry, head, res_list) {
468*4882a593Smuzhiyun if (!entry->scrubbed) {
469*4882a593Smuzhiyun (void) vmw_binding_infos[entry->bt].scrub_func
470*4882a593Smuzhiyun (entry, false);
471*4882a593Smuzhiyun entry->scrubbed = true;
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun list_for_each_entry(entry, head, res_list) {
476*4882a593Smuzhiyun struct vmw_ctx_binding_state *cbs =
477*4882a593Smuzhiyun vmw_context_binding_state(entry->ctx);
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun (void) vmw_binding_emit_dirty(cbs);
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun /**
485*4882a593Smuzhiyun * vmw_binding_state_commit - Commit staged binding info
486*4882a593Smuzhiyun *
487*4882a593Smuzhiyun * @ctx: Pointer to context to commit the staged binding info to.
488*4882a593Smuzhiyun * @from: Staged binding info built during execbuf.
489*4882a593Smuzhiyun * @scrubbed: Transfer only scrubbed bindings.
490*4882a593Smuzhiyun *
491*4882a593Smuzhiyun * Transfers binding info from a temporary structure
492*4882a593Smuzhiyun * (typically used by execbuf) to the persistent
493*4882a593Smuzhiyun * structure in the context. This can be done once commands have been
494*4882a593Smuzhiyun * submitted to hardware
495*4882a593Smuzhiyun */
vmw_binding_state_commit(struct vmw_ctx_binding_state * to,struct vmw_ctx_binding_state * from)496*4882a593Smuzhiyun void vmw_binding_state_commit(struct vmw_ctx_binding_state *to,
497*4882a593Smuzhiyun struct vmw_ctx_binding_state *from)
498*4882a593Smuzhiyun {
499*4882a593Smuzhiyun struct vmw_ctx_bindinfo *entry, *next;
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun list_for_each_entry_safe(entry, next, &from->list, ctx_list) {
502*4882a593Smuzhiyun vmw_binding_transfer(to, from, entry);
503*4882a593Smuzhiyun vmw_binding_drop(entry);
504*4882a593Smuzhiyun }
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun /* Also transfer uav splice indices */
507*4882a593Smuzhiyun to->ua_views[0].index = from->ua_views[0].index;
508*4882a593Smuzhiyun to->ua_views[1].index = from->ua_views[1].index;
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun /**
512*4882a593Smuzhiyun * vmw_binding_rebind_all - Rebind all scrubbed bindings of a context
513*4882a593Smuzhiyun *
514*4882a593Smuzhiyun * @ctx: The context resource
515*4882a593Smuzhiyun *
516*4882a593Smuzhiyun * Walks through the context binding list and rebinds all scrubbed
517*4882a593Smuzhiyun * resources.
518*4882a593Smuzhiyun */
vmw_binding_rebind_all(struct vmw_ctx_binding_state * cbs)519*4882a593Smuzhiyun int vmw_binding_rebind_all(struct vmw_ctx_binding_state *cbs)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun struct vmw_ctx_bindinfo *entry;
522*4882a593Smuzhiyun int ret;
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun list_for_each_entry(entry, &cbs->list, ctx_list) {
525*4882a593Smuzhiyun if (likely(!entry->scrubbed))
526*4882a593Smuzhiyun continue;
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun if ((entry->res == NULL || entry->res->id ==
529*4882a593Smuzhiyun SVGA3D_INVALID_ID))
530*4882a593Smuzhiyun continue;
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun ret = vmw_binding_infos[entry->bt].scrub_func(entry, true);
533*4882a593Smuzhiyun if (unlikely(ret != 0))
534*4882a593Smuzhiyun return ret;
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun entry->scrubbed = false;
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun return vmw_binding_emit_dirty(cbs);
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun /**
543*4882a593Smuzhiyun * vmw_binding_scrub_shader - scrub a shader binding from a context.
544*4882a593Smuzhiyun *
545*4882a593Smuzhiyun * @bi: single binding information.
546*4882a593Smuzhiyun * @rebind: Whether to issue a bind instead of scrub command.
547*4882a593Smuzhiyun */
vmw_binding_scrub_shader(struct vmw_ctx_bindinfo * bi,bool rebind)548*4882a593Smuzhiyun static int vmw_binding_scrub_shader(struct vmw_ctx_bindinfo *bi, bool rebind)
549*4882a593Smuzhiyun {
550*4882a593Smuzhiyun struct vmw_ctx_bindinfo_shader *binding =
551*4882a593Smuzhiyun container_of(bi, typeof(*binding), bi);
552*4882a593Smuzhiyun struct vmw_private *dev_priv = bi->ctx->dev_priv;
553*4882a593Smuzhiyun struct {
554*4882a593Smuzhiyun SVGA3dCmdHeader header;
555*4882a593Smuzhiyun SVGA3dCmdSetShader body;
556*4882a593Smuzhiyun } *cmd;
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
559*4882a593Smuzhiyun if (unlikely(cmd == NULL))
560*4882a593Smuzhiyun return -ENOMEM;
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_SET_SHADER;
563*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body);
564*4882a593Smuzhiyun cmd->body.cid = bi->ctx->id;
565*4882a593Smuzhiyun cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
566*4882a593Smuzhiyun cmd->body.shid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
567*4882a593Smuzhiyun vmw_fifo_commit(dev_priv, sizeof(*cmd));
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun return 0;
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun /**
573*4882a593Smuzhiyun * vmw_binding_scrub_render_target - scrub a render target binding
574*4882a593Smuzhiyun * from a context.
575*4882a593Smuzhiyun *
576*4882a593Smuzhiyun * @bi: single binding information.
577*4882a593Smuzhiyun * @rebind: Whether to issue a bind instead of scrub command.
578*4882a593Smuzhiyun */
vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo * bi,bool rebind)579*4882a593Smuzhiyun static int vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo *bi,
580*4882a593Smuzhiyun bool rebind)
581*4882a593Smuzhiyun {
582*4882a593Smuzhiyun struct vmw_ctx_bindinfo_view *binding =
583*4882a593Smuzhiyun container_of(bi, typeof(*binding), bi);
584*4882a593Smuzhiyun struct vmw_private *dev_priv = bi->ctx->dev_priv;
585*4882a593Smuzhiyun struct {
586*4882a593Smuzhiyun SVGA3dCmdHeader header;
587*4882a593Smuzhiyun SVGA3dCmdSetRenderTarget body;
588*4882a593Smuzhiyun } *cmd;
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
591*4882a593Smuzhiyun if (unlikely(cmd == NULL))
592*4882a593Smuzhiyun return -ENOMEM;
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_SETRENDERTARGET;
595*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body);
596*4882a593Smuzhiyun cmd->body.cid = bi->ctx->id;
597*4882a593Smuzhiyun cmd->body.type = binding->slot;
598*4882a593Smuzhiyun cmd->body.target.sid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
599*4882a593Smuzhiyun cmd->body.target.face = 0;
600*4882a593Smuzhiyun cmd->body.target.mipmap = 0;
601*4882a593Smuzhiyun vmw_fifo_commit(dev_priv, sizeof(*cmd));
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun return 0;
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun /**
607*4882a593Smuzhiyun * vmw_binding_scrub_texture - scrub a texture binding from a context.
608*4882a593Smuzhiyun *
609*4882a593Smuzhiyun * @bi: single binding information.
610*4882a593Smuzhiyun * @rebind: Whether to issue a bind instead of scrub command.
611*4882a593Smuzhiyun *
612*4882a593Smuzhiyun * TODO: Possibly complement this function with a function that takes
613*4882a593Smuzhiyun * a list of texture bindings and combines them to a single command.
614*4882a593Smuzhiyun */
vmw_binding_scrub_texture(struct vmw_ctx_bindinfo * bi,bool rebind)615*4882a593Smuzhiyun static int vmw_binding_scrub_texture(struct vmw_ctx_bindinfo *bi,
616*4882a593Smuzhiyun bool rebind)
617*4882a593Smuzhiyun {
618*4882a593Smuzhiyun struct vmw_ctx_bindinfo_tex *binding =
619*4882a593Smuzhiyun container_of(bi, typeof(*binding), bi);
620*4882a593Smuzhiyun struct vmw_private *dev_priv = bi->ctx->dev_priv;
621*4882a593Smuzhiyun struct {
622*4882a593Smuzhiyun SVGA3dCmdHeader header;
623*4882a593Smuzhiyun struct {
624*4882a593Smuzhiyun SVGA3dCmdSetTextureState c;
625*4882a593Smuzhiyun SVGA3dTextureState s1;
626*4882a593Smuzhiyun } body;
627*4882a593Smuzhiyun } *cmd;
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
630*4882a593Smuzhiyun if (unlikely(cmd == NULL))
631*4882a593Smuzhiyun return -ENOMEM;
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_SETTEXTURESTATE;
634*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body);
635*4882a593Smuzhiyun cmd->body.c.cid = bi->ctx->id;
636*4882a593Smuzhiyun cmd->body.s1.stage = binding->texture_stage;
637*4882a593Smuzhiyun cmd->body.s1.name = SVGA3D_TS_BIND_TEXTURE;
638*4882a593Smuzhiyun cmd->body.s1.value = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
639*4882a593Smuzhiyun vmw_fifo_commit(dev_priv, sizeof(*cmd));
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun return 0;
642*4882a593Smuzhiyun }
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun /**
645*4882a593Smuzhiyun * vmw_binding_scrub_dx_shader - scrub a dx shader binding from a context.
646*4882a593Smuzhiyun *
647*4882a593Smuzhiyun * @bi: single binding information.
648*4882a593Smuzhiyun * @rebind: Whether to issue a bind instead of scrub command.
649*4882a593Smuzhiyun */
vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo * bi,bool rebind)650*4882a593Smuzhiyun static int vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo *bi, bool rebind)
651*4882a593Smuzhiyun {
652*4882a593Smuzhiyun struct vmw_ctx_bindinfo_shader *binding =
653*4882a593Smuzhiyun container_of(bi, typeof(*binding), bi);
654*4882a593Smuzhiyun struct vmw_private *dev_priv = bi->ctx->dev_priv;
655*4882a593Smuzhiyun struct {
656*4882a593Smuzhiyun SVGA3dCmdHeader header;
657*4882a593Smuzhiyun SVGA3dCmdDXSetShader body;
658*4882a593Smuzhiyun } *cmd;
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE_DX(dev_priv, sizeof(*cmd), bi->ctx->id);
661*4882a593Smuzhiyun if (unlikely(cmd == NULL))
662*4882a593Smuzhiyun return -ENOMEM;
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_DX_SET_SHADER;
665*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body);
666*4882a593Smuzhiyun cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
667*4882a593Smuzhiyun cmd->body.shaderId = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
668*4882a593Smuzhiyun vmw_fifo_commit(dev_priv, sizeof(*cmd));
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun return 0;
671*4882a593Smuzhiyun }
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun /**
674*4882a593Smuzhiyun * vmw_binding_scrub_cb - scrub a constant buffer binding from a context.
675*4882a593Smuzhiyun *
676*4882a593Smuzhiyun * @bi: single binding information.
677*4882a593Smuzhiyun * @rebind: Whether to issue a bind instead of scrub command.
678*4882a593Smuzhiyun */
vmw_binding_scrub_cb(struct vmw_ctx_bindinfo * bi,bool rebind)679*4882a593Smuzhiyun static int vmw_binding_scrub_cb(struct vmw_ctx_bindinfo *bi, bool rebind)
680*4882a593Smuzhiyun {
681*4882a593Smuzhiyun struct vmw_ctx_bindinfo_cb *binding =
682*4882a593Smuzhiyun container_of(bi, typeof(*binding), bi);
683*4882a593Smuzhiyun struct vmw_private *dev_priv = bi->ctx->dev_priv;
684*4882a593Smuzhiyun struct {
685*4882a593Smuzhiyun SVGA3dCmdHeader header;
686*4882a593Smuzhiyun SVGA3dCmdDXSetSingleConstantBuffer body;
687*4882a593Smuzhiyun } *cmd;
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE_DX(dev_priv, sizeof(*cmd), bi->ctx->id);
690*4882a593Smuzhiyun if (unlikely(cmd == NULL))
691*4882a593Smuzhiyun return -ENOMEM;
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER;
694*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body);
695*4882a593Smuzhiyun cmd->body.slot = binding->slot;
696*4882a593Smuzhiyun cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
697*4882a593Smuzhiyun if (rebind) {
698*4882a593Smuzhiyun cmd->body.offsetInBytes = binding->offset;
699*4882a593Smuzhiyun cmd->body.sizeInBytes = binding->size;
700*4882a593Smuzhiyun cmd->body.sid = bi->res->id;
701*4882a593Smuzhiyun } else {
702*4882a593Smuzhiyun cmd->body.offsetInBytes = 0;
703*4882a593Smuzhiyun cmd->body.sizeInBytes = 0;
704*4882a593Smuzhiyun cmd->body.sid = SVGA3D_INVALID_ID;
705*4882a593Smuzhiyun }
706*4882a593Smuzhiyun vmw_fifo_commit(dev_priv, sizeof(*cmd));
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun return 0;
709*4882a593Smuzhiyun }
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun /**
712*4882a593Smuzhiyun * vmw_collect_view_ids - Build view id data for a view binding command
713*4882a593Smuzhiyun * without checking which bindings actually need to be emitted
714*4882a593Smuzhiyun *
715*4882a593Smuzhiyun * @cbs: Pointer to the context's struct vmw_ctx_binding_state
716*4882a593Smuzhiyun * @bi: Pointer to where the binding info array is stored in @cbs
717*4882a593Smuzhiyun * @max_num: Maximum number of entries in the @bi array.
718*4882a593Smuzhiyun *
719*4882a593Smuzhiyun * Scans the @bi array for bindings and builds a buffer of view id data.
720*4882a593Smuzhiyun * Stops at the first non-existing binding in the @bi array.
721*4882a593Smuzhiyun * On output, @cbs->bind_cmd_count contains the number of bindings to be
722*4882a593Smuzhiyun * emitted, @cbs->bind_first_slot is set to zero, and @cbs->bind_cmd_buffer
723*4882a593Smuzhiyun * contains the command data.
724*4882a593Smuzhiyun */
vmw_collect_view_ids(struct vmw_ctx_binding_state * cbs,const struct vmw_ctx_bindinfo * bi,u32 max_num)725*4882a593Smuzhiyun static void vmw_collect_view_ids(struct vmw_ctx_binding_state *cbs,
726*4882a593Smuzhiyun const struct vmw_ctx_bindinfo *bi,
727*4882a593Smuzhiyun u32 max_num)
728*4882a593Smuzhiyun {
729*4882a593Smuzhiyun const struct vmw_ctx_bindinfo_view *biv =
730*4882a593Smuzhiyun container_of(bi, struct vmw_ctx_bindinfo_view, bi);
731*4882a593Smuzhiyun unsigned long i;
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun cbs->bind_cmd_count = 0;
734*4882a593Smuzhiyun cbs->bind_first_slot = 0;
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun for (i = 0; i < max_num; ++i, ++biv) {
737*4882a593Smuzhiyun if (!biv->bi.ctx)
738*4882a593Smuzhiyun break;
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun cbs->bind_cmd_buffer[cbs->bind_cmd_count++] =
741*4882a593Smuzhiyun ((biv->bi.scrubbed) ?
742*4882a593Smuzhiyun SVGA3D_INVALID_ID : biv->bi.res->id);
743*4882a593Smuzhiyun }
744*4882a593Smuzhiyun }
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun /**
747*4882a593Smuzhiyun * vmw_collect_dirty_view_ids - Build view id data for a view binding command
748*4882a593Smuzhiyun *
749*4882a593Smuzhiyun * @cbs: Pointer to the context's struct vmw_ctx_binding_state
750*4882a593Smuzhiyun * @bi: Pointer to where the binding info array is stored in @cbs
751*4882a593Smuzhiyun * @dirty: Bitmap indicating which bindings need to be emitted.
752*4882a593Smuzhiyun * @max_num: Maximum number of entries in the @bi array.
753*4882a593Smuzhiyun *
754*4882a593Smuzhiyun * Scans the @bi array for bindings that need to be emitted and
755*4882a593Smuzhiyun * builds a buffer of view id data.
756*4882a593Smuzhiyun * On output, @cbs->bind_cmd_count contains the number of bindings to be
757*4882a593Smuzhiyun * emitted, @cbs->bind_first_slot indicates the index of the first emitted
758*4882a593Smuzhiyun * binding, and @cbs->bind_cmd_buffer contains the command data.
759*4882a593Smuzhiyun */
vmw_collect_dirty_view_ids(struct vmw_ctx_binding_state * cbs,const struct vmw_ctx_bindinfo * bi,unsigned long * dirty,u32 max_num)760*4882a593Smuzhiyun static void vmw_collect_dirty_view_ids(struct vmw_ctx_binding_state *cbs,
761*4882a593Smuzhiyun const struct vmw_ctx_bindinfo *bi,
762*4882a593Smuzhiyun unsigned long *dirty,
763*4882a593Smuzhiyun u32 max_num)
764*4882a593Smuzhiyun {
765*4882a593Smuzhiyun const struct vmw_ctx_bindinfo_view *biv =
766*4882a593Smuzhiyun container_of(bi, struct vmw_ctx_bindinfo_view, bi);
767*4882a593Smuzhiyun unsigned long i, next_bit;
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun cbs->bind_cmd_count = 0;
770*4882a593Smuzhiyun i = find_first_bit(dirty, max_num);
771*4882a593Smuzhiyun next_bit = i;
772*4882a593Smuzhiyun cbs->bind_first_slot = i;
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun biv += i;
775*4882a593Smuzhiyun for (; i < max_num; ++i, ++biv) {
776*4882a593Smuzhiyun cbs->bind_cmd_buffer[cbs->bind_cmd_count++] =
777*4882a593Smuzhiyun ((!biv->bi.ctx || biv->bi.scrubbed) ?
778*4882a593Smuzhiyun SVGA3D_INVALID_ID : biv->bi.res->id);
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun if (next_bit == i) {
781*4882a593Smuzhiyun next_bit = find_next_bit(dirty, max_num, i + 1);
782*4882a593Smuzhiyun if (next_bit >= max_num)
783*4882a593Smuzhiyun break;
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun }
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun /**
789*4882a593Smuzhiyun * vmw_binding_emit_set_sr - Issue delayed DX shader resource binding commands
790*4882a593Smuzhiyun *
791*4882a593Smuzhiyun * @cbs: Pointer to the context's struct vmw_ctx_binding_state
792*4882a593Smuzhiyun */
vmw_emit_set_sr(struct vmw_ctx_binding_state * cbs,int shader_slot)793*4882a593Smuzhiyun static int vmw_emit_set_sr(struct vmw_ctx_binding_state *cbs,
794*4882a593Smuzhiyun int shader_slot)
795*4882a593Smuzhiyun {
796*4882a593Smuzhiyun const struct vmw_ctx_bindinfo *loc =
797*4882a593Smuzhiyun &cbs->per_shader[shader_slot].shader_res[0].bi;
798*4882a593Smuzhiyun struct {
799*4882a593Smuzhiyun SVGA3dCmdHeader header;
800*4882a593Smuzhiyun SVGA3dCmdDXSetShaderResources body;
801*4882a593Smuzhiyun } *cmd;
802*4882a593Smuzhiyun size_t cmd_size, view_id_size;
803*4882a593Smuzhiyun const struct vmw_resource *ctx = vmw_cbs_context(cbs);
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun vmw_collect_dirty_view_ids(cbs, loc,
806*4882a593Smuzhiyun cbs->per_shader[shader_slot].dirty_sr,
807*4882a593Smuzhiyun SVGA3D_DX_MAX_SRVIEWS);
808*4882a593Smuzhiyun if (cbs->bind_cmd_count == 0)
809*4882a593Smuzhiyun return 0;
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun view_id_size = cbs->bind_cmd_count*sizeof(uint32);
812*4882a593Smuzhiyun cmd_size = sizeof(*cmd) + view_id_size;
813*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE_DX(ctx->dev_priv, cmd_size, ctx->id);
814*4882a593Smuzhiyun if (unlikely(cmd == NULL))
815*4882a593Smuzhiyun return -ENOMEM;
816*4882a593Smuzhiyun
817*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_DX_SET_SHADER_RESOURCES;
818*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body) + view_id_size;
819*4882a593Smuzhiyun cmd->body.type = shader_slot + SVGA3D_SHADERTYPE_MIN;
820*4882a593Smuzhiyun cmd->body.startView = cbs->bind_first_slot;
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun vmw_fifo_commit(ctx->dev_priv, cmd_size);
825*4882a593Smuzhiyun bitmap_clear(cbs->per_shader[shader_slot].dirty_sr,
826*4882a593Smuzhiyun cbs->bind_first_slot, cbs->bind_cmd_count);
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun return 0;
829*4882a593Smuzhiyun }
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun /**
832*4882a593Smuzhiyun * vmw_binding_emit_set_rt - Issue delayed DX rendertarget binding commands
833*4882a593Smuzhiyun *
834*4882a593Smuzhiyun * @cbs: Pointer to the context's struct vmw_ctx_binding_state
835*4882a593Smuzhiyun */
vmw_emit_set_rt(struct vmw_ctx_binding_state * cbs)836*4882a593Smuzhiyun static int vmw_emit_set_rt(struct vmw_ctx_binding_state *cbs)
837*4882a593Smuzhiyun {
838*4882a593Smuzhiyun const struct vmw_ctx_bindinfo *loc = &cbs->render_targets[0].bi;
839*4882a593Smuzhiyun struct {
840*4882a593Smuzhiyun SVGA3dCmdHeader header;
841*4882a593Smuzhiyun SVGA3dCmdDXSetRenderTargets body;
842*4882a593Smuzhiyun } *cmd;
843*4882a593Smuzhiyun size_t cmd_size, view_id_size;
844*4882a593Smuzhiyun const struct vmw_resource *ctx = vmw_cbs_context(cbs);
845*4882a593Smuzhiyun
846*4882a593Smuzhiyun vmw_collect_view_ids(cbs, loc, SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS);
847*4882a593Smuzhiyun view_id_size = cbs->bind_cmd_count*sizeof(uint32);
848*4882a593Smuzhiyun cmd_size = sizeof(*cmd) + view_id_size;
849*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE_DX(ctx->dev_priv, cmd_size, ctx->id);
850*4882a593Smuzhiyun if (unlikely(cmd == NULL))
851*4882a593Smuzhiyun return -ENOMEM;
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_DX_SET_RENDERTARGETS;
854*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body) + view_id_size;
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun if (cbs->ds_view.bi.ctx && !cbs->ds_view.bi.scrubbed)
857*4882a593Smuzhiyun cmd->body.depthStencilViewId = cbs->ds_view.bi.res->id;
858*4882a593Smuzhiyun else
859*4882a593Smuzhiyun cmd->body.depthStencilViewId = SVGA3D_INVALID_ID;
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
862*4882a593Smuzhiyun
863*4882a593Smuzhiyun vmw_fifo_commit(ctx->dev_priv, cmd_size);
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun return 0;
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun }
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun /**
870*4882a593Smuzhiyun * vmw_collect_so_targets - Build SVGA3dSoTarget data for a binding command
871*4882a593Smuzhiyun * without checking which bindings actually need to be emitted
872*4882a593Smuzhiyun *
873*4882a593Smuzhiyun * @cbs: Pointer to the context's struct vmw_ctx_binding_state
874*4882a593Smuzhiyun * @bi: Pointer to where the binding info array is stored in @cbs
875*4882a593Smuzhiyun * @max_num: Maximum number of entries in the @bi array.
876*4882a593Smuzhiyun *
877*4882a593Smuzhiyun * Scans the @bi array for bindings and builds a buffer of SVGA3dSoTarget data.
878*4882a593Smuzhiyun * Stops at the first non-existing binding in the @bi array.
879*4882a593Smuzhiyun * On output, @cbs->bind_cmd_count contains the number of bindings to be
880*4882a593Smuzhiyun * emitted, @cbs->bind_first_slot is set to zero, and @cbs->bind_cmd_buffer
881*4882a593Smuzhiyun * contains the command data.
882*4882a593Smuzhiyun */
vmw_collect_so_targets(struct vmw_ctx_binding_state * cbs,const struct vmw_ctx_bindinfo * bi,u32 max_num)883*4882a593Smuzhiyun static void vmw_collect_so_targets(struct vmw_ctx_binding_state *cbs,
884*4882a593Smuzhiyun const struct vmw_ctx_bindinfo *bi,
885*4882a593Smuzhiyun u32 max_num)
886*4882a593Smuzhiyun {
887*4882a593Smuzhiyun const struct vmw_ctx_bindinfo_so_target *biso =
888*4882a593Smuzhiyun container_of(bi, struct vmw_ctx_bindinfo_so_target, bi);
889*4882a593Smuzhiyun unsigned long i;
890*4882a593Smuzhiyun SVGA3dSoTarget *so_buffer = (SVGA3dSoTarget *) cbs->bind_cmd_buffer;
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun cbs->bind_cmd_count = 0;
893*4882a593Smuzhiyun cbs->bind_first_slot = 0;
894*4882a593Smuzhiyun
895*4882a593Smuzhiyun for (i = 0; i < max_num; ++i, ++biso, ++so_buffer,
896*4882a593Smuzhiyun ++cbs->bind_cmd_count) {
897*4882a593Smuzhiyun if (!biso->bi.ctx)
898*4882a593Smuzhiyun break;
899*4882a593Smuzhiyun
900*4882a593Smuzhiyun if (!biso->bi.scrubbed) {
901*4882a593Smuzhiyun so_buffer->sid = biso->bi.res->id;
902*4882a593Smuzhiyun so_buffer->offset = biso->offset;
903*4882a593Smuzhiyun so_buffer->sizeInBytes = biso->size;
904*4882a593Smuzhiyun } else {
905*4882a593Smuzhiyun so_buffer->sid = SVGA3D_INVALID_ID;
906*4882a593Smuzhiyun so_buffer->offset = 0;
907*4882a593Smuzhiyun so_buffer->sizeInBytes = 0;
908*4882a593Smuzhiyun }
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun }
911*4882a593Smuzhiyun
912*4882a593Smuzhiyun /**
913*4882a593Smuzhiyun * vmw_emit_set_so_target - Issue delayed streamout binding commands
914*4882a593Smuzhiyun *
915*4882a593Smuzhiyun * @cbs: Pointer to the context's struct vmw_ctx_binding_state
916*4882a593Smuzhiyun */
vmw_emit_set_so_target(struct vmw_ctx_binding_state * cbs)917*4882a593Smuzhiyun static int vmw_emit_set_so_target(struct vmw_ctx_binding_state *cbs)
918*4882a593Smuzhiyun {
919*4882a593Smuzhiyun const struct vmw_ctx_bindinfo *loc = &cbs->so_targets[0].bi;
920*4882a593Smuzhiyun struct {
921*4882a593Smuzhiyun SVGA3dCmdHeader header;
922*4882a593Smuzhiyun SVGA3dCmdDXSetSOTargets body;
923*4882a593Smuzhiyun } *cmd;
924*4882a593Smuzhiyun size_t cmd_size, so_target_size;
925*4882a593Smuzhiyun const struct vmw_resource *ctx = vmw_cbs_context(cbs);
926*4882a593Smuzhiyun
927*4882a593Smuzhiyun vmw_collect_so_targets(cbs, loc, SVGA3D_DX_MAX_SOTARGETS);
928*4882a593Smuzhiyun if (cbs->bind_cmd_count == 0)
929*4882a593Smuzhiyun return 0;
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun so_target_size = cbs->bind_cmd_count*sizeof(SVGA3dSoTarget);
932*4882a593Smuzhiyun cmd_size = sizeof(*cmd) + so_target_size;
933*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE_DX(ctx->dev_priv, cmd_size, ctx->id);
934*4882a593Smuzhiyun if (unlikely(cmd == NULL))
935*4882a593Smuzhiyun return -ENOMEM;
936*4882a593Smuzhiyun
937*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_DX_SET_SOTARGETS;
938*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body) + so_target_size;
939*4882a593Smuzhiyun memcpy(&cmd[1], cbs->bind_cmd_buffer, so_target_size);
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun vmw_fifo_commit(ctx->dev_priv, cmd_size);
942*4882a593Smuzhiyun
943*4882a593Smuzhiyun return 0;
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun }
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun /**
948*4882a593Smuzhiyun * vmw_binding_emit_dirty_ps - Issue delayed per shader binding commands
949*4882a593Smuzhiyun *
950*4882a593Smuzhiyun * @cbs: Pointer to the context's struct vmw_ctx_binding_state
951*4882a593Smuzhiyun *
952*4882a593Smuzhiyun */
vmw_binding_emit_dirty_ps(struct vmw_ctx_binding_state * cbs)953*4882a593Smuzhiyun static int vmw_binding_emit_dirty_ps(struct vmw_ctx_binding_state *cbs)
954*4882a593Smuzhiyun {
955*4882a593Smuzhiyun struct vmw_dx_shader_bindings *sb = &cbs->per_shader[0];
956*4882a593Smuzhiyun u32 i;
957*4882a593Smuzhiyun int ret;
958*4882a593Smuzhiyun
959*4882a593Smuzhiyun for (i = 0; i < SVGA3D_NUM_SHADERTYPE_DX10; ++i, ++sb) {
960*4882a593Smuzhiyun if (!test_bit(VMW_BINDING_PS_SR_BIT, &sb->dirty))
961*4882a593Smuzhiyun continue;
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun ret = vmw_emit_set_sr(cbs, i);
964*4882a593Smuzhiyun if (ret)
965*4882a593Smuzhiyun break;
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun __clear_bit(VMW_BINDING_PS_SR_BIT, &sb->dirty);
968*4882a593Smuzhiyun }
969*4882a593Smuzhiyun
970*4882a593Smuzhiyun return 0;
971*4882a593Smuzhiyun }
972*4882a593Smuzhiyun
973*4882a593Smuzhiyun /**
974*4882a593Smuzhiyun * vmw_collect_dirty_vbs - Build SVGA3dVertexBuffer data for a
975*4882a593Smuzhiyun * SVGA3dCmdDXSetVertexBuffers command
976*4882a593Smuzhiyun *
977*4882a593Smuzhiyun * @cbs: Pointer to the context's struct vmw_ctx_binding_state
978*4882a593Smuzhiyun * @bi: Pointer to where the binding info array is stored in @cbs
979*4882a593Smuzhiyun * @dirty: Bitmap indicating which bindings need to be emitted.
980*4882a593Smuzhiyun * @max_num: Maximum number of entries in the @bi array.
981*4882a593Smuzhiyun *
982*4882a593Smuzhiyun * Scans the @bi array for bindings that need to be emitted and
983*4882a593Smuzhiyun * builds a buffer of SVGA3dVertexBuffer data.
984*4882a593Smuzhiyun * On output, @cbs->bind_cmd_count contains the number of bindings to be
985*4882a593Smuzhiyun * emitted, @cbs->bind_first_slot indicates the index of the first emitted
986*4882a593Smuzhiyun * binding, and @cbs->bind_cmd_buffer contains the command data.
987*4882a593Smuzhiyun */
vmw_collect_dirty_vbs(struct vmw_ctx_binding_state * cbs,const struct vmw_ctx_bindinfo * bi,unsigned long * dirty,u32 max_num)988*4882a593Smuzhiyun static void vmw_collect_dirty_vbs(struct vmw_ctx_binding_state *cbs,
989*4882a593Smuzhiyun const struct vmw_ctx_bindinfo *bi,
990*4882a593Smuzhiyun unsigned long *dirty,
991*4882a593Smuzhiyun u32 max_num)
992*4882a593Smuzhiyun {
993*4882a593Smuzhiyun const struct vmw_ctx_bindinfo_vb *biv =
994*4882a593Smuzhiyun container_of(bi, struct vmw_ctx_bindinfo_vb, bi);
995*4882a593Smuzhiyun unsigned long i, next_bit;
996*4882a593Smuzhiyun SVGA3dVertexBuffer *vbs = (SVGA3dVertexBuffer *) &cbs->bind_cmd_buffer;
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun cbs->bind_cmd_count = 0;
999*4882a593Smuzhiyun i = find_first_bit(dirty, max_num);
1000*4882a593Smuzhiyun next_bit = i;
1001*4882a593Smuzhiyun cbs->bind_first_slot = i;
1002*4882a593Smuzhiyun
1003*4882a593Smuzhiyun biv += i;
1004*4882a593Smuzhiyun for (; i < max_num; ++i, ++biv, ++vbs) {
1005*4882a593Smuzhiyun if (!biv->bi.ctx || biv->bi.scrubbed) {
1006*4882a593Smuzhiyun vbs->sid = SVGA3D_INVALID_ID;
1007*4882a593Smuzhiyun vbs->stride = 0;
1008*4882a593Smuzhiyun vbs->offset = 0;
1009*4882a593Smuzhiyun } else {
1010*4882a593Smuzhiyun vbs->sid = biv->bi.res->id;
1011*4882a593Smuzhiyun vbs->stride = biv->stride;
1012*4882a593Smuzhiyun vbs->offset = biv->offset;
1013*4882a593Smuzhiyun }
1014*4882a593Smuzhiyun cbs->bind_cmd_count++;
1015*4882a593Smuzhiyun if (next_bit == i) {
1016*4882a593Smuzhiyun next_bit = find_next_bit(dirty, max_num, i + 1);
1017*4882a593Smuzhiyun if (next_bit >= max_num)
1018*4882a593Smuzhiyun break;
1019*4882a593Smuzhiyun }
1020*4882a593Smuzhiyun }
1021*4882a593Smuzhiyun }
1022*4882a593Smuzhiyun
1023*4882a593Smuzhiyun /**
1024*4882a593Smuzhiyun * vmw_binding_emit_set_vb - Issue delayed vertex buffer binding commands
1025*4882a593Smuzhiyun *
1026*4882a593Smuzhiyun * @cbs: Pointer to the context's struct vmw_ctx_binding_state
1027*4882a593Smuzhiyun *
1028*4882a593Smuzhiyun */
vmw_emit_set_vb(struct vmw_ctx_binding_state * cbs)1029*4882a593Smuzhiyun static int vmw_emit_set_vb(struct vmw_ctx_binding_state *cbs)
1030*4882a593Smuzhiyun {
1031*4882a593Smuzhiyun const struct vmw_ctx_bindinfo *loc =
1032*4882a593Smuzhiyun &cbs->vertex_buffers[0].bi;
1033*4882a593Smuzhiyun struct {
1034*4882a593Smuzhiyun SVGA3dCmdHeader header;
1035*4882a593Smuzhiyun SVGA3dCmdDXSetVertexBuffers body;
1036*4882a593Smuzhiyun } *cmd;
1037*4882a593Smuzhiyun size_t cmd_size, set_vb_size;
1038*4882a593Smuzhiyun const struct vmw_resource *ctx = vmw_cbs_context(cbs);
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun vmw_collect_dirty_vbs(cbs, loc, cbs->dirty_vb,
1041*4882a593Smuzhiyun SVGA3D_DX_MAX_VERTEXBUFFERS);
1042*4882a593Smuzhiyun if (cbs->bind_cmd_count == 0)
1043*4882a593Smuzhiyun return 0;
1044*4882a593Smuzhiyun
1045*4882a593Smuzhiyun set_vb_size = cbs->bind_cmd_count*sizeof(SVGA3dVertexBuffer);
1046*4882a593Smuzhiyun cmd_size = sizeof(*cmd) + set_vb_size;
1047*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE_DX(ctx->dev_priv, cmd_size, ctx->id);
1048*4882a593Smuzhiyun if (unlikely(cmd == NULL))
1049*4882a593Smuzhiyun return -ENOMEM;
1050*4882a593Smuzhiyun
1051*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS;
1052*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body) + set_vb_size;
1053*4882a593Smuzhiyun cmd->body.startBuffer = cbs->bind_first_slot;
1054*4882a593Smuzhiyun
1055*4882a593Smuzhiyun memcpy(&cmd[1], cbs->bind_cmd_buffer, set_vb_size);
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun vmw_fifo_commit(ctx->dev_priv, cmd_size);
1058*4882a593Smuzhiyun bitmap_clear(cbs->dirty_vb,
1059*4882a593Smuzhiyun cbs->bind_first_slot, cbs->bind_cmd_count);
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun return 0;
1062*4882a593Smuzhiyun }
1063*4882a593Smuzhiyun
vmw_emit_set_uav(struct vmw_ctx_binding_state * cbs)1064*4882a593Smuzhiyun static int vmw_emit_set_uav(struct vmw_ctx_binding_state *cbs)
1065*4882a593Smuzhiyun {
1066*4882a593Smuzhiyun const struct vmw_ctx_bindinfo *loc = &cbs->ua_views[0].views[0].bi;
1067*4882a593Smuzhiyun struct {
1068*4882a593Smuzhiyun SVGA3dCmdHeader header;
1069*4882a593Smuzhiyun SVGA3dCmdDXSetUAViews body;
1070*4882a593Smuzhiyun } *cmd;
1071*4882a593Smuzhiyun size_t cmd_size, view_id_size;
1072*4882a593Smuzhiyun const struct vmw_resource *ctx = vmw_cbs_context(cbs);
1073*4882a593Smuzhiyun
1074*4882a593Smuzhiyun vmw_collect_view_ids(cbs, loc, SVGA3D_MAX_UAVIEWS);
1075*4882a593Smuzhiyun view_id_size = cbs->bind_cmd_count*sizeof(uint32);
1076*4882a593Smuzhiyun cmd_size = sizeof(*cmd) + view_id_size;
1077*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE_DX(ctx->dev_priv, cmd_size, ctx->id);
1078*4882a593Smuzhiyun if (!cmd)
1079*4882a593Smuzhiyun return -ENOMEM;
1080*4882a593Smuzhiyun
1081*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_DX_SET_UA_VIEWS;
1082*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body) + view_id_size;
1083*4882a593Smuzhiyun
1084*4882a593Smuzhiyun /* Splice index is specified user-space */
1085*4882a593Smuzhiyun cmd->body.uavSpliceIndex = cbs->ua_views[0].index;
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
1088*4882a593Smuzhiyun
1089*4882a593Smuzhiyun vmw_fifo_commit(ctx->dev_priv, cmd_size);
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun return 0;
1092*4882a593Smuzhiyun }
1093*4882a593Smuzhiyun
vmw_emit_set_cs_uav(struct vmw_ctx_binding_state * cbs)1094*4882a593Smuzhiyun static int vmw_emit_set_cs_uav(struct vmw_ctx_binding_state *cbs)
1095*4882a593Smuzhiyun {
1096*4882a593Smuzhiyun const struct vmw_ctx_bindinfo *loc = &cbs->ua_views[1].views[0].bi;
1097*4882a593Smuzhiyun struct {
1098*4882a593Smuzhiyun SVGA3dCmdHeader header;
1099*4882a593Smuzhiyun SVGA3dCmdDXSetCSUAViews body;
1100*4882a593Smuzhiyun } *cmd;
1101*4882a593Smuzhiyun size_t cmd_size, view_id_size;
1102*4882a593Smuzhiyun const struct vmw_resource *ctx = vmw_cbs_context(cbs);
1103*4882a593Smuzhiyun
1104*4882a593Smuzhiyun vmw_collect_view_ids(cbs, loc, SVGA3D_MAX_UAVIEWS);
1105*4882a593Smuzhiyun view_id_size = cbs->bind_cmd_count*sizeof(uint32);
1106*4882a593Smuzhiyun cmd_size = sizeof(*cmd) + view_id_size;
1107*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE_DX(ctx->dev_priv, cmd_size, ctx->id);
1108*4882a593Smuzhiyun if (!cmd)
1109*4882a593Smuzhiyun return -ENOMEM;
1110*4882a593Smuzhiyun
1111*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_DX_SET_CS_UA_VIEWS;
1112*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body) + view_id_size;
1113*4882a593Smuzhiyun
1114*4882a593Smuzhiyun /* Start index is specified user-space */
1115*4882a593Smuzhiyun cmd->body.startIndex = cbs->ua_views[1].index;
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun vmw_fifo_commit(ctx->dev_priv, cmd_size);
1120*4882a593Smuzhiyun
1121*4882a593Smuzhiyun return 0;
1122*4882a593Smuzhiyun }
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun /**
1125*4882a593Smuzhiyun * vmw_binding_emit_dirty - Issue delayed binding commands
1126*4882a593Smuzhiyun *
1127*4882a593Smuzhiyun * @cbs: Pointer to the context's struct vmw_ctx_binding_state
1128*4882a593Smuzhiyun *
1129*4882a593Smuzhiyun * This function issues the delayed binding commands that arise from
1130*4882a593Smuzhiyun * previous scrub / unscrub calls. These binding commands are typically
1131*4882a593Smuzhiyun * commands that batch a number of bindings and therefore it makes sense
1132*4882a593Smuzhiyun * to delay them.
1133*4882a593Smuzhiyun */
vmw_binding_emit_dirty(struct vmw_ctx_binding_state * cbs)1134*4882a593Smuzhiyun static int vmw_binding_emit_dirty(struct vmw_ctx_binding_state *cbs)
1135*4882a593Smuzhiyun {
1136*4882a593Smuzhiyun int ret = 0;
1137*4882a593Smuzhiyun unsigned long hit = 0;
1138*4882a593Smuzhiyun
1139*4882a593Smuzhiyun while ((hit = find_next_bit(&cbs->dirty, VMW_BINDING_NUM_BITS, hit))
1140*4882a593Smuzhiyun < VMW_BINDING_NUM_BITS) {
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun switch (hit) {
1143*4882a593Smuzhiyun case VMW_BINDING_RT_BIT:
1144*4882a593Smuzhiyun ret = vmw_emit_set_rt(cbs);
1145*4882a593Smuzhiyun break;
1146*4882a593Smuzhiyun case VMW_BINDING_PS_BIT:
1147*4882a593Smuzhiyun ret = vmw_binding_emit_dirty_ps(cbs);
1148*4882a593Smuzhiyun break;
1149*4882a593Smuzhiyun case VMW_BINDING_SO_T_BIT:
1150*4882a593Smuzhiyun ret = vmw_emit_set_so_target(cbs);
1151*4882a593Smuzhiyun break;
1152*4882a593Smuzhiyun case VMW_BINDING_VB_BIT:
1153*4882a593Smuzhiyun ret = vmw_emit_set_vb(cbs);
1154*4882a593Smuzhiyun break;
1155*4882a593Smuzhiyun case VMW_BINDING_UAV_BIT:
1156*4882a593Smuzhiyun ret = vmw_emit_set_uav(cbs);
1157*4882a593Smuzhiyun break;
1158*4882a593Smuzhiyun case VMW_BINDING_CS_UAV_BIT:
1159*4882a593Smuzhiyun ret = vmw_emit_set_cs_uav(cbs);
1160*4882a593Smuzhiyun break;
1161*4882a593Smuzhiyun default:
1162*4882a593Smuzhiyun BUG();
1163*4882a593Smuzhiyun }
1164*4882a593Smuzhiyun if (ret)
1165*4882a593Smuzhiyun return ret;
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun __clear_bit(hit, &cbs->dirty);
1168*4882a593Smuzhiyun hit++;
1169*4882a593Smuzhiyun }
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun return 0;
1172*4882a593Smuzhiyun }
1173*4882a593Smuzhiyun
1174*4882a593Smuzhiyun /**
1175*4882a593Smuzhiyun * vmw_binding_scrub_sr - Schedule a dx shaderresource binding
1176*4882a593Smuzhiyun * scrub from a context
1177*4882a593Smuzhiyun *
1178*4882a593Smuzhiyun * @bi: single binding information.
1179*4882a593Smuzhiyun * @rebind: Whether to issue a bind instead of scrub command.
1180*4882a593Smuzhiyun */
vmw_binding_scrub_sr(struct vmw_ctx_bindinfo * bi,bool rebind)1181*4882a593Smuzhiyun static int vmw_binding_scrub_sr(struct vmw_ctx_bindinfo *bi, bool rebind)
1182*4882a593Smuzhiyun {
1183*4882a593Smuzhiyun struct vmw_ctx_bindinfo_view *biv =
1184*4882a593Smuzhiyun container_of(bi, struct vmw_ctx_bindinfo_view, bi);
1185*4882a593Smuzhiyun struct vmw_ctx_binding_state *cbs =
1186*4882a593Smuzhiyun vmw_context_binding_state(bi->ctx);
1187*4882a593Smuzhiyun
1188*4882a593Smuzhiyun __set_bit(biv->slot, cbs->per_shader[biv->shader_slot].dirty_sr);
1189*4882a593Smuzhiyun __set_bit(VMW_BINDING_PS_SR_BIT,
1190*4882a593Smuzhiyun &cbs->per_shader[biv->shader_slot].dirty);
1191*4882a593Smuzhiyun __set_bit(VMW_BINDING_PS_BIT, &cbs->dirty);
1192*4882a593Smuzhiyun
1193*4882a593Smuzhiyun return 0;
1194*4882a593Smuzhiyun }
1195*4882a593Smuzhiyun
1196*4882a593Smuzhiyun /**
1197*4882a593Smuzhiyun * vmw_binding_scrub_dx_rt - Schedule a dx rendertarget binding
1198*4882a593Smuzhiyun * scrub from a context
1199*4882a593Smuzhiyun *
1200*4882a593Smuzhiyun * @bi: single binding information.
1201*4882a593Smuzhiyun * @rebind: Whether to issue a bind instead of scrub command.
1202*4882a593Smuzhiyun */
vmw_binding_scrub_dx_rt(struct vmw_ctx_bindinfo * bi,bool rebind)1203*4882a593Smuzhiyun static int vmw_binding_scrub_dx_rt(struct vmw_ctx_bindinfo *bi, bool rebind)
1204*4882a593Smuzhiyun {
1205*4882a593Smuzhiyun struct vmw_ctx_binding_state *cbs =
1206*4882a593Smuzhiyun vmw_context_binding_state(bi->ctx);
1207*4882a593Smuzhiyun
1208*4882a593Smuzhiyun __set_bit(VMW_BINDING_RT_BIT, &cbs->dirty);
1209*4882a593Smuzhiyun
1210*4882a593Smuzhiyun return 0;
1211*4882a593Smuzhiyun }
1212*4882a593Smuzhiyun
1213*4882a593Smuzhiyun /**
1214*4882a593Smuzhiyun * vmw_binding_scrub_so_target - Schedule a dx streamoutput buffer binding
1215*4882a593Smuzhiyun * scrub from a context
1216*4882a593Smuzhiyun *
1217*4882a593Smuzhiyun * @bi: single binding information.
1218*4882a593Smuzhiyun * @rebind: Whether to issue a bind instead of scrub command.
1219*4882a593Smuzhiyun */
vmw_binding_scrub_so_target(struct vmw_ctx_bindinfo * bi,bool rebind)1220*4882a593Smuzhiyun static int vmw_binding_scrub_so_target(struct vmw_ctx_bindinfo *bi, bool rebind)
1221*4882a593Smuzhiyun {
1222*4882a593Smuzhiyun struct vmw_ctx_binding_state *cbs =
1223*4882a593Smuzhiyun vmw_context_binding_state(bi->ctx);
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun __set_bit(VMW_BINDING_SO_T_BIT, &cbs->dirty);
1226*4882a593Smuzhiyun
1227*4882a593Smuzhiyun return 0;
1228*4882a593Smuzhiyun }
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun /**
1231*4882a593Smuzhiyun * vmw_binding_scrub_vb - Schedule a dx vertex buffer binding
1232*4882a593Smuzhiyun * scrub from a context
1233*4882a593Smuzhiyun *
1234*4882a593Smuzhiyun * @bi: single binding information.
1235*4882a593Smuzhiyun * @rebind: Whether to issue a bind instead of scrub command.
1236*4882a593Smuzhiyun */
vmw_binding_scrub_vb(struct vmw_ctx_bindinfo * bi,bool rebind)1237*4882a593Smuzhiyun static int vmw_binding_scrub_vb(struct vmw_ctx_bindinfo *bi, bool rebind)
1238*4882a593Smuzhiyun {
1239*4882a593Smuzhiyun struct vmw_ctx_bindinfo_vb *bivb =
1240*4882a593Smuzhiyun container_of(bi, struct vmw_ctx_bindinfo_vb, bi);
1241*4882a593Smuzhiyun struct vmw_ctx_binding_state *cbs =
1242*4882a593Smuzhiyun vmw_context_binding_state(bi->ctx);
1243*4882a593Smuzhiyun
1244*4882a593Smuzhiyun __set_bit(bivb->slot, cbs->dirty_vb);
1245*4882a593Smuzhiyun __set_bit(VMW_BINDING_VB_BIT, &cbs->dirty);
1246*4882a593Smuzhiyun
1247*4882a593Smuzhiyun return 0;
1248*4882a593Smuzhiyun }
1249*4882a593Smuzhiyun
1250*4882a593Smuzhiyun /**
1251*4882a593Smuzhiyun * vmw_binding_scrub_ib - scrub a dx index buffer binding from a context
1252*4882a593Smuzhiyun *
1253*4882a593Smuzhiyun * @bi: single binding information.
1254*4882a593Smuzhiyun * @rebind: Whether to issue a bind instead of scrub command.
1255*4882a593Smuzhiyun */
vmw_binding_scrub_ib(struct vmw_ctx_bindinfo * bi,bool rebind)1256*4882a593Smuzhiyun static int vmw_binding_scrub_ib(struct vmw_ctx_bindinfo *bi, bool rebind)
1257*4882a593Smuzhiyun {
1258*4882a593Smuzhiyun struct vmw_ctx_bindinfo_ib *binding =
1259*4882a593Smuzhiyun container_of(bi, typeof(*binding), bi);
1260*4882a593Smuzhiyun struct vmw_private *dev_priv = bi->ctx->dev_priv;
1261*4882a593Smuzhiyun struct {
1262*4882a593Smuzhiyun SVGA3dCmdHeader header;
1263*4882a593Smuzhiyun SVGA3dCmdDXSetIndexBuffer body;
1264*4882a593Smuzhiyun } *cmd;
1265*4882a593Smuzhiyun
1266*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE_DX(dev_priv, sizeof(*cmd), bi->ctx->id);
1267*4882a593Smuzhiyun if (unlikely(cmd == NULL))
1268*4882a593Smuzhiyun return -ENOMEM;
1269*4882a593Smuzhiyun
1270*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_DX_SET_INDEX_BUFFER;
1271*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body);
1272*4882a593Smuzhiyun if (rebind) {
1273*4882a593Smuzhiyun cmd->body.sid = bi->res->id;
1274*4882a593Smuzhiyun cmd->body.format = binding->format;
1275*4882a593Smuzhiyun cmd->body.offset = binding->offset;
1276*4882a593Smuzhiyun } else {
1277*4882a593Smuzhiyun cmd->body.sid = SVGA3D_INVALID_ID;
1278*4882a593Smuzhiyun cmd->body.format = 0;
1279*4882a593Smuzhiyun cmd->body.offset = 0;
1280*4882a593Smuzhiyun }
1281*4882a593Smuzhiyun
1282*4882a593Smuzhiyun vmw_fifo_commit(dev_priv, sizeof(*cmd));
1283*4882a593Smuzhiyun
1284*4882a593Smuzhiyun return 0;
1285*4882a593Smuzhiyun }
1286*4882a593Smuzhiyun
vmw_binding_scrub_uav(struct vmw_ctx_bindinfo * bi,bool rebind)1287*4882a593Smuzhiyun static int vmw_binding_scrub_uav(struct vmw_ctx_bindinfo *bi, bool rebind)
1288*4882a593Smuzhiyun {
1289*4882a593Smuzhiyun struct vmw_ctx_binding_state *cbs = vmw_context_binding_state(bi->ctx);
1290*4882a593Smuzhiyun
1291*4882a593Smuzhiyun __set_bit(VMW_BINDING_UAV_BIT, &cbs->dirty);
1292*4882a593Smuzhiyun return 0;
1293*4882a593Smuzhiyun }
1294*4882a593Smuzhiyun
vmw_binding_scrub_cs_uav(struct vmw_ctx_bindinfo * bi,bool rebind)1295*4882a593Smuzhiyun static int vmw_binding_scrub_cs_uav(struct vmw_ctx_bindinfo *bi, bool rebind)
1296*4882a593Smuzhiyun {
1297*4882a593Smuzhiyun struct vmw_ctx_binding_state *cbs = vmw_context_binding_state(bi->ctx);
1298*4882a593Smuzhiyun
1299*4882a593Smuzhiyun __set_bit(VMW_BINDING_CS_UAV_BIT, &cbs->dirty);
1300*4882a593Smuzhiyun return 0;
1301*4882a593Smuzhiyun }
1302*4882a593Smuzhiyun
1303*4882a593Smuzhiyun /**
1304*4882a593Smuzhiyun * vmw_binding_scrub_so - Scrub a streamoutput binding from context.
1305*4882a593Smuzhiyun * @bi: Single binding information.
1306*4882a593Smuzhiyun * @rebind: Whether to issue a bind instead of scrub command.
1307*4882a593Smuzhiyun */
vmw_binding_scrub_so(struct vmw_ctx_bindinfo * bi,bool rebind)1308*4882a593Smuzhiyun static int vmw_binding_scrub_so(struct vmw_ctx_bindinfo *bi, bool rebind)
1309*4882a593Smuzhiyun {
1310*4882a593Smuzhiyun struct vmw_ctx_bindinfo_so *binding =
1311*4882a593Smuzhiyun container_of(bi, typeof(*binding), bi);
1312*4882a593Smuzhiyun struct vmw_private *dev_priv = bi->ctx->dev_priv;
1313*4882a593Smuzhiyun struct {
1314*4882a593Smuzhiyun SVGA3dCmdHeader header;
1315*4882a593Smuzhiyun SVGA3dCmdDXSetStreamOutput body;
1316*4882a593Smuzhiyun } *cmd;
1317*4882a593Smuzhiyun
1318*4882a593Smuzhiyun cmd = VMW_FIFO_RESERVE_DX(dev_priv, sizeof(*cmd), bi->ctx->id);
1319*4882a593Smuzhiyun if (!cmd)
1320*4882a593Smuzhiyun return -ENOMEM;
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun cmd->header.id = SVGA_3D_CMD_DX_SET_STREAMOUTPUT;
1323*4882a593Smuzhiyun cmd->header.size = sizeof(cmd->body);
1324*4882a593Smuzhiyun cmd->body.soid = rebind ? bi->res->id : SVGA3D_INVALID_ID;
1325*4882a593Smuzhiyun vmw_fifo_commit(dev_priv, sizeof(*cmd));
1326*4882a593Smuzhiyun
1327*4882a593Smuzhiyun return 0;
1328*4882a593Smuzhiyun }
1329*4882a593Smuzhiyun
1330*4882a593Smuzhiyun /**
1331*4882a593Smuzhiyun * vmw_binding_state_alloc - Allocate a struct vmw_ctx_binding_state with
1332*4882a593Smuzhiyun * memory accounting.
1333*4882a593Smuzhiyun *
1334*4882a593Smuzhiyun * @dev_priv: Pointer to a device private structure.
1335*4882a593Smuzhiyun *
1336*4882a593Smuzhiyun * Returns a pointer to a newly allocated struct or an error pointer on error.
1337*4882a593Smuzhiyun */
1338*4882a593Smuzhiyun struct vmw_ctx_binding_state *
vmw_binding_state_alloc(struct vmw_private * dev_priv)1339*4882a593Smuzhiyun vmw_binding_state_alloc(struct vmw_private *dev_priv)
1340*4882a593Smuzhiyun {
1341*4882a593Smuzhiyun struct vmw_ctx_binding_state *cbs;
1342*4882a593Smuzhiyun struct ttm_operation_ctx ctx = {
1343*4882a593Smuzhiyun .interruptible = false,
1344*4882a593Smuzhiyun .no_wait_gpu = false
1345*4882a593Smuzhiyun };
1346*4882a593Smuzhiyun int ret;
1347*4882a593Smuzhiyun
1348*4882a593Smuzhiyun ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv), sizeof(*cbs),
1349*4882a593Smuzhiyun &ctx);
1350*4882a593Smuzhiyun if (ret)
1351*4882a593Smuzhiyun return ERR_PTR(ret);
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun cbs = vzalloc(sizeof(*cbs));
1354*4882a593Smuzhiyun if (!cbs) {
1355*4882a593Smuzhiyun ttm_mem_global_free(vmw_mem_glob(dev_priv), sizeof(*cbs));
1356*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
1357*4882a593Smuzhiyun }
1358*4882a593Smuzhiyun
1359*4882a593Smuzhiyun cbs->dev_priv = dev_priv;
1360*4882a593Smuzhiyun INIT_LIST_HEAD(&cbs->list);
1361*4882a593Smuzhiyun
1362*4882a593Smuzhiyun return cbs;
1363*4882a593Smuzhiyun }
1364*4882a593Smuzhiyun
1365*4882a593Smuzhiyun /**
1366*4882a593Smuzhiyun * vmw_binding_state_free - Free a struct vmw_ctx_binding_state and its
1367*4882a593Smuzhiyun * memory accounting info.
1368*4882a593Smuzhiyun *
1369*4882a593Smuzhiyun * @cbs: Pointer to the struct vmw_ctx_binding_state to be freed.
1370*4882a593Smuzhiyun */
vmw_binding_state_free(struct vmw_ctx_binding_state * cbs)1371*4882a593Smuzhiyun void vmw_binding_state_free(struct vmw_ctx_binding_state *cbs)
1372*4882a593Smuzhiyun {
1373*4882a593Smuzhiyun struct vmw_private *dev_priv = cbs->dev_priv;
1374*4882a593Smuzhiyun
1375*4882a593Smuzhiyun vfree(cbs);
1376*4882a593Smuzhiyun ttm_mem_global_free(vmw_mem_glob(dev_priv), sizeof(*cbs));
1377*4882a593Smuzhiyun }
1378*4882a593Smuzhiyun
1379*4882a593Smuzhiyun /**
1380*4882a593Smuzhiyun * vmw_binding_state_list - Get the binding list of a
1381*4882a593Smuzhiyun * struct vmw_ctx_binding_state
1382*4882a593Smuzhiyun *
1383*4882a593Smuzhiyun * @cbs: Pointer to the struct vmw_ctx_binding_state
1384*4882a593Smuzhiyun *
1385*4882a593Smuzhiyun * Returns the binding list which can be used to traverse through the bindings
1386*4882a593Smuzhiyun * and access the resource information of all bindings.
1387*4882a593Smuzhiyun */
vmw_binding_state_list(struct vmw_ctx_binding_state * cbs)1388*4882a593Smuzhiyun struct list_head *vmw_binding_state_list(struct vmw_ctx_binding_state *cbs)
1389*4882a593Smuzhiyun {
1390*4882a593Smuzhiyun return &cbs->list;
1391*4882a593Smuzhiyun }
1392*4882a593Smuzhiyun
1393*4882a593Smuzhiyun /**
1394*4882a593Smuzhiyun * vmwgfx_binding_state_reset - clear a struct vmw_ctx_binding_state
1395*4882a593Smuzhiyun *
1396*4882a593Smuzhiyun * @cbs: Pointer to the struct vmw_ctx_binding_state to be cleared
1397*4882a593Smuzhiyun *
1398*4882a593Smuzhiyun * Drops all bindings registered in @cbs. No device binding actions are
1399*4882a593Smuzhiyun * performed.
1400*4882a593Smuzhiyun */
vmw_binding_state_reset(struct vmw_ctx_binding_state * cbs)1401*4882a593Smuzhiyun void vmw_binding_state_reset(struct vmw_ctx_binding_state *cbs)
1402*4882a593Smuzhiyun {
1403*4882a593Smuzhiyun struct vmw_ctx_bindinfo *entry, *next;
1404*4882a593Smuzhiyun
1405*4882a593Smuzhiyun list_for_each_entry_safe(entry, next, &cbs->list, ctx_list)
1406*4882a593Smuzhiyun vmw_binding_drop(entry);
1407*4882a593Smuzhiyun }
1408*4882a593Smuzhiyun
1409*4882a593Smuzhiyun /**
1410*4882a593Smuzhiyun * vmw_binding_dirtying - Return whether a binding type is dirtying its resource
1411*4882a593Smuzhiyun * @binding_type: The binding type
1412*4882a593Smuzhiyun *
1413*4882a593Smuzhiyun * Each time a resource is put on the validation list as the result of a
1414*4882a593Smuzhiyun * context binding referencing it, we need to determine whether that resource
1415*4882a593Smuzhiyun * will be dirtied (written to by the GPU) as a result of the corresponding
1416*4882a593Smuzhiyun * GPU operation. Currently rendertarget-, depth-stencil-, stream-output-target
1417*4882a593Smuzhiyun * and unordered access view bindings are capable of dirtying its resource.
1418*4882a593Smuzhiyun *
1419*4882a593Smuzhiyun * Return: Whether the binding type dirties the resource its binding points to.
1420*4882a593Smuzhiyun */
vmw_binding_dirtying(enum vmw_ctx_binding_type binding_type)1421*4882a593Smuzhiyun u32 vmw_binding_dirtying(enum vmw_ctx_binding_type binding_type)
1422*4882a593Smuzhiyun {
1423*4882a593Smuzhiyun static u32 is_binding_dirtying[vmw_ctx_binding_max] = {
1424*4882a593Smuzhiyun [vmw_ctx_binding_rt] = VMW_RES_DIRTY_SET,
1425*4882a593Smuzhiyun [vmw_ctx_binding_dx_rt] = VMW_RES_DIRTY_SET,
1426*4882a593Smuzhiyun [vmw_ctx_binding_ds] = VMW_RES_DIRTY_SET,
1427*4882a593Smuzhiyun [vmw_ctx_binding_so_target] = VMW_RES_DIRTY_SET,
1428*4882a593Smuzhiyun [vmw_ctx_binding_uav] = VMW_RES_DIRTY_SET,
1429*4882a593Smuzhiyun [vmw_ctx_binding_cs_uav] = VMW_RES_DIRTY_SET,
1430*4882a593Smuzhiyun };
1431*4882a593Smuzhiyun
1432*4882a593Smuzhiyun /* Review this function as new bindings are added. */
1433*4882a593Smuzhiyun BUILD_BUG_ON(vmw_ctx_binding_max != 14);
1434*4882a593Smuzhiyun return is_binding_dirtying[binding_type];
1435*4882a593Smuzhiyun }
1436*4882a593Smuzhiyun
1437*4882a593Smuzhiyun /*
1438*4882a593Smuzhiyun * This function is unused at run-time, and only used to hold various build
1439*4882a593Smuzhiyun * asserts important for code optimization assumptions.
1440*4882a593Smuzhiyun */
vmw_binding_build_asserts(void)1441*4882a593Smuzhiyun static void vmw_binding_build_asserts(void)
1442*4882a593Smuzhiyun {
1443*4882a593Smuzhiyun BUILD_BUG_ON(SVGA3D_NUM_SHADERTYPE_DX10 != 3);
1444*4882a593Smuzhiyun BUILD_BUG_ON(SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS > SVGA3D_RT_MAX);
1445*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(uint32) != sizeof(u32));
1446*4882a593Smuzhiyun
1447*4882a593Smuzhiyun /*
1448*4882a593Smuzhiyun * struct vmw_ctx_binding_state::bind_cmd_buffer is used for various
1449*4882a593Smuzhiyun * view id arrays.
1450*4882a593Smuzhiyun */
1451*4882a593Smuzhiyun BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_RT_MAX);
1452*4882a593Smuzhiyun BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_DX_MAX_SRVIEWS);
1453*4882a593Smuzhiyun BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_DX_MAX_CONSTBUFFERS);
1454*4882a593Smuzhiyun
1455*4882a593Smuzhiyun /*
1456*4882a593Smuzhiyun * struct vmw_ctx_binding_state::bind_cmd_buffer is used for
1457*4882a593Smuzhiyun * u32 view ids, SVGA3dSoTargets and SVGA3dVertexBuffers
1458*4882a593Smuzhiyun */
1459*4882a593Smuzhiyun BUILD_BUG_ON(SVGA3D_DX_MAX_SOTARGETS*sizeof(SVGA3dSoTarget) >
1460*4882a593Smuzhiyun VMW_MAX_VIEW_BINDINGS*sizeof(u32));
1461*4882a593Smuzhiyun BUILD_BUG_ON(SVGA3D_DX_MAX_VERTEXBUFFERS*sizeof(SVGA3dVertexBuffer) >
1462*4882a593Smuzhiyun VMW_MAX_VIEW_BINDINGS*sizeof(u32));
1463*4882a593Smuzhiyun }
1464