1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun #include <linux/crc32.h>
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <drm/drm_atomic.h>
6*4882a593Smuzhiyun #include <drm/drm_atomic_helper.h>
7*4882a593Smuzhiyun #include <drm/drm_gem_framebuffer_helper.h>
8*4882a593Smuzhiyun #include <drm/drm_vblank.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include "vkms_drv.h"
11*4882a593Smuzhiyun
get_pixel_from_buffer(int x,int y,const u8 * buffer,const struct vkms_composer * composer)12*4882a593Smuzhiyun static u32 get_pixel_from_buffer(int x, int y, const u8 *buffer,
13*4882a593Smuzhiyun const struct vkms_composer *composer)
14*4882a593Smuzhiyun {
15*4882a593Smuzhiyun u32 pixel;
16*4882a593Smuzhiyun int src_offset = composer->offset + (y * composer->pitch)
17*4882a593Smuzhiyun + (x * composer->cpp);
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun pixel = *(u32 *)&buffer[src_offset];
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun return pixel;
22*4882a593Smuzhiyun }
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /**
25*4882a593Smuzhiyun * compute_crc - Compute CRC value on output frame
26*4882a593Smuzhiyun *
27*4882a593Smuzhiyun * @vaddr: address to final framebuffer
28*4882a593Smuzhiyun * @composer: framebuffer's metadata
29*4882a593Smuzhiyun *
30*4882a593Smuzhiyun * returns CRC value computed using crc32 on the visible portion of
31*4882a593Smuzhiyun * the final framebuffer at vaddr_out
32*4882a593Smuzhiyun */
compute_crc(const u8 * vaddr,const struct vkms_composer * composer)33*4882a593Smuzhiyun static uint32_t compute_crc(const u8 *vaddr,
34*4882a593Smuzhiyun const struct vkms_composer *composer)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun int x, y;
37*4882a593Smuzhiyun u32 crc = 0, pixel = 0;
38*4882a593Smuzhiyun int x_src = composer->src.x1 >> 16;
39*4882a593Smuzhiyun int y_src = composer->src.y1 >> 16;
40*4882a593Smuzhiyun int h_src = drm_rect_height(&composer->src) >> 16;
41*4882a593Smuzhiyun int w_src = drm_rect_width(&composer->src) >> 16;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun for (y = y_src; y < y_src + h_src; ++y) {
44*4882a593Smuzhiyun for (x = x_src; x < x_src + w_src; ++x) {
45*4882a593Smuzhiyun pixel = get_pixel_from_buffer(x, y, vaddr, composer);
46*4882a593Smuzhiyun crc = crc32_le(crc, (void *)&pixel, sizeof(u32));
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun return crc;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
blend_channel(u8 src,u8 dst,u8 alpha)53*4882a593Smuzhiyun static u8 blend_channel(u8 src, u8 dst, u8 alpha)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun u32 pre_blend;
56*4882a593Smuzhiyun u8 new_color;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun pre_blend = (src * 255 + dst * (255 - alpha));
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /* Faster div by 255 */
61*4882a593Smuzhiyun new_color = ((pre_blend + ((pre_blend + 257) >> 8)) >> 8);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun return new_color;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
alpha_blending(const u8 * argb_src,u8 * argb_dst)66*4882a593Smuzhiyun static void alpha_blending(const u8 *argb_src, u8 *argb_dst)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun u8 alpha;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun alpha = argb_src[3];
71*4882a593Smuzhiyun argb_dst[0] = blend_channel(argb_src[0], argb_dst[0], alpha);
72*4882a593Smuzhiyun argb_dst[1] = blend_channel(argb_src[1], argb_dst[1], alpha);
73*4882a593Smuzhiyun argb_dst[2] = blend_channel(argb_src[2], argb_dst[2], alpha);
74*4882a593Smuzhiyun /* Opaque primary */
75*4882a593Smuzhiyun argb_dst[3] = 0xFF;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun /**
79*4882a593Smuzhiyun * blend - blend value at vaddr_src with value at vaddr_dst
80*4882a593Smuzhiyun * @vaddr_dst: destination address
81*4882a593Smuzhiyun * @vaddr_src: source address
82*4882a593Smuzhiyun * @dst_composer: destination framebuffer's metadata
83*4882a593Smuzhiyun * @src_composer: source framebuffer's metadata
84*4882a593Smuzhiyun *
85*4882a593Smuzhiyun * Blend the vaddr_src value with the vaddr_dst value using the pre-multiplied
86*4882a593Smuzhiyun * alpha blending equation, since DRM currently assumes that the pixel color
87*4882a593Smuzhiyun * values have already been pre-multiplied with the alpha channel values. See
88*4882a593Smuzhiyun * more drm_plane_create_blend_mode_property(). This function uses buffer's
89*4882a593Smuzhiyun * metadata to locate the new composite values at vaddr_dst.
90*4882a593Smuzhiyun */
blend(void * vaddr_dst,void * vaddr_src,struct vkms_composer * dst_composer,struct vkms_composer * src_composer)91*4882a593Smuzhiyun static void blend(void *vaddr_dst, void *vaddr_src,
92*4882a593Smuzhiyun struct vkms_composer *dst_composer,
93*4882a593Smuzhiyun struct vkms_composer *src_composer)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun int i, j, j_dst, i_dst;
96*4882a593Smuzhiyun int offset_src, offset_dst;
97*4882a593Smuzhiyun u8 *pixel_dst, *pixel_src;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun int x_src = src_composer->src.x1 >> 16;
100*4882a593Smuzhiyun int y_src = src_composer->src.y1 >> 16;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun int x_dst = src_composer->dst.x1;
103*4882a593Smuzhiyun int y_dst = src_composer->dst.y1;
104*4882a593Smuzhiyun int h_dst = drm_rect_height(&src_composer->dst);
105*4882a593Smuzhiyun int w_dst = drm_rect_width(&src_composer->dst);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun int y_limit = y_src + h_dst;
108*4882a593Smuzhiyun int x_limit = x_src + w_dst;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun for (i = y_src, i_dst = y_dst; i < y_limit; ++i) {
111*4882a593Smuzhiyun for (j = x_src, j_dst = x_dst; j < x_limit; ++j) {
112*4882a593Smuzhiyun offset_dst = dst_composer->offset
113*4882a593Smuzhiyun + (i_dst * dst_composer->pitch)
114*4882a593Smuzhiyun + (j_dst++ * dst_composer->cpp);
115*4882a593Smuzhiyun offset_src = src_composer->offset
116*4882a593Smuzhiyun + (i * src_composer->pitch)
117*4882a593Smuzhiyun + (j * src_composer->cpp);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun pixel_src = (u8 *)(vaddr_src + offset_src);
120*4882a593Smuzhiyun pixel_dst = (u8 *)(vaddr_dst + offset_dst);
121*4882a593Smuzhiyun alpha_blending(pixel_src, pixel_dst);
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun i_dst++;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
compose_cursor(struct vkms_composer * cursor_composer,struct vkms_composer * primary_composer,void * vaddr_out)127*4882a593Smuzhiyun static void compose_cursor(struct vkms_composer *cursor_composer,
128*4882a593Smuzhiyun struct vkms_composer *primary_composer,
129*4882a593Smuzhiyun void *vaddr_out)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun struct drm_gem_object *cursor_obj;
132*4882a593Smuzhiyun struct vkms_gem_object *cursor_vkms_obj;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun cursor_obj = drm_gem_fb_get_obj(&cursor_composer->fb, 0);
135*4882a593Smuzhiyun cursor_vkms_obj = drm_gem_to_vkms_gem(cursor_obj);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun if (WARN_ON(!cursor_vkms_obj->vaddr))
138*4882a593Smuzhiyun return;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun blend(vaddr_out, cursor_vkms_obj->vaddr,
141*4882a593Smuzhiyun primary_composer, cursor_composer);
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
compose_planes(void ** vaddr_out,struct vkms_composer * primary_composer,struct vkms_composer * cursor_composer)144*4882a593Smuzhiyun static int compose_planes(void **vaddr_out,
145*4882a593Smuzhiyun struct vkms_composer *primary_composer,
146*4882a593Smuzhiyun struct vkms_composer *cursor_composer)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun struct drm_framebuffer *fb = &primary_composer->fb;
149*4882a593Smuzhiyun struct drm_gem_object *gem_obj = drm_gem_fb_get_obj(fb, 0);
150*4882a593Smuzhiyun struct vkms_gem_object *vkms_obj = drm_gem_to_vkms_gem(gem_obj);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun if (!*vaddr_out) {
153*4882a593Smuzhiyun *vaddr_out = kzalloc(vkms_obj->gem.size, GFP_KERNEL);
154*4882a593Smuzhiyun if (!*vaddr_out) {
155*4882a593Smuzhiyun DRM_ERROR("Cannot allocate memory for output frame.");
156*4882a593Smuzhiyun return -ENOMEM;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun if (WARN_ON(!vkms_obj->vaddr))
161*4882a593Smuzhiyun return -EINVAL;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun memcpy(*vaddr_out, vkms_obj->vaddr, vkms_obj->gem.size);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun if (cursor_composer)
166*4882a593Smuzhiyun compose_cursor(cursor_composer, primary_composer, *vaddr_out);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun return 0;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun /**
172*4882a593Smuzhiyun * vkms_composer_worker - ordered work_struct to compute CRC
173*4882a593Smuzhiyun *
174*4882a593Smuzhiyun * @work: work_struct
175*4882a593Smuzhiyun *
176*4882a593Smuzhiyun * Work handler for composing and computing CRCs. work_struct scheduled in
177*4882a593Smuzhiyun * an ordered workqueue that's periodically scheduled to run by
178*4882a593Smuzhiyun * _vblank_handle() and flushed at vkms_atomic_crtc_destroy_state().
179*4882a593Smuzhiyun */
vkms_composer_worker(struct work_struct * work)180*4882a593Smuzhiyun void vkms_composer_worker(struct work_struct *work)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun struct vkms_crtc_state *crtc_state = container_of(work,
183*4882a593Smuzhiyun struct vkms_crtc_state,
184*4882a593Smuzhiyun composer_work);
185*4882a593Smuzhiyun struct drm_crtc *crtc = crtc_state->base.crtc;
186*4882a593Smuzhiyun struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
187*4882a593Smuzhiyun struct vkms_composer *primary_composer = NULL;
188*4882a593Smuzhiyun struct vkms_composer *cursor_composer = NULL;
189*4882a593Smuzhiyun bool crc_pending, wb_pending;
190*4882a593Smuzhiyun void *vaddr_out = NULL;
191*4882a593Smuzhiyun u32 crc32 = 0;
192*4882a593Smuzhiyun u64 frame_start, frame_end;
193*4882a593Smuzhiyun int ret;
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun spin_lock_irq(&out->composer_lock);
196*4882a593Smuzhiyun frame_start = crtc_state->frame_start;
197*4882a593Smuzhiyun frame_end = crtc_state->frame_end;
198*4882a593Smuzhiyun crc_pending = crtc_state->crc_pending;
199*4882a593Smuzhiyun wb_pending = crtc_state->wb_pending;
200*4882a593Smuzhiyun crtc_state->frame_start = 0;
201*4882a593Smuzhiyun crtc_state->frame_end = 0;
202*4882a593Smuzhiyun crtc_state->crc_pending = false;
203*4882a593Smuzhiyun spin_unlock_irq(&out->composer_lock);
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun /*
206*4882a593Smuzhiyun * We raced with the vblank hrtimer and previous work already computed
207*4882a593Smuzhiyun * the crc, nothing to do.
208*4882a593Smuzhiyun */
209*4882a593Smuzhiyun if (!crc_pending)
210*4882a593Smuzhiyun return;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun if (crtc_state->num_active_planes >= 1)
213*4882a593Smuzhiyun primary_composer = crtc_state->active_planes[0]->composer;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun if (crtc_state->num_active_planes == 2)
216*4882a593Smuzhiyun cursor_composer = crtc_state->active_planes[1]->composer;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun if (!primary_composer)
219*4882a593Smuzhiyun return;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun if (wb_pending)
222*4882a593Smuzhiyun vaddr_out = crtc_state->active_writeback;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun ret = compose_planes(&vaddr_out, primary_composer, cursor_composer);
225*4882a593Smuzhiyun if (ret) {
226*4882a593Smuzhiyun if (ret == -EINVAL && !wb_pending)
227*4882a593Smuzhiyun kfree(vaddr_out);
228*4882a593Smuzhiyun return;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun crc32 = compute_crc(vaddr_out, primary_composer);
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun if (wb_pending) {
234*4882a593Smuzhiyun drm_writeback_signal_completion(&out->wb_connector, 0);
235*4882a593Smuzhiyun spin_lock_irq(&out->composer_lock);
236*4882a593Smuzhiyun crtc_state->wb_pending = false;
237*4882a593Smuzhiyun spin_unlock_irq(&out->composer_lock);
238*4882a593Smuzhiyun } else {
239*4882a593Smuzhiyun kfree(vaddr_out);
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun /*
243*4882a593Smuzhiyun * The worker can fall behind the vblank hrtimer, make sure we catch up.
244*4882a593Smuzhiyun */
245*4882a593Smuzhiyun while (frame_start <= frame_end)
246*4882a593Smuzhiyun drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32);
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun static const char * const pipe_crc_sources[] = {"auto"};
250*4882a593Smuzhiyun
vkms_get_crc_sources(struct drm_crtc * crtc,size_t * count)251*4882a593Smuzhiyun const char *const *vkms_get_crc_sources(struct drm_crtc *crtc,
252*4882a593Smuzhiyun size_t *count)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun *count = ARRAY_SIZE(pipe_crc_sources);
255*4882a593Smuzhiyun return pipe_crc_sources;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
vkms_crc_parse_source(const char * src_name,bool * enabled)258*4882a593Smuzhiyun static int vkms_crc_parse_source(const char *src_name, bool *enabled)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun int ret = 0;
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun if (!src_name) {
263*4882a593Smuzhiyun *enabled = false;
264*4882a593Smuzhiyun } else if (strcmp(src_name, "auto") == 0) {
265*4882a593Smuzhiyun *enabled = true;
266*4882a593Smuzhiyun } else {
267*4882a593Smuzhiyun *enabled = false;
268*4882a593Smuzhiyun ret = -EINVAL;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun return ret;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
vkms_verify_crc_source(struct drm_crtc * crtc,const char * src_name,size_t * values_cnt)274*4882a593Smuzhiyun int vkms_verify_crc_source(struct drm_crtc *crtc, const char *src_name,
275*4882a593Smuzhiyun size_t *values_cnt)
276*4882a593Smuzhiyun {
277*4882a593Smuzhiyun bool enabled;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun if (vkms_crc_parse_source(src_name, &enabled) < 0) {
280*4882a593Smuzhiyun DRM_DEBUG_DRIVER("unknown source %s\n", src_name);
281*4882a593Smuzhiyun return -EINVAL;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun *values_cnt = 1;
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun return 0;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
vkms_set_composer(struct vkms_output * out,bool enabled)289*4882a593Smuzhiyun void vkms_set_composer(struct vkms_output *out, bool enabled)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun bool old_enabled;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun if (enabled)
294*4882a593Smuzhiyun drm_crtc_vblank_get(&out->crtc);
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun spin_lock_irq(&out->lock);
297*4882a593Smuzhiyun old_enabled = out->composer_enabled;
298*4882a593Smuzhiyun out->composer_enabled = enabled;
299*4882a593Smuzhiyun spin_unlock_irq(&out->lock);
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun if (old_enabled)
302*4882a593Smuzhiyun drm_crtc_vblank_put(&out->crtc);
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun
vkms_set_crc_source(struct drm_crtc * crtc,const char * src_name)305*4882a593Smuzhiyun int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
308*4882a593Smuzhiyun bool enabled = false;
309*4882a593Smuzhiyun int ret = 0;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun ret = vkms_crc_parse_source(src_name, &enabled);
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun vkms_set_composer(out, enabled);
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun return ret;
316*4882a593Smuzhiyun }
317