xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/virtio/virtgpu_kms.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2015 Red Hat, Inc.
3*4882a593Smuzhiyun  * All Rights Reserved.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining
6*4882a593Smuzhiyun  * a copy of this software and associated documentation files (the
7*4882a593Smuzhiyun  * "Software"), to deal in the Software without restriction, including
8*4882a593Smuzhiyun  * without limitation the rights to use, copy, modify, merge, publish,
9*4882a593Smuzhiyun  * distribute, sublicense, and/or sell copies of the Software, and to
10*4882a593Smuzhiyun  * permit persons to whom the Software is furnished to do so, subject to
11*4882a593Smuzhiyun  * the following conditions:
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * The above copyright notice and this permission notice (including the
14*4882a593Smuzhiyun  * next paragraph) shall be included in all copies or substantial
15*4882a593Smuzhiyun  * portions of the Software.
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18*4882a593Smuzhiyun  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19*4882a593Smuzhiyun  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20*4882a593Smuzhiyun  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21*4882a593Smuzhiyun  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22*4882a593Smuzhiyun  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23*4882a593Smuzhiyun  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24*4882a593Smuzhiyun  */
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include <linux/virtio.h>
27*4882a593Smuzhiyun #include <linux/virtio_config.h>
28*4882a593Smuzhiyun #include <linux/virtio_ring.h>
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include <drm/drm_file.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #include "virtgpu_drv.h"
33*4882a593Smuzhiyun 
virtio_gpu_config_changed_work_func(struct work_struct * work)34*4882a593Smuzhiyun static void virtio_gpu_config_changed_work_func(struct work_struct *work)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	struct virtio_gpu_device *vgdev =
37*4882a593Smuzhiyun 		container_of(work, struct virtio_gpu_device,
38*4882a593Smuzhiyun 			     config_changed_work);
39*4882a593Smuzhiyun 	u32 events_read, events_clear = 0;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	/* read the config space */
42*4882a593Smuzhiyun 	virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
43*4882a593Smuzhiyun 			events_read, &events_read);
44*4882a593Smuzhiyun 	if (events_read & VIRTIO_GPU_EVENT_DISPLAY) {
45*4882a593Smuzhiyun 		if (vgdev->has_edid)
46*4882a593Smuzhiyun 			virtio_gpu_cmd_get_edids(vgdev);
47*4882a593Smuzhiyun 		virtio_gpu_cmd_get_display_info(vgdev);
48*4882a593Smuzhiyun 		virtio_gpu_notify(vgdev);
49*4882a593Smuzhiyun 		drm_helper_hpd_irq_event(vgdev->ddev);
50*4882a593Smuzhiyun 		events_clear |= VIRTIO_GPU_EVENT_DISPLAY;
51*4882a593Smuzhiyun 	}
52*4882a593Smuzhiyun 	virtio_cwrite_le(vgdev->vdev, struct virtio_gpu_config,
53*4882a593Smuzhiyun 			 events_clear, &events_clear);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun 
virtio_gpu_init_vq(struct virtio_gpu_queue * vgvq,void (* work_func)(struct work_struct * work))56*4882a593Smuzhiyun static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq,
57*4882a593Smuzhiyun 			       void (*work_func)(struct work_struct *work))
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	spin_lock_init(&vgvq->qlock);
60*4882a593Smuzhiyun 	init_waitqueue_head(&vgvq->ack_queue);
61*4882a593Smuzhiyun 	INIT_WORK(&vgvq->dequeue_work, work_func);
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun 
virtio_gpu_get_capsets(struct virtio_gpu_device * vgdev,int num_capsets)64*4882a593Smuzhiyun static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev,
65*4882a593Smuzhiyun 				   int num_capsets)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	int i, ret;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	vgdev->capsets = kcalloc(num_capsets,
70*4882a593Smuzhiyun 				 sizeof(struct virtio_gpu_drv_capset),
71*4882a593Smuzhiyun 				 GFP_KERNEL);
72*4882a593Smuzhiyun 	if (!vgdev->capsets) {
73*4882a593Smuzhiyun 		DRM_ERROR("failed to allocate cap sets\n");
74*4882a593Smuzhiyun 		return;
75*4882a593Smuzhiyun 	}
76*4882a593Smuzhiyun 	for (i = 0; i < num_capsets; i++) {
77*4882a593Smuzhiyun 		virtio_gpu_cmd_get_capset_info(vgdev, i);
78*4882a593Smuzhiyun 		virtio_gpu_notify(vgdev);
79*4882a593Smuzhiyun 		ret = wait_event_timeout(vgdev->resp_wq,
80*4882a593Smuzhiyun 					 vgdev->capsets[i].id > 0, 5 * HZ);
81*4882a593Smuzhiyun 		if (ret == 0) {
82*4882a593Smuzhiyun 			DRM_ERROR("timed out waiting for cap set %d\n", i);
83*4882a593Smuzhiyun 			spin_lock(&vgdev->display_info_lock);
84*4882a593Smuzhiyun 			kfree(vgdev->capsets);
85*4882a593Smuzhiyun 			vgdev->capsets = NULL;
86*4882a593Smuzhiyun 			spin_unlock(&vgdev->display_info_lock);
87*4882a593Smuzhiyun 			return;
88*4882a593Smuzhiyun 		}
89*4882a593Smuzhiyun 		DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n",
90*4882a593Smuzhiyun 			 i, vgdev->capsets[i].id,
91*4882a593Smuzhiyun 			 vgdev->capsets[i].max_version,
92*4882a593Smuzhiyun 			 vgdev->capsets[i].max_size);
93*4882a593Smuzhiyun 	}
94*4882a593Smuzhiyun 	vgdev->num_capsets = num_capsets;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun 
virtio_gpu_init(struct drm_device * dev)97*4882a593Smuzhiyun int virtio_gpu_init(struct drm_device *dev)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun 	static vq_callback_t *callbacks[] = {
100*4882a593Smuzhiyun 		virtio_gpu_ctrl_ack, virtio_gpu_cursor_ack
101*4882a593Smuzhiyun 	};
102*4882a593Smuzhiyun 	static const char * const names[] = { "control", "cursor" };
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	struct virtio_gpu_device *vgdev;
105*4882a593Smuzhiyun 	/* this will expand later */
106*4882a593Smuzhiyun 	struct virtqueue *vqs[2];
107*4882a593Smuzhiyun 	u32 num_scanouts, num_capsets;
108*4882a593Smuzhiyun 	int ret = 0;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (!virtio_has_feature(dev_to_virtio(dev->dev), VIRTIO_F_VERSION_1))
111*4882a593Smuzhiyun 		return -ENODEV;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	vgdev = kzalloc(sizeof(struct virtio_gpu_device), GFP_KERNEL);
114*4882a593Smuzhiyun 	if (!vgdev)
115*4882a593Smuzhiyun 		return -ENOMEM;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	vgdev->ddev = dev;
118*4882a593Smuzhiyun 	dev->dev_private = vgdev;
119*4882a593Smuzhiyun 	vgdev->vdev = dev_to_virtio(dev->dev);
120*4882a593Smuzhiyun 	vgdev->dev = dev->dev;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	spin_lock_init(&vgdev->display_info_lock);
123*4882a593Smuzhiyun 	spin_lock_init(&vgdev->resource_export_lock);
124*4882a593Smuzhiyun 	ida_init(&vgdev->ctx_id_ida);
125*4882a593Smuzhiyun 	ida_init(&vgdev->resource_ida);
126*4882a593Smuzhiyun 	init_waitqueue_head(&vgdev->resp_wq);
127*4882a593Smuzhiyun 	virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func);
128*4882a593Smuzhiyun 	virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	vgdev->fence_drv.context = dma_fence_context_alloc(1);
131*4882a593Smuzhiyun 	spin_lock_init(&vgdev->fence_drv.lock);
132*4882a593Smuzhiyun 	INIT_LIST_HEAD(&vgdev->fence_drv.fences);
133*4882a593Smuzhiyun 	INIT_LIST_HEAD(&vgdev->cap_cache);
134*4882a593Smuzhiyun 	INIT_WORK(&vgdev->config_changed_work,
135*4882a593Smuzhiyun 		  virtio_gpu_config_changed_work_func);
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	INIT_WORK(&vgdev->obj_free_work,
138*4882a593Smuzhiyun 		  virtio_gpu_array_put_free_work);
139*4882a593Smuzhiyun 	INIT_LIST_HEAD(&vgdev->obj_free_list);
140*4882a593Smuzhiyun 	spin_lock_init(&vgdev->obj_free_lock);
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun #ifdef __LITTLE_ENDIAN
143*4882a593Smuzhiyun 	if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL))
144*4882a593Smuzhiyun 		vgdev->has_virgl_3d = true;
145*4882a593Smuzhiyun #endif
146*4882a593Smuzhiyun 	if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_EDID)) {
147*4882a593Smuzhiyun 		vgdev->has_edid = true;
148*4882a593Smuzhiyun 	}
149*4882a593Smuzhiyun 	if (virtio_has_feature(vgdev->vdev, VIRTIO_RING_F_INDIRECT_DESC)) {
150*4882a593Smuzhiyun 		vgdev->has_indirect = true;
151*4882a593Smuzhiyun 	}
152*4882a593Smuzhiyun 	if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_UUID)) {
153*4882a593Smuzhiyun 		vgdev->has_resource_assign_uuid = true;
154*4882a593Smuzhiyun 	}
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	DRM_INFO("features: %cvirgl %cedid\n",
157*4882a593Smuzhiyun 		 vgdev->has_virgl_3d ? '+' : '-',
158*4882a593Smuzhiyun 		 vgdev->has_edid     ? '+' : '-');
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	ret = virtio_find_vqs(vgdev->vdev, 2, vqs, callbacks, names, NULL);
161*4882a593Smuzhiyun 	if (ret) {
162*4882a593Smuzhiyun 		DRM_ERROR("failed to find virt queues\n");
163*4882a593Smuzhiyun 		goto err_vqs;
164*4882a593Smuzhiyun 	}
165*4882a593Smuzhiyun 	vgdev->ctrlq.vq = vqs[0];
166*4882a593Smuzhiyun 	vgdev->cursorq.vq = vqs[1];
167*4882a593Smuzhiyun 	ret = virtio_gpu_alloc_vbufs(vgdev);
168*4882a593Smuzhiyun 	if (ret) {
169*4882a593Smuzhiyun 		DRM_ERROR("failed to alloc vbufs\n");
170*4882a593Smuzhiyun 		goto err_vbufs;
171*4882a593Smuzhiyun 	}
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	/* get display info */
174*4882a593Smuzhiyun 	virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
175*4882a593Smuzhiyun 			num_scanouts, &num_scanouts);
176*4882a593Smuzhiyun 	vgdev->num_scanouts = min_t(uint32_t, num_scanouts,
177*4882a593Smuzhiyun 				    VIRTIO_GPU_MAX_SCANOUTS);
178*4882a593Smuzhiyun 	if (!vgdev->num_scanouts) {
179*4882a593Smuzhiyun 		DRM_ERROR("num_scanouts is zero\n");
180*4882a593Smuzhiyun 		ret = -EINVAL;
181*4882a593Smuzhiyun 		goto err_scanouts;
182*4882a593Smuzhiyun 	}
183*4882a593Smuzhiyun 	DRM_INFO("number of scanouts: %d\n", num_scanouts);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
186*4882a593Smuzhiyun 			num_capsets, &num_capsets);
187*4882a593Smuzhiyun 	DRM_INFO("number of cap sets: %d\n", num_capsets);
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	ret = virtio_gpu_modeset_init(vgdev);
190*4882a593Smuzhiyun 	if (ret) {
191*4882a593Smuzhiyun 		DRM_ERROR("modeset init failed\n");
192*4882a593Smuzhiyun 		goto err_scanouts;
193*4882a593Smuzhiyun 	}
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	virtio_device_ready(vgdev->vdev);
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	if (num_capsets)
198*4882a593Smuzhiyun 		virtio_gpu_get_capsets(vgdev, num_capsets);
199*4882a593Smuzhiyun 	if (vgdev->has_edid)
200*4882a593Smuzhiyun 		virtio_gpu_cmd_get_edids(vgdev);
201*4882a593Smuzhiyun 	virtio_gpu_cmd_get_display_info(vgdev);
202*4882a593Smuzhiyun 	virtio_gpu_notify(vgdev);
203*4882a593Smuzhiyun 	wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending,
204*4882a593Smuzhiyun 			   5 * HZ);
205*4882a593Smuzhiyun 	return 0;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun err_scanouts:
208*4882a593Smuzhiyun 	virtio_gpu_free_vbufs(vgdev);
209*4882a593Smuzhiyun err_vbufs:
210*4882a593Smuzhiyun 	vgdev->vdev->config->del_vqs(vgdev->vdev);
211*4882a593Smuzhiyun err_vqs:
212*4882a593Smuzhiyun 	dev->dev_private = NULL;
213*4882a593Smuzhiyun 	kfree(vgdev);
214*4882a593Smuzhiyun 	return ret;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun 
virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device * vgdev)217*4882a593Smuzhiyun static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun 	struct virtio_gpu_drv_cap_cache *cache_ent, *tmp;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) {
222*4882a593Smuzhiyun 		kfree(cache_ent->caps_cache);
223*4882a593Smuzhiyun 		kfree(cache_ent);
224*4882a593Smuzhiyun 	}
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun 
virtio_gpu_deinit(struct drm_device * dev)227*4882a593Smuzhiyun void virtio_gpu_deinit(struct drm_device *dev)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun 	struct virtio_gpu_device *vgdev = dev->dev_private;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	flush_work(&vgdev->obj_free_work);
232*4882a593Smuzhiyun 	flush_work(&vgdev->ctrlq.dequeue_work);
233*4882a593Smuzhiyun 	flush_work(&vgdev->cursorq.dequeue_work);
234*4882a593Smuzhiyun 	flush_work(&vgdev->config_changed_work);
235*4882a593Smuzhiyun 	vgdev->vdev->config->reset(vgdev->vdev);
236*4882a593Smuzhiyun 	vgdev->vdev->config->del_vqs(vgdev->vdev);
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun 
virtio_gpu_release(struct drm_device * dev)239*4882a593Smuzhiyun void virtio_gpu_release(struct drm_device *dev)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun 	struct virtio_gpu_device *vgdev = dev->dev_private;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	virtio_gpu_modeset_fini(vgdev);
244*4882a593Smuzhiyun 	virtio_gpu_free_vbufs(vgdev);
245*4882a593Smuzhiyun 	virtio_gpu_cleanup_cap_cache(vgdev);
246*4882a593Smuzhiyun 	kfree(vgdev->capsets);
247*4882a593Smuzhiyun 	kfree(vgdev);
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun 
virtio_gpu_driver_open(struct drm_device * dev,struct drm_file * file)250*4882a593Smuzhiyun int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun 	struct virtio_gpu_device *vgdev = dev->dev_private;
253*4882a593Smuzhiyun 	struct virtio_gpu_fpriv *vfpriv;
254*4882a593Smuzhiyun 	int handle;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	/* can't create contexts without 3d renderer */
257*4882a593Smuzhiyun 	if (!vgdev->has_virgl_3d)
258*4882a593Smuzhiyun 		return 0;
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	/* allocate a virt GPU context for this opener */
261*4882a593Smuzhiyun 	vfpriv = kzalloc(sizeof(*vfpriv), GFP_KERNEL);
262*4882a593Smuzhiyun 	if (!vfpriv)
263*4882a593Smuzhiyun 		return -ENOMEM;
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	mutex_init(&vfpriv->context_lock);
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	handle = ida_alloc(&vgdev->ctx_id_ida, GFP_KERNEL);
268*4882a593Smuzhiyun 	if (handle < 0) {
269*4882a593Smuzhiyun 		kfree(vfpriv);
270*4882a593Smuzhiyun 		return handle;
271*4882a593Smuzhiyun 	}
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	vfpriv->ctx_id = handle + 1;
274*4882a593Smuzhiyun 	file->driver_priv = vfpriv;
275*4882a593Smuzhiyun 	return 0;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun 
virtio_gpu_driver_postclose(struct drm_device * dev,struct drm_file * file)278*4882a593Smuzhiyun void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun 	struct virtio_gpu_device *vgdev = dev->dev_private;
281*4882a593Smuzhiyun 	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	if (!vgdev->has_virgl_3d)
284*4882a593Smuzhiyun 		return;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	if (vfpriv->context_created) {
287*4882a593Smuzhiyun 		virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id);
288*4882a593Smuzhiyun 		virtio_gpu_notify(vgdev);
289*4882a593Smuzhiyun 	}
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1);
292*4882a593Smuzhiyun 	mutex_destroy(&vfpriv->context_lock);
293*4882a593Smuzhiyun 	kfree(vfpriv);
294*4882a593Smuzhiyun 	file->driver_priv = NULL;
295*4882a593Smuzhiyun }
296