xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/virtio/virtgpu_gem.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2015 Red Hat, Inc.
3*4882a593Smuzhiyun  * All Rights Reserved.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining
6*4882a593Smuzhiyun  * a copy of this software and associated documentation files (the
7*4882a593Smuzhiyun  * "Software"), to deal in the Software without restriction, including
8*4882a593Smuzhiyun  * without limitation the rights to use, copy, modify, merge, publish,
9*4882a593Smuzhiyun  * distribute, sublicense, and/or sell copies of the Software, and to
10*4882a593Smuzhiyun  * permit persons to whom the Software is furnished to do so, subject to
11*4882a593Smuzhiyun  * the following conditions:
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * The above copyright notice and this permission notice (including the
14*4882a593Smuzhiyun  * next paragraph) shall be included in all copies or substantial
15*4882a593Smuzhiyun  * portions of the Software.
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18*4882a593Smuzhiyun  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19*4882a593Smuzhiyun  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20*4882a593Smuzhiyun  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21*4882a593Smuzhiyun  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22*4882a593Smuzhiyun  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23*4882a593Smuzhiyun  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24*4882a593Smuzhiyun  */
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include <drm/drm_file.h>
27*4882a593Smuzhiyun #include <drm/drm_fourcc.h>
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #include "virtgpu_drv.h"
30*4882a593Smuzhiyun 
virtio_gpu_gem_create(struct drm_file * file,struct drm_device * dev,struct virtio_gpu_object_params * params,struct drm_gem_object ** obj_p,uint32_t * handle_p)31*4882a593Smuzhiyun static int virtio_gpu_gem_create(struct drm_file *file,
32*4882a593Smuzhiyun 				 struct drm_device *dev,
33*4882a593Smuzhiyun 				 struct virtio_gpu_object_params *params,
34*4882a593Smuzhiyun 				 struct drm_gem_object **obj_p,
35*4882a593Smuzhiyun 				 uint32_t *handle_p)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	struct virtio_gpu_device *vgdev = dev->dev_private;
38*4882a593Smuzhiyun 	struct virtio_gpu_object *obj;
39*4882a593Smuzhiyun 	int ret;
40*4882a593Smuzhiyun 	u32 handle;
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	ret = virtio_gpu_object_create(vgdev, params, &obj, NULL);
43*4882a593Smuzhiyun 	if (ret < 0)
44*4882a593Smuzhiyun 		return ret;
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	ret = drm_gem_handle_create(file, &obj->base.base, &handle);
47*4882a593Smuzhiyun 	if (ret) {
48*4882a593Smuzhiyun 		drm_gem_object_release(&obj->base.base);
49*4882a593Smuzhiyun 		return ret;
50*4882a593Smuzhiyun 	}
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	*obj_p = &obj->base.base;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	/* drop reference from allocate - handle holds it now */
55*4882a593Smuzhiyun 	drm_gem_object_put(&obj->base.base);
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	*handle_p = handle;
58*4882a593Smuzhiyun 	return 0;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
virtio_gpu_mode_dumb_create(struct drm_file * file_priv,struct drm_device * dev,struct drm_mode_create_dumb * args)61*4882a593Smuzhiyun int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
62*4882a593Smuzhiyun 				struct drm_device *dev,
63*4882a593Smuzhiyun 				struct drm_mode_create_dumb *args)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun 	struct drm_gem_object *gobj;
66*4882a593Smuzhiyun 	struct virtio_gpu_object_params params = { 0 };
67*4882a593Smuzhiyun 	int ret;
68*4882a593Smuzhiyun 	uint32_t pitch;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	if (args->bpp != 32)
71*4882a593Smuzhiyun 		return -EINVAL;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	pitch = args->width * 4;
74*4882a593Smuzhiyun 	args->size = pitch * args->height;
75*4882a593Smuzhiyun 	args->size = ALIGN(args->size, PAGE_SIZE);
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	params.format = virtio_gpu_translate_format(DRM_FORMAT_HOST_XRGB8888);
78*4882a593Smuzhiyun 	params.width = args->width;
79*4882a593Smuzhiyun 	params.height = args->height;
80*4882a593Smuzhiyun 	params.size = args->size;
81*4882a593Smuzhiyun 	params.dumb = true;
82*4882a593Smuzhiyun 	ret = virtio_gpu_gem_create(file_priv, dev, &params, &gobj,
83*4882a593Smuzhiyun 				    &args->handle);
84*4882a593Smuzhiyun 	if (ret)
85*4882a593Smuzhiyun 		goto fail;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	args->pitch = pitch;
88*4882a593Smuzhiyun 	return ret;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun fail:
91*4882a593Smuzhiyun 	return ret;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun 
virtio_gpu_mode_dumb_mmap(struct drm_file * file_priv,struct drm_device * dev,uint32_t handle,uint64_t * offset_p)94*4882a593Smuzhiyun int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
95*4882a593Smuzhiyun 			      struct drm_device *dev,
96*4882a593Smuzhiyun 			      uint32_t handle, uint64_t *offset_p)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun 	struct drm_gem_object *gobj;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	BUG_ON(!offset_p);
101*4882a593Smuzhiyun 	gobj = drm_gem_object_lookup(file_priv, handle);
102*4882a593Smuzhiyun 	if (gobj == NULL)
103*4882a593Smuzhiyun 		return -ENOENT;
104*4882a593Smuzhiyun 	*offset_p = drm_vma_node_offset_addr(&gobj->vma_node);
105*4882a593Smuzhiyun 	drm_gem_object_put(gobj);
106*4882a593Smuzhiyun 	return 0;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
virtio_gpu_gem_object_open(struct drm_gem_object * obj,struct drm_file * file)109*4882a593Smuzhiyun int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
110*4882a593Smuzhiyun 			       struct drm_file *file)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	struct virtio_gpu_device *vgdev = obj->dev->dev_private;
113*4882a593Smuzhiyun 	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
114*4882a593Smuzhiyun 	struct virtio_gpu_object_array *objs;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	if (!vgdev->has_virgl_3d)
117*4882a593Smuzhiyun 		goto out_notify;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	/* the context might still be missing when the first ioctl is
120*4882a593Smuzhiyun 	 * DRM_IOCTL_MODE_CREATE_DUMB or DRM_IOCTL_PRIME_FD_TO_HANDLE
121*4882a593Smuzhiyun 	 */
122*4882a593Smuzhiyun 	virtio_gpu_create_context(obj->dev, file);
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	objs = virtio_gpu_array_alloc(1);
125*4882a593Smuzhiyun 	if (!objs)
126*4882a593Smuzhiyun 		return -ENOMEM;
127*4882a593Smuzhiyun 	virtio_gpu_array_add_obj(objs, obj);
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	virtio_gpu_cmd_context_attach_resource(vgdev, vfpriv->ctx_id,
130*4882a593Smuzhiyun 					       objs);
131*4882a593Smuzhiyun out_notify:
132*4882a593Smuzhiyun 	virtio_gpu_notify(vgdev);
133*4882a593Smuzhiyun 	return 0;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
virtio_gpu_gem_object_close(struct drm_gem_object * obj,struct drm_file * file)136*4882a593Smuzhiyun void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
137*4882a593Smuzhiyun 				 struct drm_file *file)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun 	struct virtio_gpu_device *vgdev = obj->dev->dev_private;
140*4882a593Smuzhiyun 	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
141*4882a593Smuzhiyun 	struct virtio_gpu_object_array *objs;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	if (!vgdev->has_virgl_3d)
144*4882a593Smuzhiyun 		return;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	objs = virtio_gpu_array_alloc(1);
147*4882a593Smuzhiyun 	if (!objs)
148*4882a593Smuzhiyun 		return;
149*4882a593Smuzhiyun 	virtio_gpu_array_add_obj(objs, obj);
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	virtio_gpu_cmd_context_detach_resource(vgdev, vfpriv->ctx_id,
152*4882a593Smuzhiyun 					       objs);
153*4882a593Smuzhiyun 	virtio_gpu_notify(vgdev);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun 
virtio_gpu_array_alloc(u32 nents)156*4882a593Smuzhiyun struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun 	struct virtio_gpu_object_array *objs;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	objs = kmalloc(struct_size(objs, objs, nents), GFP_KERNEL);
161*4882a593Smuzhiyun 	if (!objs)
162*4882a593Smuzhiyun 		return NULL;
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	objs->nents = 0;
165*4882a593Smuzhiyun 	objs->total = nents;
166*4882a593Smuzhiyun 	return objs;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun 
virtio_gpu_array_free(struct virtio_gpu_object_array * objs)169*4882a593Smuzhiyun static void virtio_gpu_array_free(struct virtio_gpu_object_array *objs)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun 	kfree(objs);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun struct virtio_gpu_object_array*
virtio_gpu_array_from_handles(struct drm_file * drm_file,u32 * handles,u32 nents)175*4882a593Smuzhiyun virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	struct virtio_gpu_object_array *objs;
178*4882a593Smuzhiyun 	u32 i;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	objs = virtio_gpu_array_alloc(nents);
181*4882a593Smuzhiyun 	if (!objs)
182*4882a593Smuzhiyun 		return NULL;
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	for (i = 0; i < nents; i++) {
185*4882a593Smuzhiyun 		objs->objs[i] = drm_gem_object_lookup(drm_file, handles[i]);
186*4882a593Smuzhiyun 		if (!objs->objs[i]) {
187*4882a593Smuzhiyun 			objs->nents = i;
188*4882a593Smuzhiyun 			virtio_gpu_array_put_free(objs);
189*4882a593Smuzhiyun 			return NULL;
190*4882a593Smuzhiyun 		}
191*4882a593Smuzhiyun 	}
192*4882a593Smuzhiyun 	objs->nents = i;
193*4882a593Smuzhiyun 	return objs;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun 
virtio_gpu_array_add_obj(struct virtio_gpu_object_array * objs,struct drm_gem_object * obj)196*4882a593Smuzhiyun void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
197*4882a593Smuzhiyun 			      struct drm_gem_object *obj)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun 	if (WARN_ON_ONCE(objs->nents == objs->total))
200*4882a593Smuzhiyun 		return;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	drm_gem_object_get(obj);
203*4882a593Smuzhiyun 	objs->objs[objs->nents] = obj;
204*4882a593Smuzhiyun 	objs->nents++;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun 
virtio_gpu_array_lock_resv(struct virtio_gpu_object_array * objs)207*4882a593Smuzhiyun int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun 	int ret;
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	if (objs->nents == 1) {
212*4882a593Smuzhiyun 		ret = dma_resv_lock_interruptible(objs->objs[0]->resv, NULL);
213*4882a593Smuzhiyun 	} else {
214*4882a593Smuzhiyun 		ret = drm_gem_lock_reservations(objs->objs, objs->nents,
215*4882a593Smuzhiyun 						&objs->ticket);
216*4882a593Smuzhiyun 	}
217*4882a593Smuzhiyun 	return ret;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun 
virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array * objs)220*4882a593Smuzhiyun void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun 	if (objs->nents == 1) {
223*4882a593Smuzhiyun 		dma_resv_unlock(objs->objs[0]->resv);
224*4882a593Smuzhiyun 	} else {
225*4882a593Smuzhiyun 		drm_gem_unlock_reservations(objs->objs, objs->nents,
226*4882a593Smuzhiyun 					    &objs->ticket);
227*4882a593Smuzhiyun 	}
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun 
virtio_gpu_array_add_fence(struct virtio_gpu_object_array * objs,struct dma_fence * fence)230*4882a593Smuzhiyun void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
231*4882a593Smuzhiyun 				struct dma_fence *fence)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun 	int i;
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	for (i = 0; i < objs->nents; i++)
236*4882a593Smuzhiyun 		dma_resv_add_excl_fence(objs->objs[i]->resv, fence);
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun 
virtio_gpu_array_put_free(struct virtio_gpu_object_array * objs)239*4882a593Smuzhiyun void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun 	u32 i;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	for (i = 0; i < objs->nents; i++)
244*4882a593Smuzhiyun 		drm_gem_object_put(objs->objs[i]);
245*4882a593Smuzhiyun 	virtio_gpu_array_free(objs);
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun 
virtio_gpu_array_put_free_delayed(struct virtio_gpu_device * vgdev,struct virtio_gpu_object_array * objs)248*4882a593Smuzhiyun void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
249*4882a593Smuzhiyun 				       struct virtio_gpu_object_array *objs)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun 	spin_lock(&vgdev->obj_free_lock);
252*4882a593Smuzhiyun 	list_add_tail(&objs->next, &vgdev->obj_free_list);
253*4882a593Smuzhiyun 	spin_unlock(&vgdev->obj_free_lock);
254*4882a593Smuzhiyun 	schedule_work(&vgdev->obj_free_work);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun 
virtio_gpu_array_put_free_work(struct work_struct * work)257*4882a593Smuzhiyun void virtio_gpu_array_put_free_work(struct work_struct *work)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun 	struct virtio_gpu_device *vgdev =
260*4882a593Smuzhiyun 		container_of(work, struct virtio_gpu_device, obj_free_work);
261*4882a593Smuzhiyun 	struct virtio_gpu_object_array *objs;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	spin_lock(&vgdev->obj_free_lock);
264*4882a593Smuzhiyun 	while (!list_empty(&vgdev->obj_free_list)) {
265*4882a593Smuzhiyun 		objs = list_first_entry(&vgdev->obj_free_list,
266*4882a593Smuzhiyun 					struct virtio_gpu_object_array, next);
267*4882a593Smuzhiyun 		list_del(&objs->next);
268*4882a593Smuzhiyun 		spin_unlock(&vgdev->obj_free_lock);
269*4882a593Smuzhiyun 		virtio_gpu_array_put_free(objs);
270*4882a593Smuzhiyun 		spin_lock(&vgdev->obj_free_lock);
271*4882a593Smuzhiyun 	}
272*4882a593Smuzhiyun 	spin_unlock(&vgdev->obj_free_lock);
273*4882a593Smuzhiyun }
274