xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/via/via_drv.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
3*4882a593Smuzhiyun  * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
6*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
7*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
8*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sub license,
9*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
10*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * The above copyright notice and this permission notice (including the
13*4882a593Smuzhiyun  * next paragraph) shall be included in all copies or substantial portions
14*4882a593Smuzhiyun  * of the Software.
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19*4882a593Smuzhiyun  * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20*4882a593Smuzhiyun  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21*4882a593Smuzhiyun  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22*4882a593Smuzhiyun  * DEALINGS IN THE SOFTWARE.
23*4882a593Smuzhiyun  */
24*4882a593Smuzhiyun #ifndef _VIA_DRV_H_
25*4882a593Smuzhiyun #define _VIA_DRV_H_
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include <linux/irqreturn.h>
28*4882a593Smuzhiyun #include <linux/jiffies.h>
29*4882a593Smuzhiyun #include <linux/sched.h>
30*4882a593Smuzhiyun #include <linux/sched/signal.h>
31*4882a593Smuzhiyun #include <linux/wait.h>
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #include <drm/drm_ioctl.h>
34*4882a593Smuzhiyun #include <drm/drm_legacy.h>
35*4882a593Smuzhiyun #include <drm/drm_mm.h>
36*4882a593Smuzhiyun #include <drm/via_drm.h>
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define DRIVER_AUTHOR	"Various"
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define DRIVER_NAME		"via"
41*4882a593Smuzhiyun #define DRIVER_DESC		"VIA Unichrome / Pro"
42*4882a593Smuzhiyun #define DRIVER_DATE		"20070202"
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define DRIVER_MAJOR		2
45*4882a593Smuzhiyun #define DRIVER_MINOR		11
46*4882a593Smuzhiyun #define DRIVER_PATCHLEVEL	1
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #include "via_verifier.h"
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #include "via_dmablit.h"
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #define VIA_PCI_BUF_SIZE 60000
53*4882a593Smuzhiyun #define VIA_FIRE_BUF_SIZE  1024
54*4882a593Smuzhiyun #define VIA_NUM_IRQS 4
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun typedef struct drm_via_ring_buffer {
57*4882a593Smuzhiyun 	drm_local_map_t map;
58*4882a593Smuzhiyun 	char *virtual_start;
59*4882a593Smuzhiyun } drm_via_ring_buffer_t;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun typedef uint32_t maskarray_t[5];
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun typedef struct drm_via_irq {
64*4882a593Smuzhiyun 	atomic_t irq_received;
65*4882a593Smuzhiyun 	uint32_t pending_mask;
66*4882a593Smuzhiyun 	uint32_t enable_mask;
67*4882a593Smuzhiyun 	wait_queue_head_t irq_queue;
68*4882a593Smuzhiyun } drm_via_irq_t;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun typedef struct drm_via_private {
71*4882a593Smuzhiyun 	drm_via_sarea_t *sarea_priv;
72*4882a593Smuzhiyun 	drm_local_map_t *sarea;
73*4882a593Smuzhiyun 	drm_local_map_t *fb;
74*4882a593Smuzhiyun 	drm_local_map_t *mmio;
75*4882a593Smuzhiyun 	unsigned long agpAddr;
76*4882a593Smuzhiyun 	wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS];
77*4882a593Smuzhiyun 	char *dma_ptr;
78*4882a593Smuzhiyun 	unsigned int dma_low;
79*4882a593Smuzhiyun 	unsigned int dma_high;
80*4882a593Smuzhiyun 	unsigned int dma_offset;
81*4882a593Smuzhiyun 	uint32_t dma_wrap;
82*4882a593Smuzhiyun 	volatile uint32_t *last_pause_ptr;
83*4882a593Smuzhiyun 	volatile uint32_t *hw_addr_ptr;
84*4882a593Smuzhiyun 	drm_via_ring_buffer_t ring;
85*4882a593Smuzhiyun 	ktime_t last_vblank;
86*4882a593Smuzhiyun 	int last_vblank_valid;
87*4882a593Smuzhiyun 	ktime_t nsec_per_vblank;
88*4882a593Smuzhiyun 	atomic_t vbl_received;
89*4882a593Smuzhiyun 	drm_via_state_t hc_state;
90*4882a593Smuzhiyun 	char pci_buf[VIA_PCI_BUF_SIZE];
91*4882a593Smuzhiyun 	const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE];
92*4882a593Smuzhiyun 	uint32_t num_fire_offsets;
93*4882a593Smuzhiyun 	int chipset;
94*4882a593Smuzhiyun 	drm_via_irq_t via_irqs[VIA_NUM_IRQS];
95*4882a593Smuzhiyun 	unsigned num_irqs;
96*4882a593Smuzhiyun 	maskarray_t *irq_masks;
97*4882a593Smuzhiyun 	uint32_t irq_enable_mask;
98*4882a593Smuzhiyun 	uint32_t irq_pending_mask;
99*4882a593Smuzhiyun 	int *irq_map;
100*4882a593Smuzhiyun 	unsigned int idle_fault;
101*4882a593Smuzhiyun 	int vram_initialized;
102*4882a593Smuzhiyun 	struct drm_mm vram_mm;
103*4882a593Smuzhiyun 	int agp_initialized;
104*4882a593Smuzhiyun 	struct drm_mm agp_mm;
105*4882a593Smuzhiyun 	/** Mapping of userspace keys to mm objects */
106*4882a593Smuzhiyun 	struct idr object_idr;
107*4882a593Smuzhiyun 	unsigned long vram_offset;
108*4882a593Smuzhiyun 	unsigned long agp_offset;
109*4882a593Smuzhiyun 	drm_via_blitq_t blit_queues[VIA_NUM_BLIT_ENGINES];
110*4882a593Smuzhiyun 	uint32_t dma_diff;
111*4882a593Smuzhiyun } drm_via_private_t;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun struct via_file_private {
114*4882a593Smuzhiyun 	struct list_head obj_list;
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun enum via_family {
118*4882a593Smuzhiyun   VIA_OTHER = 0,     /* Baseline */
119*4882a593Smuzhiyun   VIA_PRO_GROUP_A,   /* Another video engine and DMA commands */
120*4882a593Smuzhiyun   VIA_DX9_0          /* Same video as pro_group_a, but 3D is unsupported */
121*4882a593Smuzhiyun };
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun /* VIA MMIO register access */
via_read(struct drm_via_private * dev_priv,u32 reg)124*4882a593Smuzhiyun static inline u32 via_read(struct drm_via_private *dev_priv, u32 reg)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun 	return readl((void __iomem *)(dev_priv->mmio->handle + reg));
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun 
via_write(struct drm_via_private * dev_priv,u32 reg,u32 val)129*4882a593Smuzhiyun static inline void via_write(struct drm_via_private *dev_priv, u32 reg,
130*4882a593Smuzhiyun 			     u32 val)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun 	writel(val, (void __iomem *)(dev_priv->mmio->handle + reg));
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
via_write8(struct drm_via_private * dev_priv,u32 reg,u32 val)135*4882a593Smuzhiyun static inline void via_write8(struct drm_via_private *dev_priv, u32 reg,
136*4882a593Smuzhiyun 			      u32 val)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	writeb(val, (void __iomem *)(dev_priv->mmio->handle + reg));
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun 
via_write8_mask(struct drm_via_private * dev_priv,u32 reg,u32 mask,u32 val)141*4882a593Smuzhiyun static inline void via_write8_mask(struct drm_via_private *dev_priv,
142*4882a593Smuzhiyun 				   u32 reg, u32 mask, u32 val)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun 	u32 tmp;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	tmp = readb((void __iomem *)(dev_priv->mmio->handle + reg));
147*4882a593Smuzhiyun 	tmp = (tmp & ~mask) | (val & mask);
148*4882a593Smuzhiyun 	writeb(tmp, (void __iomem *)(dev_priv->mmio->handle + reg));
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun /*
152*4882a593Smuzhiyun  * Poll in a loop waiting for 'contidition' to be true.
153*4882a593Smuzhiyun  * Note: A direct replacement with wait_event_interruptible_timeout()
154*4882a593Smuzhiyun  *       will not work unless driver is updated to emit wake_up()
155*4882a593Smuzhiyun  *       in relevant places that can impact the 'condition'
156*4882a593Smuzhiyun  *
157*4882a593Smuzhiyun  * Returns:
158*4882a593Smuzhiyun  *   ret keeps current value if 'condition' becomes true
159*4882a593Smuzhiyun  *   ret = -BUSY if timeout happens
160*4882a593Smuzhiyun  *   ret = -EINTR if a signal interrupted the waiting period
161*4882a593Smuzhiyun  */
162*4882a593Smuzhiyun #define VIA_WAIT_ON( ret, queue, timeout, condition )		\
163*4882a593Smuzhiyun do {								\
164*4882a593Smuzhiyun 	DECLARE_WAITQUEUE(entry, current);			\
165*4882a593Smuzhiyun 	unsigned long end = jiffies + (timeout);		\
166*4882a593Smuzhiyun 	add_wait_queue(&(queue), &entry);			\
167*4882a593Smuzhiyun 								\
168*4882a593Smuzhiyun 	for (;;) {						\
169*4882a593Smuzhiyun 		__set_current_state(TASK_INTERRUPTIBLE);	\
170*4882a593Smuzhiyun 		if (condition)					\
171*4882a593Smuzhiyun 			break;					\
172*4882a593Smuzhiyun 		if (time_after_eq(jiffies, end)) {		\
173*4882a593Smuzhiyun 			ret = -EBUSY;				\
174*4882a593Smuzhiyun 			break;					\
175*4882a593Smuzhiyun 		}						\
176*4882a593Smuzhiyun 		schedule_timeout((HZ/100 > 1) ? HZ/100 : 1);	\
177*4882a593Smuzhiyun 		if (signal_pending(current)) {			\
178*4882a593Smuzhiyun 			ret = -EINTR;				\
179*4882a593Smuzhiyun 			break;					\
180*4882a593Smuzhiyun 		}						\
181*4882a593Smuzhiyun 	}							\
182*4882a593Smuzhiyun 	__set_current_state(TASK_RUNNING);			\
183*4882a593Smuzhiyun 	remove_wait_queue(&(queue), &entry);			\
184*4882a593Smuzhiyun } while (0)
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun extern const struct drm_ioctl_desc via_ioctls[];
187*4882a593Smuzhiyun extern int via_max_ioctl;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun extern int via_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
190*4882a593Smuzhiyun extern int via_mem_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv);
191*4882a593Smuzhiyun extern int via_mem_free(struct drm_device *dev, void *data, struct drm_file *file_priv);
192*4882a593Smuzhiyun extern int via_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
193*4882a593Smuzhiyun extern int via_map_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
194*4882a593Smuzhiyun extern int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_priv);
195*4882a593Smuzhiyun extern int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv);
196*4882a593Smuzhiyun extern int via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv);
197*4882a593Smuzhiyun extern int via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv);
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun extern int via_driver_load(struct drm_device *dev, unsigned long chipset);
200*4882a593Smuzhiyun extern void via_driver_unload(struct drm_device *dev);
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun extern int via_init_context(struct drm_device *dev, int context);
203*4882a593Smuzhiyun extern int via_final_context(struct drm_device *dev, int context);
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun extern int via_do_cleanup_map(struct drm_device *dev);
206*4882a593Smuzhiyun extern u32 via_get_vblank_counter(struct drm_device *dev, unsigned int pipe);
207*4882a593Smuzhiyun extern int via_enable_vblank(struct drm_device *dev, unsigned int pipe);
208*4882a593Smuzhiyun extern void via_disable_vblank(struct drm_device *dev, unsigned int pipe);
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun extern irqreturn_t via_driver_irq_handler(int irq, void *arg);
211*4882a593Smuzhiyun extern void via_driver_irq_preinstall(struct drm_device *dev);
212*4882a593Smuzhiyun extern int via_driver_irq_postinstall(struct drm_device *dev);
213*4882a593Smuzhiyun extern void via_driver_irq_uninstall(struct drm_device *dev);
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun extern int via_dma_cleanup(struct drm_device *dev);
216*4882a593Smuzhiyun extern void via_init_command_verifier(void);
217*4882a593Smuzhiyun extern int via_driver_dma_quiescent(struct drm_device *dev);
218*4882a593Smuzhiyun extern void via_init_futex(drm_via_private_t *dev_priv);
219*4882a593Smuzhiyun extern void via_cleanup_futex(drm_via_private_t *dev_priv);
220*4882a593Smuzhiyun extern void via_release_futex(drm_via_private_t *dev_priv, int context);
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun extern void via_reclaim_buffers_locked(struct drm_device *dev,
223*4882a593Smuzhiyun 				       struct drm_file *file_priv);
224*4882a593Smuzhiyun extern void via_lastclose(struct drm_device *dev);
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun extern void via_dmablit_handler(struct drm_device *dev, int engine, int from_irq);
227*4882a593Smuzhiyun extern void via_init_dmablit(struct drm_device *dev);
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun #endif
230