1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2014-2015 Broadcom
4*4882a593Smuzhiyun * Copyright (C) 2013 Red Hat
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun /**
8*4882a593Smuzhiyun * DOC: Broadcom VC4 Graphics Driver
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * The Broadcom VideoCore 4 (present in the Raspberry Pi) contains a
11*4882a593Smuzhiyun * OpenGL ES 2.0-compatible 3D engine called V3D, and a highly
12*4882a593Smuzhiyun * configurable display output pipeline that supports HDMI, DSI, DPI,
13*4882a593Smuzhiyun * and Composite TV output.
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * The 3D engine also has an interface for submitting arbitrary
16*4882a593Smuzhiyun * compute shader-style jobs using the same shader processor as is
17*4882a593Smuzhiyun * used for vertex and fragment shaders in GLES 2.0. However, given
18*4882a593Smuzhiyun * that the hardware isn't able to expose any standard interfaces like
19*4882a593Smuzhiyun * OpenGL compute shaders or OpenCL, it isn't supported by this
20*4882a593Smuzhiyun * driver.
21*4882a593Smuzhiyun */
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <linux/clk.h>
24*4882a593Smuzhiyun #include <linux/component.h>
25*4882a593Smuzhiyun #include <linux/device.h>
26*4882a593Smuzhiyun #include <linux/dma-mapping.h>
27*4882a593Smuzhiyun #include <linux/io.h>
28*4882a593Smuzhiyun #include <linux/module.h>
29*4882a593Smuzhiyun #include <linux/of_platform.h>
30*4882a593Smuzhiyun #include <linux/platform_device.h>
31*4882a593Smuzhiyun #include <linux/pm_runtime.h>
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #include <drm/drm_atomic_helper.h>
34*4882a593Smuzhiyun #include <drm/drm_drv.h>
35*4882a593Smuzhiyun #include <drm/drm_fb_cma_helper.h>
36*4882a593Smuzhiyun #include <drm/drm_fb_helper.h>
37*4882a593Smuzhiyun #include <drm/drm_vblank.h>
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #include "uapi/drm/vc4_drm.h"
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #include "vc4_drv.h"
42*4882a593Smuzhiyun #include "vc4_regs.h"
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define DRIVER_NAME "vc4"
45*4882a593Smuzhiyun #define DRIVER_DESC "Broadcom VC4 graphics"
46*4882a593Smuzhiyun #define DRIVER_DATE "20140616"
47*4882a593Smuzhiyun #define DRIVER_MAJOR 0
48*4882a593Smuzhiyun #define DRIVER_MINOR 0
49*4882a593Smuzhiyun #define DRIVER_PATCHLEVEL 0
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* Helper function for mapping the regs on a platform device. */
vc4_ioremap_regs(struct platform_device * dev,int index)52*4882a593Smuzhiyun void __iomem *vc4_ioremap_regs(struct platform_device *dev, int index)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun struct resource *res;
55*4882a593Smuzhiyun void __iomem *map;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun res = platform_get_resource(dev, IORESOURCE_MEM, index);
58*4882a593Smuzhiyun map = devm_ioremap_resource(&dev->dev, res);
59*4882a593Smuzhiyun if (IS_ERR(map)) {
60*4882a593Smuzhiyun DRM_ERROR("Failed to map registers: %ld\n", PTR_ERR(map));
61*4882a593Smuzhiyun return map;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun return map;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
vc4_get_param_ioctl(struct drm_device * dev,void * data,struct drm_file * file_priv)67*4882a593Smuzhiyun static int vc4_get_param_ioctl(struct drm_device *dev, void *data,
68*4882a593Smuzhiyun struct drm_file *file_priv)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun struct vc4_dev *vc4 = to_vc4_dev(dev);
71*4882a593Smuzhiyun struct drm_vc4_get_param *args = data;
72*4882a593Smuzhiyun int ret;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun if (args->pad != 0)
75*4882a593Smuzhiyun return -EINVAL;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun if (!vc4->v3d)
78*4882a593Smuzhiyun return -ENODEV;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun switch (args->param) {
81*4882a593Smuzhiyun case DRM_VC4_PARAM_V3D_IDENT0:
82*4882a593Smuzhiyun ret = vc4_v3d_pm_get(vc4);
83*4882a593Smuzhiyun if (ret)
84*4882a593Smuzhiyun return ret;
85*4882a593Smuzhiyun args->value = V3D_READ(V3D_IDENT0);
86*4882a593Smuzhiyun vc4_v3d_pm_put(vc4);
87*4882a593Smuzhiyun break;
88*4882a593Smuzhiyun case DRM_VC4_PARAM_V3D_IDENT1:
89*4882a593Smuzhiyun ret = vc4_v3d_pm_get(vc4);
90*4882a593Smuzhiyun if (ret)
91*4882a593Smuzhiyun return ret;
92*4882a593Smuzhiyun args->value = V3D_READ(V3D_IDENT1);
93*4882a593Smuzhiyun vc4_v3d_pm_put(vc4);
94*4882a593Smuzhiyun break;
95*4882a593Smuzhiyun case DRM_VC4_PARAM_V3D_IDENT2:
96*4882a593Smuzhiyun ret = vc4_v3d_pm_get(vc4);
97*4882a593Smuzhiyun if (ret)
98*4882a593Smuzhiyun return ret;
99*4882a593Smuzhiyun args->value = V3D_READ(V3D_IDENT2);
100*4882a593Smuzhiyun vc4_v3d_pm_put(vc4);
101*4882a593Smuzhiyun break;
102*4882a593Smuzhiyun case DRM_VC4_PARAM_SUPPORTS_BRANCHES:
103*4882a593Smuzhiyun case DRM_VC4_PARAM_SUPPORTS_ETC1:
104*4882a593Smuzhiyun case DRM_VC4_PARAM_SUPPORTS_THREADED_FS:
105*4882a593Smuzhiyun case DRM_VC4_PARAM_SUPPORTS_FIXED_RCL_ORDER:
106*4882a593Smuzhiyun case DRM_VC4_PARAM_SUPPORTS_MADVISE:
107*4882a593Smuzhiyun case DRM_VC4_PARAM_SUPPORTS_PERFMON:
108*4882a593Smuzhiyun args->value = true;
109*4882a593Smuzhiyun break;
110*4882a593Smuzhiyun default:
111*4882a593Smuzhiyun DRM_DEBUG("Unknown parameter %d\n", args->param);
112*4882a593Smuzhiyun return -EINVAL;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun return 0;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
vc4_open(struct drm_device * dev,struct drm_file * file)118*4882a593Smuzhiyun static int vc4_open(struct drm_device *dev, struct drm_file *file)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun struct vc4_file *vc4file;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun vc4file = kzalloc(sizeof(*vc4file), GFP_KERNEL);
123*4882a593Smuzhiyun if (!vc4file)
124*4882a593Smuzhiyun return -ENOMEM;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun vc4_perfmon_open_file(vc4file);
127*4882a593Smuzhiyun file->driver_priv = vc4file;
128*4882a593Smuzhiyun return 0;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
vc4_close(struct drm_device * dev,struct drm_file * file)131*4882a593Smuzhiyun static void vc4_close(struct drm_device *dev, struct drm_file *file)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun struct vc4_dev *vc4 = to_vc4_dev(dev);
134*4882a593Smuzhiyun struct vc4_file *vc4file = file->driver_priv;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun if (vc4file->bin_bo_used)
137*4882a593Smuzhiyun vc4_v3d_bin_bo_put(vc4);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun vc4_perfmon_close_file(vc4file);
140*4882a593Smuzhiyun kfree(vc4file);
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun static const struct vm_operations_struct vc4_vm_ops = {
144*4882a593Smuzhiyun .fault = vc4_fault,
145*4882a593Smuzhiyun .open = drm_gem_vm_open,
146*4882a593Smuzhiyun .close = drm_gem_vm_close,
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun static const struct file_operations vc4_drm_fops = {
150*4882a593Smuzhiyun .owner = THIS_MODULE,
151*4882a593Smuzhiyun .open = drm_open,
152*4882a593Smuzhiyun .release = drm_release,
153*4882a593Smuzhiyun .unlocked_ioctl = drm_ioctl,
154*4882a593Smuzhiyun .mmap = vc4_mmap,
155*4882a593Smuzhiyun .poll = drm_poll,
156*4882a593Smuzhiyun .read = drm_read,
157*4882a593Smuzhiyun .compat_ioctl = drm_compat_ioctl,
158*4882a593Smuzhiyun .llseek = noop_llseek,
159*4882a593Smuzhiyun };
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun static const struct drm_ioctl_desc vc4_drm_ioctls[] = {
162*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_SUBMIT_CL, vc4_submit_cl_ioctl, DRM_RENDER_ALLOW),
163*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_WAIT_SEQNO, vc4_wait_seqno_ioctl, DRM_RENDER_ALLOW),
164*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_WAIT_BO, vc4_wait_bo_ioctl, DRM_RENDER_ALLOW),
165*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_CREATE_BO, vc4_create_bo_ioctl, DRM_RENDER_ALLOW),
166*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_MMAP_BO, vc4_mmap_bo_ioctl, DRM_RENDER_ALLOW),
167*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, DRM_RENDER_ALLOW),
168*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_GET_HANG_STATE, vc4_get_hang_state_ioctl,
169*4882a593Smuzhiyun DRM_ROOT_ONLY),
170*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_GET_PARAM, vc4_get_param_ioctl, DRM_RENDER_ALLOW),
171*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_SET_TILING, vc4_set_tiling_ioctl, DRM_RENDER_ALLOW),
172*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_GET_TILING, vc4_get_tiling_ioctl, DRM_RENDER_ALLOW),
173*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_LABEL_BO, vc4_label_bo_ioctl, DRM_RENDER_ALLOW),
174*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_GEM_MADVISE, vc4_gem_madvise_ioctl, DRM_RENDER_ALLOW),
175*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_PERFMON_CREATE, vc4_perfmon_create_ioctl, DRM_RENDER_ALLOW),
176*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_PERFMON_DESTROY, vc4_perfmon_destroy_ioctl, DRM_RENDER_ALLOW),
177*4882a593Smuzhiyun DRM_IOCTL_DEF_DRV(VC4_PERFMON_GET_VALUES, vc4_perfmon_get_values_ioctl, DRM_RENDER_ALLOW),
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun static struct drm_driver vc4_drm_driver = {
181*4882a593Smuzhiyun .driver_features = (DRIVER_MODESET |
182*4882a593Smuzhiyun DRIVER_ATOMIC |
183*4882a593Smuzhiyun DRIVER_GEM |
184*4882a593Smuzhiyun DRIVER_RENDER |
185*4882a593Smuzhiyun DRIVER_SYNCOBJ),
186*4882a593Smuzhiyun .open = vc4_open,
187*4882a593Smuzhiyun .postclose = vc4_close,
188*4882a593Smuzhiyun .irq_handler = vc4_irq,
189*4882a593Smuzhiyun .irq_preinstall = vc4_irq_preinstall,
190*4882a593Smuzhiyun .irq_postinstall = vc4_irq_postinstall,
191*4882a593Smuzhiyun .irq_uninstall = vc4_irq_uninstall,
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun #if defined(CONFIG_DEBUG_FS)
194*4882a593Smuzhiyun .debugfs_init = vc4_debugfs_init,
195*4882a593Smuzhiyun #endif
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun .gem_create_object = vc4_create_object,
198*4882a593Smuzhiyun .gem_free_object_unlocked = vc4_free_object,
199*4882a593Smuzhiyun .gem_vm_ops = &vc4_vm_ops,
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
202*4882a593Smuzhiyun .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
203*4882a593Smuzhiyun .gem_prime_export = vc4_prime_export,
204*4882a593Smuzhiyun .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
205*4882a593Smuzhiyun .gem_prime_import_sg_table = vc4_prime_import_sg_table,
206*4882a593Smuzhiyun .gem_prime_vmap = vc4_prime_vmap,
207*4882a593Smuzhiyun .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
208*4882a593Smuzhiyun .gem_prime_mmap = vc4_prime_mmap,
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun .dumb_create = vc4_dumb_create,
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun .ioctls = vc4_drm_ioctls,
213*4882a593Smuzhiyun .num_ioctls = ARRAY_SIZE(vc4_drm_ioctls),
214*4882a593Smuzhiyun .fops = &vc4_drm_fops,
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun .name = DRIVER_NAME,
217*4882a593Smuzhiyun .desc = DRIVER_DESC,
218*4882a593Smuzhiyun .date = DRIVER_DATE,
219*4882a593Smuzhiyun .major = DRIVER_MAJOR,
220*4882a593Smuzhiyun .minor = DRIVER_MINOR,
221*4882a593Smuzhiyun .patchlevel = DRIVER_PATCHLEVEL,
222*4882a593Smuzhiyun };
223*4882a593Smuzhiyun
compare_dev(struct device * dev,void * data)224*4882a593Smuzhiyun static int compare_dev(struct device *dev, void *data)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun return dev == data;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
vc4_match_add_drivers(struct device * dev,struct component_match ** match,struct platform_driver * const * drivers,int count)229*4882a593Smuzhiyun static void vc4_match_add_drivers(struct device *dev,
230*4882a593Smuzhiyun struct component_match **match,
231*4882a593Smuzhiyun struct platform_driver *const *drivers,
232*4882a593Smuzhiyun int count)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun int i;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun for (i = 0; i < count; i++) {
237*4882a593Smuzhiyun struct device_driver *drv = &drivers[i]->driver;
238*4882a593Smuzhiyun struct device *p = NULL, *d;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun while ((d = platform_find_device_by_driver(p, drv))) {
241*4882a593Smuzhiyun put_device(p);
242*4882a593Smuzhiyun component_match_add(dev, match, compare_dev, d);
243*4882a593Smuzhiyun p = d;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun put_device(p);
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun static const struct of_device_id vc4_dma_range_matches[] = {
250*4882a593Smuzhiyun { .compatible = "brcm,bcm2711-hvs" },
251*4882a593Smuzhiyun { .compatible = "brcm,bcm2835-hvs" },
252*4882a593Smuzhiyun { .compatible = "brcm,bcm2835-v3d" },
253*4882a593Smuzhiyun { .compatible = "brcm,cygnus-v3d" },
254*4882a593Smuzhiyun { .compatible = "brcm,vc4-v3d" },
255*4882a593Smuzhiyun {}
256*4882a593Smuzhiyun };
257*4882a593Smuzhiyun
vc4_drm_bind(struct device * dev)258*4882a593Smuzhiyun static int vc4_drm_bind(struct device *dev)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun struct platform_device *pdev = to_platform_device(dev);
261*4882a593Smuzhiyun struct drm_device *drm;
262*4882a593Smuzhiyun struct vc4_dev *vc4;
263*4882a593Smuzhiyun struct device_node *node;
264*4882a593Smuzhiyun struct drm_crtc *crtc;
265*4882a593Smuzhiyun int ret = 0;
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun dev->coherent_dma_mask = DMA_BIT_MASK(32);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun /* If VC4 V3D is missing, don't advertise render nodes. */
270*4882a593Smuzhiyun node = of_find_matching_node_and_match(NULL, vc4_v3d_dt_match, NULL);
271*4882a593Smuzhiyun if (!node || !of_device_is_available(node))
272*4882a593Smuzhiyun vc4_drm_driver.driver_features &= ~DRIVER_RENDER;
273*4882a593Smuzhiyun of_node_put(node);
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun node = of_find_matching_node_and_match(NULL, vc4_dma_range_matches,
276*4882a593Smuzhiyun NULL);
277*4882a593Smuzhiyun if (node) {
278*4882a593Smuzhiyun ret = of_dma_configure(dev, node, true);
279*4882a593Smuzhiyun of_node_put(node);
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun if (ret)
282*4882a593Smuzhiyun return ret;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun vc4 = devm_drm_dev_alloc(dev, &vc4_drm_driver, struct vc4_dev, base);
286*4882a593Smuzhiyun if (IS_ERR(vc4))
287*4882a593Smuzhiyun return PTR_ERR(vc4);
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun drm = &vc4->base;
290*4882a593Smuzhiyun platform_set_drvdata(pdev, drm);
291*4882a593Smuzhiyun INIT_LIST_HEAD(&vc4->debugfs_list);
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun mutex_init(&vc4->bin_bo_lock);
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun ret = vc4_bo_cache_init(drm);
296*4882a593Smuzhiyun if (ret)
297*4882a593Smuzhiyun return ret;
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun ret = drmm_mode_config_init(drm);
300*4882a593Smuzhiyun if (ret)
301*4882a593Smuzhiyun return ret;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun ret = vc4_gem_init(drm);
304*4882a593Smuzhiyun if (ret)
305*4882a593Smuzhiyun return ret;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun ret = component_bind_all(dev, drm);
308*4882a593Smuzhiyun if (ret)
309*4882a593Smuzhiyun return ret;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun ret = vc4_plane_create_additional_planes(drm);
312*4882a593Smuzhiyun if (ret)
313*4882a593Smuzhiyun goto unbind_all;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun drm_fb_helper_remove_conflicting_framebuffers(NULL, "vc4drmfb", false);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun ret = vc4_kms_load(drm);
318*4882a593Smuzhiyun if (ret < 0)
319*4882a593Smuzhiyun goto unbind_all;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun drm_for_each_crtc(crtc, drm)
322*4882a593Smuzhiyun vc4_crtc_disable_at_boot(crtc);
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun ret = drm_dev_register(drm, 0);
325*4882a593Smuzhiyun if (ret < 0)
326*4882a593Smuzhiyun goto unbind_all;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun drm_fbdev_generic_setup(drm, 16);
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun return 0;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun unbind_all:
333*4882a593Smuzhiyun component_unbind_all(dev, drm);
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun return ret;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
vc4_drm_unbind(struct device * dev)338*4882a593Smuzhiyun static void vc4_drm_unbind(struct device *dev)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun struct drm_device *drm = dev_get_drvdata(dev);
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun drm_dev_unregister(drm);
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun drm_atomic_helper_shutdown(drm);
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun static const struct component_master_ops vc4_drm_ops = {
348*4882a593Smuzhiyun .bind = vc4_drm_bind,
349*4882a593Smuzhiyun .unbind = vc4_drm_unbind,
350*4882a593Smuzhiyun };
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun static struct platform_driver *const component_drivers[] = {
353*4882a593Smuzhiyun &vc4_hdmi_driver,
354*4882a593Smuzhiyun &vc4_vec_driver,
355*4882a593Smuzhiyun &vc4_dpi_driver,
356*4882a593Smuzhiyun &vc4_dsi_driver,
357*4882a593Smuzhiyun &vc4_hvs_driver,
358*4882a593Smuzhiyun &vc4_txp_driver,
359*4882a593Smuzhiyun &vc4_crtc_driver,
360*4882a593Smuzhiyun &vc4_v3d_driver,
361*4882a593Smuzhiyun };
362*4882a593Smuzhiyun
vc4_platform_drm_probe(struct platform_device * pdev)363*4882a593Smuzhiyun static int vc4_platform_drm_probe(struct platform_device *pdev)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun struct component_match *match = NULL;
366*4882a593Smuzhiyun struct device *dev = &pdev->dev;
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun vc4_match_add_drivers(dev, &match,
369*4882a593Smuzhiyun component_drivers, ARRAY_SIZE(component_drivers));
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun return component_master_add_with_match(dev, &vc4_drm_ops, match);
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun
vc4_platform_drm_remove(struct platform_device * pdev)374*4882a593Smuzhiyun static int vc4_platform_drm_remove(struct platform_device *pdev)
375*4882a593Smuzhiyun {
376*4882a593Smuzhiyun component_master_del(&pdev->dev, &vc4_drm_ops);
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun return 0;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun static const struct of_device_id vc4_of_match[] = {
382*4882a593Smuzhiyun { .compatible = "brcm,bcm2711-vc5", },
383*4882a593Smuzhiyun { .compatible = "brcm,bcm2835-vc4", },
384*4882a593Smuzhiyun { .compatible = "brcm,cygnus-vc4", },
385*4882a593Smuzhiyun {},
386*4882a593Smuzhiyun };
387*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, vc4_of_match);
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun static struct platform_driver vc4_platform_driver = {
390*4882a593Smuzhiyun .probe = vc4_platform_drm_probe,
391*4882a593Smuzhiyun .remove = vc4_platform_drm_remove,
392*4882a593Smuzhiyun .driver = {
393*4882a593Smuzhiyun .name = "vc4-drm",
394*4882a593Smuzhiyun .of_match_table = vc4_of_match,
395*4882a593Smuzhiyun },
396*4882a593Smuzhiyun };
397*4882a593Smuzhiyun
vc4_drm_register(void)398*4882a593Smuzhiyun static int __init vc4_drm_register(void)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun int ret;
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun ret = platform_register_drivers(component_drivers,
403*4882a593Smuzhiyun ARRAY_SIZE(component_drivers));
404*4882a593Smuzhiyun if (ret)
405*4882a593Smuzhiyun return ret;
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun ret = platform_driver_register(&vc4_platform_driver);
408*4882a593Smuzhiyun if (ret)
409*4882a593Smuzhiyun platform_unregister_drivers(component_drivers,
410*4882a593Smuzhiyun ARRAY_SIZE(component_drivers));
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun return ret;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
vc4_drm_unregister(void)415*4882a593Smuzhiyun static void __exit vc4_drm_unregister(void)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun platform_unregister_drivers(component_drivers,
418*4882a593Smuzhiyun ARRAY_SIZE(component_drivers));
419*4882a593Smuzhiyun platform_driver_unregister(&vc4_platform_driver);
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun module_init(vc4_drm_register);
423*4882a593Smuzhiyun module_exit(vc4_drm_unregister);
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun MODULE_ALIAS("platform:vc4-drm");
426*4882a593Smuzhiyun MODULE_DESCRIPTION("Broadcom VC4 DRM Driver");
427*4882a593Smuzhiyun MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
428*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
429