1*4882a593Smuzhiyun // SPDX-License-Identifier: MIT
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2013-2017 Oracle Corporation
4*4882a593Smuzhiyun * This file is based on ast_mode.c
5*4882a593Smuzhiyun * Copyright 2012 Red Hat Inc.
6*4882a593Smuzhiyun * Parts based on xf86-video-ast
7*4882a593Smuzhiyun * Copyright (c) 2005 ASPEED Technology Inc.
8*4882a593Smuzhiyun * Authors: Dave Airlie <airlied@redhat.com>
9*4882a593Smuzhiyun * Michael Thayer <michael.thayer@oracle.com,
10*4882a593Smuzhiyun * Hans de Goede <hdegoede@redhat.com>
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun #include <linux/export.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <drm/drm_atomic.h>
15*4882a593Smuzhiyun #include <drm/drm_atomic_helper.h>
16*4882a593Smuzhiyun #include <drm/drm_fb_helper.h>
17*4882a593Smuzhiyun #include <drm/drm_fourcc.h>
18*4882a593Smuzhiyun #include <drm/drm_gem_framebuffer_helper.h>
19*4882a593Smuzhiyun #include <drm/drm_plane_helper.h>
20*4882a593Smuzhiyun #include <drm/drm_probe_helper.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include "hgsmi_channels.h"
23*4882a593Smuzhiyun #include "vbox_drv.h"
24*4882a593Smuzhiyun #include "vboxvideo.h"
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /*
27*4882a593Smuzhiyun * Set a graphics mode. Poke any required values into registers, do an HGSMI
28*4882a593Smuzhiyun * mode set and tell the host we support advanced graphics functions.
29*4882a593Smuzhiyun */
vbox_do_modeset(struct drm_crtc * crtc)30*4882a593Smuzhiyun static void vbox_do_modeset(struct drm_crtc *crtc)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun struct drm_framebuffer *fb = crtc->primary->state->fb;
33*4882a593Smuzhiyun struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc);
34*4882a593Smuzhiyun struct vbox_private *vbox;
35*4882a593Smuzhiyun int width, height, bpp, pitch;
36*4882a593Smuzhiyun u16 flags;
37*4882a593Smuzhiyun s32 x_offset, y_offset;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun vbox = to_vbox_dev(crtc->dev);
40*4882a593Smuzhiyun width = vbox_crtc->width ? vbox_crtc->width : 640;
41*4882a593Smuzhiyun height = vbox_crtc->height ? vbox_crtc->height : 480;
42*4882a593Smuzhiyun bpp = fb ? fb->format->cpp[0] * 8 : 32;
43*4882a593Smuzhiyun pitch = fb ? fb->pitches[0] : width * bpp / 8;
44*4882a593Smuzhiyun x_offset = vbox->single_framebuffer ? vbox_crtc->x : vbox_crtc->x_hint;
45*4882a593Smuzhiyun y_offset = vbox->single_framebuffer ? vbox_crtc->y : vbox_crtc->y_hint;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /*
48*4882a593Smuzhiyun * This is the old way of setting graphics modes. It assumed one screen
49*4882a593Smuzhiyun * and a frame-buffer at the start of video RAM. On older versions of
50*4882a593Smuzhiyun * VirtualBox, certain parts of the code still assume that the first
51*4882a593Smuzhiyun * screen is programmed this way, so try to fake it.
52*4882a593Smuzhiyun */
53*4882a593Smuzhiyun if (vbox_crtc->crtc_id == 0 && fb &&
54*4882a593Smuzhiyun vbox_crtc->fb_offset / pitch < 0xffff - crtc->y &&
55*4882a593Smuzhiyun vbox_crtc->fb_offset % (bpp / 8) == 0) {
56*4882a593Smuzhiyun vbox_write_ioport(VBE_DISPI_INDEX_XRES, width);
57*4882a593Smuzhiyun vbox_write_ioport(VBE_DISPI_INDEX_YRES, height);
58*4882a593Smuzhiyun vbox_write_ioport(VBE_DISPI_INDEX_VIRT_WIDTH, pitch * 8 / bpp);
59*4882a593Smuzhiyun vbox_write_ioport(VBE_DISPI_INDEX_BPP, bpp);
60*4882a593Smuzhiyun vbox_write_ioport(VBE_DISPI_INDEX_ENABLE, VBE_DISPI_ENABLED);
61*4882a593Smuzhiyun vbox_write_ioport(VBE_DISPI_INDEX_X_OFFSET,
62*4882a593Smuzhiyun vbox_crtc->fb_offset % pitch / bpp * 8 + vbox_crtc->x);
63*4882a593Smuzhiyun vbox_write_ioport(VBE_DISPI_INDEX_Y_OFFSET,
64*4882a593Smuzhiyun vbox_crtc->fb_offset / pitch + vbox_crtc->y);
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun flags = VBVA_SCREEN_F_ACTIVE;
68*4882a593Smuzhiyun flags |= (fb && crtc->state->enable) ? 0 : VBVA_SCREEN_F_BLANK;
69*4882a593Smuzhiyun flags |= vbox_crtc->disconnected ? VBVA_SCREEN_F_DISABLED : 0;
70*4882a593Smuzhiyun hgsmi_process_display_info(vbox->guest_pool, vbox_crtc->crtc_id,
71*4882a593Smuzhiyun x_offset, y_offset,
72*4882a593Smuzhiyun vbox_crtc->x * bpp / 8 +
73*4882a593Smuzhiyun vbox_crtc->y * pitch,
74*4882a593Smuzhiyun pitch, width, height, bpp, flags);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
vbox_set_view(struct drm_crtc * crtc)77*4882a593Smuzhiyun static int vbox_set_view(struct drm_crtc *crtc)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc);
80*4882a593Smuzhiyun struct vbox_private *vbox = to_vbox_dev(crtc->dev);
81*4882a593Smuzhiyun struct vbva_infoview *p;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /*
84*4882a593Smuzhiyun * Tell the host about the view. This design originally targeted the
85*4882a593Smuzhiyun * Windows XP driver architecture and assumed that each screen would
86*4882a593Smuzhiyun * have a dedicated frame buffer with the command buffer following it,
87*4882a593Smuzhiyun * the whole being a "view". The host works out which screen a command
88*4882a593Smuzhiyun * buffer belongs to by checking whether it is in the first view, then
89*4882a593Smuzhiyun * whether it is in the second and so on. The first match wins. We
90*4882a593Smuzhiyun * cheat around this by making the first view be the managed memory
91*4882a593Smuzhiyun * plus the first command buffer, the second the same plus the second
92*4882a593Smuzhiyun * buffer and so on.
93*4882a593Smuzhiyun */
94*4882a593Smuzhiyun p = hgsmi_buffer_alloc(vbox->guest_pool, sizeof(*p),
95*4882a593Smuzhiyun HGSMI_CH_VBVA, VBVA_INFO_VIEW);
96*4882a593Smuzhiyun if (!p)
97*4882a593Smuzhiyun return -ENOMEM;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun p->view_index = vbox_crtc->crtc_id;
100*4882a593Smuzhiyun p->view_offset = vbox_crtc->fb_offset;
101*4882a593Smuzhiyun p->view_size = vbox->available_vram_size - vbox_crtc->fb_offset +
102*4882a593Smuzhiyun vbox_crtc->crtc_id * VBVA_MIN_BUFFER_SIZE;
103*4882a593Smuzhiyun p->max_screen_size = vbox->available_vram_size - vbox_crtc->fb_offset;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun hgsmi_buffer_submit(vbox->guest_pool, p);
106*4882a593Smuzhiyun hgsmi_buffer_free(vbox->guest_pool, p);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun return 0;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /*
112*4882a593Smuzhiyun * Try to map the layout of virtual screens to the range of the input device.
113*4882a593Smuzhiyun * Return true if we need to re-set the crtc modes due to screen offset
114*4882a593Smuzhiyun * changes.
115*4882a593Smuzhiyun */
vbox_set_up_input_mapping(struct vbox_private * vbox)116*4882a593Smuzhiyun static bool vbox_set_up_input_mapping(struct vbox_private *vbox)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun struct drm_crtc *crtci;
119*4882a593Smuzhiyun struct drm_connector *connectori;
120*4882a593Smuzhiyun struct drm_framebuffer *fb, *fb1 = NULL;
121*4882a593Smuzhiyun bool single_framebuffer = true;
122*4882a593Smuzhiyun bool old_single_framebuffer = vbox->single_framebuffer;
123*4882a593Smuzhiyun u16 width = 0, height = 0;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun /*
126*4882a593Smuzhiyun * Are we using an X.Org-style single large frame-buffer for all crtcs?
127*4882a593Smuzhiyun * If so then screen layout can be deduced from the crtc offsets.
128*4882a593Smuzhiyun * Same fall-back if this is the fbdev frame-buffer.
129*4882a593Smuzhiyun */
130*4882a593Smuzhiyun list_for_each_entry(crtci, &vbox->ddev.mode_config.crtc_list, head) {
131*4882a593Smuzhiyun fb = crtci->primary->state->fb;
132*4882a593Smuzhiyun if (!fb)
133*4882a593Smuzhiyun continue;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun if (!fb1) {
136*4882a593Smuzhiyun fb1 = fb;
137*4882a593Smuzhiyun if (fb1 == vbox->ddev.fb_helper->fb)
138*4882a593Smuzhiyun break;
139*4882a593Smuzhiyun } else if (fb != fb1) {
140*4882a593Smuzhiyun single_framebuffer = false;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun if (!fb1)
144*4882a593Smuzhiyun return false;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun if (single_framebuffer) {
147*4882a593Smuzhiyun vbox->single_framebuffer = true;
148*4882a593Smuzhiyun vbox->input_mapping_width = fb1->width;
149*4882a593Smuzhiyun vbox->input_mapping_height = fb1->height;
150*4882a593Smuzhiyun return old_single_framebuffer != vbox->single_framebuffer;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun /* Otherwise calculate the total span of all screens. */
153*4882a593Smuzhiyun list_for_each_entry(connectori, &vbox->ddev.mode_config.connector_list,
154*4882a593Smuzhiyun head) {
155*4882a593Smuzhiyun struct vbox_connector *vbox_connector =
156*4882a593Smuzhiyun to_vbox_connector(connectori);
157*4882a593Smuzhiyun struct vbox_crtc *vbox_crtc = vbox_connector->vbox_crtc;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun width = max_t(u16, width, vbox_crtc->x_hint +
160*4882a593Smuzhiyun vbox_connector->mode_hint.width);
161*4882a593Smuzhiyun height = max_t(u16, height, vbox_crtc->y_hint +
162*4882a593Smuzhiyun vbox_connector->mode_hint.height);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun vbox->single_framebuffer = false;
166*4882a593Smuzhiyun vbox->input_mapping_width = width;
167*4882a593Smuzhiyun vbox->input_mapping_height = height;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun return old_single_framebuffer != vbox->single_framebuffer;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
vbox_crtc_set_base_and_mode(struct drm_crtc * crtc,struct drm_framebuffer * fb,int x,int y)172*4882a593Smuzhiyun static void vbox_crtc_set_base_and_mode(struct drm_crtc *crtc,
173*4882a593Smuzhiyun struct drm_framebuffer *fb,
174*4882a593Smuzhiyun int x, int y)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun struct drm_gem_vram_object *gbo = drm_gem_vram_of_gem(fb->obj[0]);
177*4882a593Smuzhiyun struct vbox_private *vbox = to_vbox_dev(crtc->dev);
178*4882a593Smuzhiyun struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc);
179*4882a593Smuzhiyun bool needs_modeset = drm_atomic_crtc_needs_modeset(crtc->state);
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun mutex_lock(&vbox->hw_mutex);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun if (crtc->state->enable) {
184*4882a593Smuzhiyun vbox_crtc->width = crtc->state->mode.hdisplay;
185*4882a593Smuzhiyun vbox_crtc->height = crtc->state->mode.vdisplay;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun vbox_crtc->x = x;
189*4882a593Smuzhiyun vbox_crtc->y = y;
190*4882a593Smuzhiyun vbox_crtc->fb_offset = drm_gem_vram_offset(gbo);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /* vbox_do_modeset() checks vbox->single_framebuffer so update it now */
193*4882a593Smuzhiyun if (needs_modeset && vbox_set_up_input_mapping(vbox)) {
194*4882a593Smuzhiyun struct drm_crtc *crtci;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun list_for_each_entry(crtci, &vbox->ddev.mode_config.crtc_list,
197*4882a593Smuzhiyun head) {
198*4882a593Smuzhiyun if (crtci == crtc)
199*4882a593Smuzhiyun continue;
200*4882a593Smuzhiyun vbox_do_modeset(crtci);
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun vbox_set_view(crtc);
205*4882a593Smuzhiyun vbox_do_modeset(crtc);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun if (needs_modeset)
208*4882a593Smuzhiyun hgsmi_update_input_mapping(vbox->guest_pool, 0, 0,
209*4882a593Smuzhiyun vbox->input_mapping_width,
210*4882a593Smuzhiyun vbox->input_mapping_height);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun mutex_unlock(&vbox->hw_mutex);
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun
vbox_crtc_atomic_enable(struct drm_crtc * crtc,struct drm_crtc_state * old_crtc_state)215*4882a593Smuzhiyun static void vbox_crtc_atomic_enable(struct drm_crtc *crtc,
216*4882a593Smuzhiyun struct drm_crtc_state *old_crtc_state)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
vbox_crtc_atomic_disable(struct drm_crtc * crtc,struct drm_crtc_state * old_crtc_state)220*4882a593Smuzhiyun static void vbox_crtc_atomic_disable(struct drm_crtc *crtc,
221*4882a593Smuzhiyun struct drm_crtc_state *old_crtc_state)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
vbox_crtc_atomic_flush(struct drm_crtc * crtc,struct drm_crtc_state * old_crtc_state)225*4882a593Smuzhiyun static void vbox_crtc_atomic_flush(struct drm_crtc *crtc,
226*4882a593Smuzhiyun struct drm_crtc_state *old_crtc_state)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun static const struct drm_crtc_helper_funcs vbox_crtc_helper_funcs = {
231*4882a593Smuzhiyun .atomic_enable = vbox_crtc_atomic_enable,
232*4882a593Smuzhiyun .atomic_disable = vbox_crtc_atomic_disable,
233*4882a593Smuzhiyun .atomic_flush = vbox_crtc_atomic_flush,
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun
vbox_crtc_destroy(struct drm_crtc * crtc)236*4882a593Smuzhiyun static void vbox_crtc_destroy(struct drm_crtc *crtc)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun drm_crtc_cleanup(crtc);
239*4882a593Smuzhiyun kfree(crtc);
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun static const struct drm_crtc_funcs vbox_crtc_funcs = {
243*4882a593Smuzhiyun .set_config = drm_atomic_helper_set_config,
244*4882a593Smuzhiyun .page_flip = drm_atomic_helper_page_flip,
245*4882a593Smuzhiyun /* .gamma_set = vbox_crtc_gamma_set, */
246*4882a593Smuzhiyun .destroy = vbox_crtc_destroy,
247*4882a593Smuzhiyun .reset = drm_atomic_helper_crtc_reset,
248*4882a593Smuzhiyun .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
249*4882a593Smuzhiyun .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
250*4882a593Smuzhiyun };
251*4882a593Smuzhiyun
vbox_primary_atomic_check(struct drm_plane * plane,struct drm_plane_state * new_state)252*4882a593Smuzhiyun static int vbox_primary_atomic_check(struct drm_plane *plane,
253*4882a593Smuzhiyun struct drm_plane_state *new_state)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun struct drm_crtc_state *crtc_state = NULL;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun if (new_state->crtc) {
258*4882a593Smuzhiyun crtc_state = drm_atomic_get_existing_crtc_state(
259*4882a593Smuzhiyun new_state->state, new_state->crtc);
260*4882a593Smuzhiyun if (WARN_ON(!crtc_state))
261*4882a593Smuzhiyun return -EINVAL;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun return drm_atomic_helper_check_plane_state(new_state, crtc_state,
265*4882a593Smuzhiyun DRM_PLANE_HELPER_NO_SCALING,
266*4882a593Smuzhiyun DRM_PLANE_HELPER_NO_SCALING,
267*4882a593Smuzhiyun false, true);
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun
vbox_primary_atomic_update(struct drm_plane * plane,struct drm_plane_state * old_state)270*4882a593Smuzhiyun static void vbox_primary_atomic_update(struct drm_plane *plane,
271*4882a593Smuzhiyun struct drm_plane_state *old_state)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun struct drm_crtc *crtc = plane->state->crtc;
274*4882a593Smuzhiyun struct drm_framebuffer *fb = plane->state->fb;
275*4882a593Smuzhiyun struct vbox_private *vbox = to_vbox_dev(fb->dev);
276*4882a593Smuzhiyun struct drm_mode_rect *clips;
277*4882a593Smuzhiyun uint32_t num_clips, i;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun vbox_crtc_set_base_and_mode(crtc, fb,
280*4882a593Smuzhiyun plane->state->src_x >> 16,
281*4882a593Smuzhiyun plane->state->src_y >> 16);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun /* Send information about dirty rectangles to VBVA. */
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun clips = drm_plane_get_damage_clips(plane->state);
286*4882a593Smuzhiyun num_clips = drm_plane_get_damage_clips_count(plane->state);
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun if (!num_clips)
289*4882a593Smuzhiyun return;
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun mutex_lock(&vbox->hw_mutex);
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun for (i = 0; i < num_clips; ++i, ++clips) {
294*4882a593Smuzhiyun struct vbva_cmd_hdr cmd_hdr;
295*4882a593Smuzhiyun unsigned int crtc_id = to_vbox_crtc(crtc)->crtc_id;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun cmd_hdr.x = (s16)clips->x1;
298*4882a593Smuzhiyun cmd_hdr.y = (s16)clips->y1;
299*4882a593Smuzhiyun cmd_hdr.w = (u16)clips->x2 - clips->x1;
300*4882a593Smuzhiyun cmd_hdr.h = (u16)clips->y2 - clips->y1;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun if (!vbva_buffer_begin_update(&vbox->vbva_info[crtc_id],
303*4882a593Smuzhiyun vbox->guest_pool))
304*4882a593Smuzhiyun continue;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun vbva_write(&vbox->vbva_info[crtc_id], vbox->guest_pool,
307*4882a593Smuzhiyun &cmd_hdr, sizeof(cmd_hdr));
308*4882a593Smuzhiyun vbva_buffer_end_update(&vbox->vbva_info[crtc_id]);
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun mutex_unlock(&vbox->hw_mutex);
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun
vbox_primary_atomic_disable(struct drm_plane * plane,struct drm_plane_state * old_state)314*4882a593Smuzhiyun static void vbox_primary_atomic_disable(struct drm_plane *plane,
315*4882a593Smuzhiyun struct drm_plane_state *old_state)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun struct drm_crtc *crtc = old_state->crtc;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun /* vbox_do_modeset checks plane->state->fb and will disable if NULL */
320*4882a593Smuzhiyun vbox_crtc_set_base_and_mode(crtc, old_state->fb,
321*4882a593Smuzhiyun old_state->src_x >> 16,
322*4882a593Smuzhiyun old_state->src_y >> 16);
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun
vbox_cursor_atomic_check(struct drm_plane * plane,struct drm_plane_state * new_state)325*4882a593Smuzhiyun static int vbox_cursor_atomic_check(struct drm_plane *plane,
326*4882a593Smuzhiyun struct drm_plane_state *new_state)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun struct drm_crtc_state *crtc_state = NULL;
329*4882a593Smuzhiyun u32 width = new_state->crtc_w;
330*4882a593Smuzhiyun u32 height = new_state->crtc_h;
331*4882a593Smuzhiyun int ret;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun if (new_state->crtc) {
334*4882a593Smuzhiyun crtc_state = drm_atomic_get_existing_crtc_state(
335*4882a593Smuzhiyun new_state->state, new_state->crtc);
336*4882a593Smuzhiyun if (WARN_ON(!crtc_state))
337*4882a593Smuzhiyun return -EINVAL;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun ret = drm_atomic_helper_check_plane_state(new_state, crtc_state,
341*4882a593Smuzhiyun DRM_PLANE_HELPER_NO_SCALING,
342*4882a593Smuzhiyun DRM_PLANE_HELPER_NO_SCALING,
343*4882a593Smuzhiyun true, true);
344*4882a593Smuzhiyun if (ret)
345*4882a593Smuzhiyun return ret;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun if (!new_state->fb)
348*4882a593Smuzhiyun return 0;
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun if (width > VBOX_MAX_CURSOR_WIDTH || height > VBOX_MAX_CURSOR_HEIGHT ||
351*4882a593Smuzhiyun width == 0 || height == 0)
352*4882a593Smuzhiyun return -EINVAL;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun return 0;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun /*
358*4882a593Smuzhiyun * Copy the ARGB image and generate the mask, which is needed in case the host
359*4882a593Smuzhiyun * does not support ARGB cursors. The mask is a 1BPP bitmap with the bit set
360*4882a593Smuzhiyun * if the corresponding alpha value in the ARGB image is greater than 0xF0.
361*4882a593Smuzhiyun */
copy_cursor_image(u8 * src,u8 * dst,u32 width,u32 height,size_t mask_size)362*4882a593Smuzhiyun static void copy_cursor_image(u8 *src, u8 *dst, u32 width, u32 height,
363*4882a593Smuzhiyun size_t mask_size)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun size_t line_size = (width + 7) / 8;
366*4882a593Smuzhiyun u32 i, j;
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun memcpy(dst + mask_size, src, width * height * 4);
369*4882a593Smuzhiyun for (i = 0; i < height; ++i)
370*4882a593Smuzhiyun for (j = 0; j < width; ++j)
371*4882a593Smuzhiyun if (((u32 *)src)[i * width + j] > 0xf0000000)
372*4882a593Smuzhiyun dst[i * line_size + j / 8] |= (0x80 >> (j % 8));
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun
vbox_cursor_atomic_update(struct drm_plane * plane,struct drm_plane_state * old_state)375*4882a593Smuzhiyun static void vbox_cursor_atomic_update(struct drm_plane *plane,
376*4882a593Smuzhiyun struct drm_plane_state *old_state)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun struct vbox_private *vbox =
379*4882a593Smuzhiyun container_of(plane->dev, struct vbox_private, ddev);
380*4882a593Smuzhiyun struct vbox_crtc *vbox_crtc = to_vbox_crtc(plane->state->crtc);
381*4882a593Smuzhiyun struct drm_framebuffer *fb = plane->state->fb;
382*4882a593Smuzhiyun struct drm_gem_vram_object *gbo = drm_gem_vram_of_gem(fb->obj[0]);
383*4882a593Smuzhiyun u32 width = plane->state->crtc_w;
384*4882a593Smuzhiyun u32 height = plane->state->crtc_h;
385*4882a593Smuzhiyun size_t data_size, mask_size;
386*4882a593Smuzhiyun u32 flags;
387*4882a593Smuzhiyun u8 *src;
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun /*
390*4882a593Smuzhiyun * VirtualBox uses the host windowing system to draw the cursor so
391*4882a593Smuzhiyun * moves are a no-op, we only need to upload new cursor sprites.
392*4882a593Smuzhiyun */
393*4882a593Smuzhiyun if (fb == old_state->fb)
394*4882a593Smuzhiyun return;
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun mutex_lock(&vbox->hw_mutex);
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun vbox_crtc->cursor_enabled = true;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun src = drm_gem_vram_vmap(gbo);
401*4882a593Smuzhiyun if (IS_ERR(src)) {
402*4882a593Smuzhiyun /*
403*4882a593Smuzhiyun * BUG: we should have pinned the BO in prepare_fb().
404*4882a593Smuzhiyun */
405*4882a593Smuzhiyun mutex_unlock(&vbox->hw_mutex);
406*4882a593Smuzhiyun DRM_WARN("Could not map cursor bo, skipping update\n");
407*4882a593Smuzhiyun return;
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun /*
411*4882a593Smuzhiyun * The mask must be calculated based on the alpha
412*4882a593Smuzhiyun * channel, one bit per ARGB word, and must be 32-bit
413*4882a593Smuzhiyun * padded.
414*4882a593Smuzhiyun */
415*4882a593Smuzhiyun mask_size = ((width + 7) / 8 * height + 3) & ~3;
416*4882a593Smuzhiyun data_size = width * height * 4 + mask_size;
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun copy_cursor_image(src, vbox->cursor_data, width, height, mask_size);
419*4882a593Smuzhiyun drm_gem_vram_vunmap(gbo, src);
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun flags = VBOX_MOUSE_POINTER_VISIBLE | VBOX_MOUSE_POINTER_SHAPE |
422*4882a593Smuzhiyun VBOX_MOUSE_POINTER_ALPHA;
423*4882a593Smuzhiyun hgsmi_update_pointer_shape(vbox->guest_pool, flags,
424*4882a593Smuzhiyun min_t(u32, max(fb->hot_x, 0), width),
425*4882a593Smuzhiyun min_t(u32, max(fb->hot_y, 0), height),
426*4882a593Smuzhiyun width, height, vbox->cursor_data, data_size);
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun mutex_unlock(&vbox->hw_mutex);
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun
vbox_cursor_atomic_disable(struct drm_plane * plane,struct drm_plane_state * old_state)431*4882a593Smuzhiyun static void vbox_cursor_atomic_disable(struct drm_plane *plane,
432*4882a593Smuzhiyun struct drm_plane_state *old_state)
433*4882a593Smuzhiyun {
434*4882a593Smuzhiyun struct vbox_private *vbox =
435*4882a593Smuzhiyun container_of(plane->dev, struct vbox_private, ddev);
436*4882a593Smuzhiyun struct vbox_crtc *vbox_crtc = to_vbox_crtc(old_state->crtc);
437*4882a593Smuzhiyun bool cursor_enabled = false;
438*4882a593Smuzhiyun struct drm_crtc *crtci;
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun mutex_lock(&vbox->hw_mutex);
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun vbox_crtc->cursor_enabled = false;
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun list_for_each_entry(crtci, &vbox->ddev.mode_config.crtc_list, head) {
445*4882a593Smuzhiyun if (to_vbox_crtc(crtci)->cursor_enabled)
446*4882a593Smuzhiyun cursor_enabled = true;
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun if (!cursor_enabled)
450*4882a593Smuzhiyun hgsmi_update_pointer_shape(vbox->guest_pool, 0, 0, 0,
451*4882a593Smuzhiyun 0, 0, NULL, 0);
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun mutex_unlock(&vbox->hw_mutex);
454*4882a593Smuzhiyun }
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun static const u32 vbox_cursor_plane_formats[] = {
457*4882a593Smuzhiyun DRM_FORMAT_ARGB8888,
458*4882a593Smuzhiyun };
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun static const struct drm_plane_helper_funcs vbox_cursor_helper_funcs = {
461*4882a593Smuzhiyun .atomic_check = vbox_cursor_atomic_check,
462*4882a593Smuzhiyun .atomic_update = vbox_cursor_atomic_update,
463*4882a593Smuzhiyun .atomic_disable = vbox_cursor_atomic_disable,
464*4882a593Smuzhiyun .prepare_fb = drm_gem_vram_plane_helper_prepare_fb,
465*4882a593Smuzhiyun .cleanup_fb = drm_gem_vram_plane_helper_cleanup_fb,
466*4882a593Smuzhiyun };
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun static const struct drm_plane_funcs vbox_cursor_plane_funcs = {
469*4882a593Smuzhiyun .update_plane = drm_atomic_helper_update_plane,
470*4882a593Smuzhiyun .disable_plane = drm_atomic_helper_disable_plane,
471*4882a593Smuzhiyun .destroy = drm_primary_helper_destroy,
472*4882a593Smuzhiyun .reset = drm_atomic_helper_plane_reset,
473*4882a593Smuzhiyun .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
474*4882a593Smuzhiyun .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
475*4882a593Smuzhiyun };
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun static const u32 vbox_primary_plane_formats[] = {
478*4882a593Smuzhiyun DRM_FORMAT_XRGB8888,
479*4882a593Smuzhiyun DRM_FORMAT_ARGB8888,
480*4882a593Smuzhiyun };
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun static const struct drm_plane_helper_funcs vbox_primary_helper_funcs = {
483*4882a593Smuzhiyun .atomic_check = vbox_primary_atomic_check,
484*4882a593Smuzhiyun .atomic_update = vbox_primary_atomic_update,
485*4882a593Smuzhiyun .atomic_disable = vbox_primary_atomic_disable,
486*4882a593Smuzhiyun .prepare_fb = drm_gem_vram_plane_helper_prepare_fb,
487*4882a593Smuzhiyun .cleanup_fb = drm_gem_vram_plane_helper_cleanup_fb,
488*4882a593Smuzhiyun };
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun static const struct drm_plane_funcs vbox_primary_plane_funcs = {
491*4882a593Smuzhiyun .update_plane = drm_atomic_helper_update_plane,
492*4882a593Smuzhiyun .disable_plane = drm_atomic_helper_disable_plane,
493*4882a593Smuzhiyun .destroy = drm_primary_helper_destroy,
494*4882a593Smuzhiyun .reset = drm_atomic_helper_plane_reset,
495*4882a593Smuzhiyun .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
496*4882a593Smuzhiyun .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
497*4882a593Smuzhiyun };
498*4882a593Smuzhiyun
vbox_create_plane(struct vbox_private * vbox,unsigned int possible_crtcs,enum drm_plane_type type)499*4882a593Smuzhiyun static struct drm_plane *vbox_create_plane(struct vbox_private *vbox,
500*4882a593Smuzhiyun unsigned int possible_crtcs,
501*4882a593Smuzhiyun enum drm_plane_type type)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun const struct drm_plane_helper_funcs *helper_funcs = NULL;
504*4882a593Smuzhiyun const struct drm_plane_funcs *funcs;
505*4882a593Smuzhiyun struct drm_plane *plane;
506*4882a593Smuzhiyun const u32 *formats;
507*4882a593Smuzhiyun int num_formats;
508*4882a593Smuzhiyun int err;
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun if (type == DRM_PLANE_TYPE_PRIMARY) {
511*4882a593Smuzhiyun funcs = &vbox_primary_plane_funcs;
512*4882a593Smuzhiyun formats = vbox_primary_plane_formats;
513*4882a593Smuzhiyun helper_funcs = &vbox_primary_helper_funcs;
514*4882a593Smuzhiyun num_formats = ARRAY_SIZE(vbox_primary_plane_formats);
515*4882a593Smuzhiyun } else if (type == DRM_PLANE_TYPE_CURSOR) {
516*4882a593Smuzhiyun funcs = &vbox_cursor_plane_funcs;
517*4882a593Smuzhiyun formats = vbox_cursor_plane_formats;
518*4882a593Smuzhiyun helper_funcs = &vbox_cursor_helper_funcs;
519*4882a593Smuzhiyun num_formats = ARRAY_SIZE(vbox_cursor_plane_formats);
520*4882a593Smuzhiyun } else {
521*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun plane = kzalloc(sizeof(*plane), GFP_KERNEL);
525*4882a593Smuzhiyun if (!plane)
526*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun err = drm_universal_plane_init(&vbox->ddev, plane, possible_crtcs,
529*4882a593Smuzhiyun funcs, formats, num_formats,
530*4882a593Smuzhiyun NULL, type, NULL);
531*4882a593Smuzhiyun if (err)
532*4882a593Smuzhiyun goto free_plane;
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun drm_plane_helper_add(plane, helper_funcs);
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun return plane;
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun free_plane:
539*4882a593Smuzhiyun kfree(plane);
540*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun
vbox_crtc_init(struct drm_device * dev,unsigned int i)543*4882a593Smuzhiyun static struct vbox_crtc *vbox_crtc_init(struct drm_device *dev, unsigned int i)
544*4882a593Smuzhiyun {
545*4882a593Smuzhiyun struct vbox_private *vbox =
546*4882a593Smuzhiyun container_of(dev, struct vbox_private, ddev);
547*4882a593Smuzhiyun struct drm_plane *cursor = NULL;
548*4882a593Smuzhiyun struct vbox_crtc *vbox_crtc;
549*4882a593Smuzhiyun struct drm_plane *primary;
550*4882a593Smuzhiyun u32 caps = 0;
551*4882a593Smuzhiyun int ret;
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun ret = hgsmi_query_conf(vbox->guest_pool,
554*4882a593Smuzhiyun VBOX_VBVA_CONF32_CURSOR_CAPABILITIES, &caps);
555*4882a593Smuzhiyun if (ret)
556*4882a593Smuzhiyun return ERR_PTR(ret);
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun vbox_crtc = kzalloc(sizeof(*vbox_crtc), GFP_KERNEL);
559*4882a593Smuzhiyun if (!vbox_crtc)
560*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun primary = vbox_create_plane(vbox, 1 << i, DRM_PLANE_TYPE_PRIMARY);
563*4882a593Smuzhiyun if (IS_ERR(primary)) {
564*4882a593Smuzhiyun ret = PTR_ERR(primary);
565*4882a593Smuzhiyun goto free_mem;
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun if ((caps & VBOX_VBVA_CURSOR_CAPABILITY_HARDWARE)) {
569*4882a593Smuzhiyun cursor = vbox_create_plane(vbox, 1 << i, DRM_PLANE_TYPE_CURSOR);
570*4882a593Smuzhiyun if (IS_ERR(cursor)) {
571*4882a593Smuzhiyun ret = PTR_ERR(cursor);
572*4882a593Smuzhiyun goto clean_primary;
573*4882a593Smuzhiyun }
574*4882a593Smuzhiyun } else {
575*4882a593Smuzhiyun DRM_WARN("VirtualBox host is too old, no cursor support\n");
576*4882a593Smuzhiyun }
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun vbox_crtc->crtc_id = i;
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun ret = drm_crtc_init_with_planes(dev, &vbox_crtc->base, primary, cursor,
581*4882a593Smuzhiyun &vbox_crtc_funcs, NULL);
582*4882a593Smuzhiyun if (ret)
583*4882a593Smuzhiyun goto clean_cursor;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun drm_mode_crtc_set_gamma_size(&vbox_crtc->base, 256);
586*4882a593Smuzhiyun drm_crtc_helper_add(&vbox_crtc->base, &vbox_crtc_helper_funcs);
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun return vbox_crtc;
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun clean_cursor:
591*4882a593Smuzhiyun if (cursor) {
592*4882a593Smuzhiyun drm_plane_cleanup(cursor);
593*4882a593Smuzhiyun kfree(cursor);
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun clean_primary:
596*4882a593Smuzhiyun drm_plane_cleanup(primary);
597*4882a593Smuzhiyun kfree(primary);
598*4882a593Smuzhiyun free_mem:
599*4882a593Smuzhiyun kfree(vbox_crtc);
600*4882a593Smuzhiyun return ERR_PTR(ret);
601*4882a593Smuzhiyun }
602*4882a593Smuzhiyun
vbox_encoder_destroy(struct drm_encoder * encoder)603*4882a593Smuzhiyun static void vbox_encoder_destroy(struct drm_encoder *encoder)
604*4882a593Smuzhiyun {
605*4882a593Smuzhiyun drm_encoder_cleanup(encoder);
606*4882a593Smuzhiyun kfree(encoder);
607*4882a593Smuzhiyun }
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun static const struct drm_encoder_funcs vbox_enc_funcs = {
610*4882a593Smuzhiyun .destroy = vbox_encoder_destroy,
611*4882a593Smuzhiyun };
612*4882a593Smuzhiyun
vbox_encoder_init(struct drm_device * dev,unsigned int i)613*4882a593Smuzhiyun static struct drm_encoder *vbox_encoder_init(struct drm_device *dev,
614*4882a593Smuzhiyun unsigned int i)
615*4882a593Smuzhiyun {
616*4882a593Smuzhiyun struct vbox_encoder *vbox_encoder;
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun vbox_encoder = kzalloc(sizeof(*vbox_encoder), GFP_KERNEL);
619*4882a593Smuzhiyun if (!vbox_encoder)
620*4882a593Smuzhiyun return NULL;
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun drm_encoder_init(dev, &vbox_encoder->base, &vbox_enc_funcs,
623*4882a593Smuzhiyun DRM_MODE_ENCODER_DAC, NULL);
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun vbox_encoder->base.possible_crtcs = 1 << i;
626*4882a593Smuzhiyun return &vbox_encoder->base;
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun /*
630*4882a593Smuzhiyun * Generate EDID data with a mode-unique serial number for the virtual
631*4882a593Smuzhiyun * monitor to try to persuade Unity that different modes correspond to
632*4882a593Smuzhiyun * different monitors and it should not try to force the same resolution on
633*4882a593Smuzhiyun * them.
634*4882a593Smuzhiyun */
vbox_set_edid(struct drm_connector * connector,int width,int height)635*4882a593Smuzhiyun static void vbox_set_edid(struct drm_connector *connector, int width,
636*4882a593Smuzhiyun int height)
637*4882a593Smuzhiyun {
638*4882a593Smuzhiyun enum { EDID_SIZE = 128 };
639*4882a593Smuzhiyun unsigned char edid[EDID_SIZE] = {
640*4882a593Smuzhiyun 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, /* header */
641*4882a593Smuzhiyun 0x58, 0x58, /* manufacturer (VBX) */
642*4882a593Smuzhiyun 0x00, 0x00, /* product code */
643*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x00, /* serial number goes here */
644*4882a593Smuzhiyun 0x01, /* week of manufacture */
645*4882a593Smuzhiyun 0x00, /* year of manufacture */
646*4882a593Smuzhiyun 0x01, 0x03, /* EDID version */
647*4882a593Smuzhiyun 0x80, /* capabilities - digital */
648*4882a593Smuzhiyun 0x00, /* horiz. res in cm, zero for projectors */
649*4882a593Smuzhiyun 0x00, /* vert. res in cm */
650*4882a593Smuzhiyun 0x78, /* display gamma (120 == 2.2). */
651*4882a593Smuzhiyun 0xEE, /* features (standby, suspend, off, RGB, std */
652*4882a593Smuzhiyun /* colour space, preferred timing mode) */
653*4882a593Smuzhiyun 0xEE, 0x91, 0xA3, 0x54, 0x4C, 0x99, 0x26, 0x0F, 0x50, 0x54,
654*4882a593Smuzhiyun /* chromaticity for standard colour space. */
655*4882a593Smuzhiyun 0x00, 0x00, 0x00, /* no default timings */
656*4882a593Smuzhiyun 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
657*4882a593Smuzhiyun 0x01, 0x01,
658*4882a593Smuzhiyun 0x01, 0x01, 0x01, 0x01, /* no standard timings */
659*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x06, 0x00, 0x02, 0x02,
660*4882a593Smuzhiyun 0x02, 0x02,
661*4882a593Smuzhiyun /* descriptor block 1 goes below */
662*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
663*4882a593Smuzhiyun /* descriptor block 2, monitor ranges */
664*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0xFD, 0x00,
665*4882a593Smuzhiyun 0x00, 0xC8, 0x00, 0xC8, 0x64, 0x00, 0x0A, 0x20, 0x20, 0x20,
666*4882a593Smuzhiyun 0x20, 0x20,
667*4882a593Smuzhiyun /* 0-200Hz vertical, 0-200KHz horizontal, 1000MHz pixel clock */
668*4882a593Smuzhiyun 0x20,
669*4882a593Smuzhiyun /* descriptor block 3, monitor name */
670*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0xFC, 0x00,
671*4882a593Smuzhiyun 'V', 'B', 'O', 'X', ' ', 'm', 'o', 'n', 'i', 't', 'o', 'r',
672*4882a593Smuzhiyun '\n',
673*4882a593Smuzhiyun /* descriptor block 4: dummy data */
674*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x10, 0x00,
675*4882a593Smuzhiyun 0x0A, 0x20, 0x20, 0x20, 0x20, 0x20,
676*4882a593Smuzhiyun 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
677*4882a593Smuzhiyun 0x20,
678*4882a593Smuzhiyun 0x00, /* number of extensions */
679*4882a593Smuzhiyun 0x00 /* checksum goes here */
680*4882a593Smuzhiyun };
681*4882a593Smuzhiyun int clock = (width + 6) * (height + 6) * 60 / 10000;
682*4882a593Smuzhiyun unsigned int i, sum = 0;
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun edid[12] = width & 0xff;
685*4882a593Smuzhiyun edid[13] = width >> 8;
686*4882a593Smuzhiyun edid[14] = height & 0xff;
687*4882a593Smuzhiyun edid[15] = height >> 8;
688*4882a593Smuzhiyun edid[54] = clock & 0xff;
689*4882a593Smuzhiyun edid[55] = clock >> 8;
690*4882a593Smuzhiyun edid[56] = width & 0xff;
691*4882a593Smuzhiyun edid[58] = (width >> 4) & 0xf0;
692*4882a593Smuzhiyun edid[59] = height & 0xff;
693*4882a593Smuzhiyun edid[61] = (height >> 4) & 0xf0;
694*4882a593Smuzhiyun for (i = 0; i < EDID_SIZE - 1; ++i)
695*4882a593Smuzhiyun sum += edid[i];
696*4882a593Smuzhiyun edid[EDID_SIZE - 1] = (0x100 - (sum & 0xFF)) & 0xFF;
697*4882a593Smuzhiyun drm_connector_update_edid_property(connector, (struct edid *)edid);
698*4882a593Smuzhiyun }
699*4882a593Smuzhiyun
vbox_get_modes(struct drm_connector * connector)700*4882a593Smuzhiyun static int vbox_get_modes(struct drm_connector *connector)
701*4882a593Smuzhiyun {
702*4882a593Smuzhiyun struct vbox_connector *vbox_connector = NULL;
703*4882a593Smuzhiyun struct drm_display_mode *mode = NULL;
704*4882a593Smuzhiyun struct vbox_private *vbox = NULL;
705*4882a593Smuzhiyun unsigned int num_modes = 0;
706*4882a593Smuzhiyun int preferred_width, preferred_height;
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun vbox_connector = to_vbox_connector(connector);
709*4882a593Smuzhiyun vbox = to_vbox_dev(connector->dev);
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun hgsmi_report_flags_location(vbox->guest_pool, GUEST_HEAP_OFFSET(vbox) +
712*4882a593Smuzhiyun HOST_FLAGS_OFFSET);
713*4882a593Smuzhiyun if (vbox_connector->vbox_crtc->crtc_id == 0)
714*4882a593Smuzhiyun vbox_report_caps(vbox);
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun num_modes = drm_add_modes_noedid(connector, 2560, 1600);
717*4882a593Smuzhiyun preferred_width = vbox_connector->mode_hint.width ?
718*4882a593Smuzhiyun vbox_connector->mode_hint.width : 1024;
719*4882a593Smuzhiyun preferred_height = vbox_connector->mode_hint.height ?
720*4882a593Smuzhiyun vbox_connector->mode_hint.height : 768;
721*4882a593Smuzhiyun mode = drm_cvt_mode(connector->dev, preferred_width, preferred_height,
722*4882a593Smuzhiyun 60, false, false, false);
723*4882a593Smuzhiyun if (mode) {
724*4882a593Smuzhiyun mode->type |= DRM_MODE_TYPE_PREFERRED;
725*4882a593Smuzhiyun drm_mode_probed_add(connector, mode);
726*4882a593Smuzhiyun ++num_modes;
727*4882a593Smuzhiyun }
728*4882a593Smuzhiyun vbox_set_edid(connector, preferred_width, preferred_height);
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun if (vbox_connector->vbox_crtc->x_hint != -1)
731*4882a593Smuzhiyun drm_object_property_set_value(&connector->base,
732*4882a593Smuzhiyun vbox->ddev.mode_config.suggested_x_property,
733*4882a593Smuzhiyun vbox_connector->vbox_crtc->x_hint);
734*4882a593Smuzhiyun else
735*4882a593Smuzhiyun drm_object_property_set_value(&connector->base,
736*4882a593Smuzhiyun vbox->ddev.mode_config.suggested_x_property, 0);
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun if (vbox_connector->vbox_crtc->y_hint != -1)
739*4882a593Smuzhiyun drm_object_property_set_value(&connector->base,
740*4882a593Smuzhiyun vbox->ddev.mode_config.suggested_y_property,
741*4882a593Smuzhiyun vbox_connector->vbox_crtc->y_hint);
742*4882a593Smuzhiyun else
743*4882a593Smuzhiyun drm_object_property_set_value(&connector->base,
744*4882a593Smuzhiyun vbox->ddev.mode_config.suggested_y_property, 0);
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun return num_modes;
747*4882a593Smuzhiyun }
748*4882a593Smuzhiyun
vbox_connector_destroy(struct drm_connector * connector)749*4882a593Smuzhiyun static void vbox_connector_destroy(struct drm_connector *connector)
750*4882a593Smuzhiyun {
751*4882a593Smuzhiyun drm_connector_unregister(connector);
752*4882a593Smuzhiyun drm_connector_cleanup(connector);
753*4882a593Smuzhiyun kfree(connector);
754*4882a593Smuzhiyun }
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun static enum drm_connector_status
vbox_connector_detect(struct drm_connector * connector,bool force)757*4882a593Smuzhiyun vbox_connector_detect(struct drm_connector *connector, bool force)
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun struct vbox_connector *vbox_connector;
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun vbox_connector = to_vbox_connector(connector);
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun return vbox_connector->mode_hint.disconnected ?
764*4882a593Smuzhiyun connector_status_disconnected : connector_status_connected;
765*4882a593Smuzhiyun }
766*4882a593Smuzhiyun
vbox_fill_modes(struct drm_connector * connector,u32 max_x,u32 max_y)767*4882a593Smuzhiyun static int vbox_fill_modes(struct drm_connector *connector, u32 max_x,
768*4882a593Smuzhiyun u32 max_y)
769*4882a593Smuzhiyun {
770*4882a593Smuzhiyun struct vbox_connector *vbox_connector;
771*4882a593Smuzhiyun struct drm_device *dev;
772*4882a593Smuzhiyun struct drm_display_mode *mode, *iterator;
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun vbox_connector = to_vbox_connector(connector);
775*4882a593Smuzhiyun dev = vbox_connector->base.dev;
776*4882a593Smuzhiyun list_for_each_entry_safe(mode, iterator, &connector->modes, head) {
777*4882a593Smuzhiyun list_del(&mode->head);
778*4882a593Smuzhiyun drm_mode_destroy(dev, mode);
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun return drm_helper_probe_single_connector_modes(connector, max_x, max_y);
782*4882a593Smuzhiyun }
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun static const struct drm_connector_helper_funcs vbox_connector_helper_funcs = {
785*4882a593Smuzhiyun .get_modes = vbox_get_modes,
786*4882a593Smuzhiyun };
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun static const struct drm_connector_funcs vbox_connector_funcs = {
789*4882a593Smuzhiyun .detect = vbox_connector_detect,
790*4882a593Smuzhiyun .fill_modes = vbox_fill_modes,
791*4882a593Smuzhiyun .destroy = vbox_connector_destroy,
792*4882a593Smuzhiyun .reset = drm_atomic_helper_connector_reset,
793*4882a593Smuzhiyun .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
794*4882a593Smuzhiyun .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
795*4882a593Smuzhiyun };
796*4882a593Smuzhiyun
vbox_connector_init(struct drm_device * dev,struct vbox_crtc * vbox_crtc,struct drm_encoder * encoder)797*4882a593Smuzhiyun static int vbox_connector_init(struct drm_device *dev,
798*4882a593Smuzhiyun struct vbox_crtc *vbox_crtc,
799*4882a593Smuzhiyun struct drm_encoder *encoder)
800*4882a593Smuzhiyun {
801*4882a593Smuzhiyun struct vbox_connector *vbox_connector;
802*4882a593Smuzhiyun struct drm_connector *connector;
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun vbox_connector = kzalloc(sizeof(*vbox_connector), GFP_KERNEL);
805*4882a593Smuzhiyun if (!vbox_connector)
806*4882a593Smuzhiyun return -ENOMEM;
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun connector = &vbox_connector->base;
809*4882a593Smuzhiyun vbox_connector->vbox_crtc = vbox_crtc;
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun drm_connector_init(dev, connector, &vbox_connector_funcs,
812*4882a593Smuzhiyun DRM_MODE_CONNECTOR_VGA);
813*4882a593Smuzhiyun drm_connector_helper_add(connector, &vbox_connector_helper_funcs);
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun connector->interlace_allowed = 0;
816*4882a593Smuzhiyun connector->doublescan_allowed = 0;
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun drm_mode_create_suggested_offset_properties(dev);
819*4882a593Smuzhiyun drm_object_attach_property(&connector->base,
820*4882a593Smuzhiyun dev->mode_config.suggested_x_property, 0);
821*4882a593Smuzhiyun drm_object_attach_property(&connector->base,
822*4882a593Smuzhiyun dev->mode_config.suggested_y_property, 0);
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun drm_connector_attach_encoder(connector, encoder);
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun return 0;
827*4882a593Smuzhiyun }
828*4882a593Smuzhiyun
829*4882a593Smuzhiyun static const struct drm_mode_config_funcs vbox_mode_funcs = {
830*4882a593Smuzhiyun .fb_create = drm_gem_fb_create_with_dirty,
831*4882a593Smuzhiyun .mode_valid = drm_vram_helper_mode_valid,
832*4882a593Smuzhiyun .atomic_check = drm_atomic_helper_check,
833*4882a593Smuzhiyun .atomic_commit = drm_atomic_helper_commit,
834*4882a593Smuzhiyun };
835*4882a593Smuzhiyun
vbox_mode_init(struct vbox_private * vbox)836*4882a593Smuzhiyun int vbox_mode_init(struct vbox_private *vbox)
837*4882a593Smuzhiyun {
838*4882a593Smuzhiyun struct drm_device *dev = &vbox->ddev;
839*4882a593Smuzhiyun struct drm_encoder *encoder;
840*4882a593Smuzhiyun struct vbox_crtc *vbox_crtc;
841*4882a593Smuzhiyun unsigned int i;
842*4882a593Smuzhiyun int ret;
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun drm_mode_config_init(dev);
845*4882a593Smuzhiyun
846*4882a593Smuzhiyun dev->mode_config.funcs = (void *)&vbox_mode_funcs;
847*4882a593Smuzhiyun dev->mode_config.min_width = 0;
848*4882a593Smuzhiyun dev->mode_config.min_height = 0;
849*4882a593Smuzhiyun dev->mode_config.preferred_depth = 24;
850*4882a593Smuzhiyun dev->mode_config.max_width = VBE_DISPI_MAX_XRES;
851*4882a593Smuzhiyun dev->mode_config.max_height = VBE_DISPI_MAX_YRES;
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun for (i = 0; i < vbox->num_crtcs; ++i) {
854*4882a593Smuzhiyun vbox_crtc = vbox_crtc_init(dev, i);
855*4882a593Smuzhiyun if (IS_ERR(vbox_crtc)) {
856*4882a593Smuzhiyun ret = PTR_ERR(vbox_crtc);
857*4882a593Smuzhiyun goto err_drm_mode_cleanup;
858*4882a593Smuzhiyun }
859*4882a593Smuzhiyun encoder = vbox_encoder_init(dev, i);
860*4882a593Smuzhiyun if (!encoder) {
861*4882a593Smuzhiyun ret = -ENOMEM;
862*4882a593Smuzhiyun goto err_drm_mode_cleanup;
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun ret = vbox_connector_init(dev, vbox_crtc, encoder);
865*4882a593Smuzhiyun if (ret)
866*4882a593Smuzhiyun goto err_drm_mode_cleanup;
867*4882a593Smuzhiyun }
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun drm_mode_config_reset(dev);
870*4882a593Smuzhiyun return 0;
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun err_drm_mode_cleanup:
873*4882a593Smuzhiyun drm_mode_config_cleanup(dev);
874*4882a593Smuzhiyun return ret;
875*4882a593Smuzhiyun }
876*4882a593Smuzhiyun
vbox_mode_fini(struct vbox_private * vbox)877*4882a593Smuzhiyun void vbox_mode_fini(struct vbox_private *vbox)
878*4882a593Smuzhiyun {
879*4882a593Smuzhiyun drm_mode_config_cleanup(&vbox->ddev);
880*4882a593Smuzhiyun }
881