xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/udl/udl_drv.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2012 Red Hat
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * based in parts on udlfb.c:
6*4882a593Smuzhiyun  * Copyright (C) 2009 Roberto De Ioris <roberto@unbit.it>
7*4882a593Smuzhiyun  * Copyright (C) 2009 Jaya Kumar <jayakumar.lkml@gmail.com>
8*4882a593Smuzhiyun  * Copyright (C) 2009 Bernie Thompson <bernie@plugable.com>
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef UDL_DRV_H
12*4882a593Smuzhiyun #define UDL_DRV_H
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/mm_types.h>
15*4882a593Smuzhiyun #include <linux/usb.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <drm/drm_device.h>
18*4882a593Smuzhiyun #include <drm/drm_framebuffer.h>
19*4882a593Smuzhiyun #include <drm/drm_gem.h>
20*4882a593Smuzhiyun #include <drm/drm_simple_kms_helper.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun struct drm_mode_create_dumb;
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define DRIVER_NAME		"udl"
25*4882a593Smuzhiyun #define DRIVER_DESC		"DisplayLink"
26*4882a593Smuzhiyun #define DRIVER_DATE		"20120220"
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define DRIVER_MAJOR		0
29*4882a593Smuzhiyun #define DRIVER_MINOR		0
30*4882a593Smuzhiyun #define DRIVER_PATCHLEVEL	1
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun struct udl_device;
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun struct urb_node {
35*4882a593Smuzhiyun 	struct list_head entry;
36*4882a593Smuzhiyun 	struct udl_device *dev;
37*4882a593Smuzhiyun 	struct delayed_work release_urb_work;
38*4882a593Smuzhiyun 	struct urb *urb;
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun struct urb_list {
42*4882a593Smuzhiyun 	struct list_head list;
43*4882a593Smuzhiyun 	spinlock_t lock;
44*4882a593Smuzhiyun 	struct semaphore limit_sem;
45*4882a593Smuzhiyun 	int available;
46*4882a593Smuzhiyun 	int count;
47*4882a593Smuzhiyun 	size_t size;
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun struct udl_device {
51*4882a593Smuzhiyun 	struct drm_device drm;
52*4882a593Smuzhiyun 	struct device *dev;
53*4882a593Smuzhiyun 	struct device *dmadev;
54*4882a593Smuzhiyun 	struct usb_device *udev;
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	struct drm_simple_display_pipe display_pipe;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	struct mutex gem_lock;
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	int sku_pixel_limit;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	struct urb_list urbs;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	char mode_buf[1024];
65*4882a593Smuzhiyun 	uint32_t mode_buf_len;
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun #define to_udl(x) container_of(x, struct udl_device, drm)
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun /* modeset */
71*4882a593Smuzhiyun int udl_modeset_init(struct drm_device *dev);
72*4882a593Smuzhiyun struct drm_connector *udl_connector_init(struct drm_device *dev);
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun struct urb *udl_get_urb(struct drm_device *dev);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun int udl_submit_urb(struct drm_device *dev, struct urb *urb, size_t len);
77*4882a593Smuzhiyun void udl_urb_completion(struct urb *urb);
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun int udl_init(struct udl_device *udl);
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun int udl_render_hline(struct drm_device *dev, int log_bpp, struct urb **urb_ptr,
82*4882a593Smuzhiyun 		     const char *front, char **urb_buf_ptr,
83*4882a593Smuzhiyun 		     u32 byte_offset, u32 device_byte_offset, u32 byte_width);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun int udl_drop_usb(struct drm_device *dev);
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun #define CMD_WRITE_RAW8   "\xAF\x60" /**< 8 bit raw write command. */
88*4882a593Smuzhiyun #define CMD_WRITE_RL8    "\xAF\x61" /**< 8 bit run length command. */
89*4882a593Smuzhiyun #define CMD_WRITE_COPY8  "\xAF\x62" /**< 8 bit copy command. */
90*4882a593Smuzhiyun #define CMD_WRITE_RLX8   "\xAF\x63" /**< 8 bit extended run length command. */
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun #define CMD_WRITE_RAW16  "\xAF\x68" /**< 16 bit raw write command. */
93*4882a593Smuzhiyun #define CMD_WRITE_RL16   "\xAF\x69" /**< 16 bit run length command. */
94*4882a593Smuzhiyun #define CMD_WRITE_COPY16 "\xAF\x6A" /**< 16 bit copy command. */
95*4882a593Smuzhiyun #define CMD_WRITE_RLX16  "\xAF\x6B" /**< 16 bit extended run length command. */
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun /* On/Off for driving the DisplayLink framebuffer to the display */
98*4882a593Smuzhiyun #define UDL_REG_BLANK_MODE		0x1f
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun #define UDL_BLANK_MODE_ON		0x00 /* hsync and vsync on, visible */
101*4882a593Smuzhiyun #define UDL_BLANK_MODE_BLANKED		0x01 /* hsync and vsync on, blanked */
102*4882a593Smuzhiyun #define UDL_BLANK_MODE_VSYNC_OFF	0x03 /* vsync off, blanked */
103*4882a593Smuzhiyun #define UDL_BLANK_MODE_HSYNC_OFF	0x05 /* hsync off, blanked */
104*4882a593Smuzhiyun #define UDL_BLANK_MODE_POWERDOWN	0x07 /* powered off; requires modeset */
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun #endif
107