1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * DRM driver for Sitronix ST7586 panels
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2017 David Lechner <david@lechnology.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/delay.h>
9*4882a593Smuzhiyun #include <linux/dma-buf.h>
10*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/property.h>
13*4882a593Smuzhiyun #include <linux/spi/spi.h>
14*4882a593Smuzhiyun #include <video/mipi_display.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <drm/drm_atomic_helper.h>
17*4882a593Smuzhiyun #include <drm/drm_damage_helper.h>
18*4882a593Smuzhiyun #include <drm/drm_drv.h>
19*4882a593Smuzhiyun #include <drm/drm_fb_cma_helper.h>
20*4882a593Smuzhiyun #include <drm/drm_fb_helper.h>
21*4882a593Smuzhiyun #include <drm/drm_format_helper.h>
22*4882a593Smuzhiyun #include <drm/drm_gem_cma_helper.h>
23*4882a593Smuzhiyun #include <drm/drm_gem_framebuffer_helper.h>
24*4882a593Smuzhiyun #include <drm/drm_managed.h>
25*4882a593Smuzhiyun #include <drm/drm_mipi_dbi.h>
26*4882a593Smuzhiyun #include <drm/drm_rect.h>
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /* controller-specific commands */
29*4882a593Smuzhiyun #define ST7586_DISP_MODE_GRAY 0x38
30*4882a593Smuzhiyun #define ST7586_DISP_MODE_MONO 0x39
31*4882a593Smuzhiyun #define ST7586_ENABLE_DDRAM 0x3a
32*4882a593Smuzhiyun #define ST7586_SET_DISP_DUTY 0xb0
33*4882a593Smuzhiyun #define ST7586_SET_PART_DISP 0xb4
34*4882a593Smuzhiyun #define ST7586_SET_NLINE_INV 0xb5
35*4882a593Smuzhiyun #define ST7586_SET_VOP 0xc0
36*4882a593Smuzhiyun #define ST7586_SET_BIAS_SYSTEM 0xc3
37*4882a593Smuzhiyun #define ST7586_SET_BOOST_LEVEL 0xc4
38*4882a593Smuzhiyun #define ST7586_SET_VOP_OFFSET 0xc7
39*4882a593Smuzhiyun #define ST7586_ENABLE_ANALOG 0xd0
40*4882a593Smuzhiyun #define ST7586_AUTO_READ_CTRL 0xd7
41*4882a593Smuzhiyun #define ST7586_OTP_RW_CTRL 0xe0
42*4882a593Smuzhiyun #define ST7586_OTP_CTRL_OUT 0xe1
43*4882a593Smuzhiyun #define ST7586_OTP_READ 0xe3
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #define ST7586_DISP_CTRL_MX BIT(6)
46*4882a593Smuzhiyun #define ST7586_DISP_CTRL_MY BIT(7)
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun /*
49*4882a593Smuzhiyun * The ST7586 controller has an unusual pixel format where 2bpp grayscale is
50*4882a593Smuzhiyun * packed 3 pixels per byte with the first two pixels using 3 bits and the 3rd
51*4882a593Smuzhiyun * pixel using only 2 bits.
52*4882a593Smuzhiyun *
53*4882a593Smuzhiyun * | D7 | D6 | D5 || | || 2bpp |
54*4882a593Smuzhiyun * | (D4) | (D3) | (D2) || D1 | D0 || GRAY |
55*4882a593Smuzhiyun * +------+------+------++------+------++------+
56*4882a593Smuzhiyun * | 1 | 1 | 1 || 1 | 1 || 0 0 | black
57*4882a593Smuzhiyun * | 1 | 0 | 0 || 1 | 0 || 0 1 | dark gray
58*4882a593Smuzhiyun * | 0 | 1 | 0 || 0 | 1 || 1 0 | light gray
59*4882a593Smuzhiyun * | 0 | 0 | 0 || 0 | 0 || 1 1 | white
60*4882a593Smuzhiyun */
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun static const u8 st7586_lookup[] = { 0x7, 0x4, 0x2, 0x0 };
63*4882a593Smuzhiyun
st7586_xrgb8888_to_gray332(u8 * dst,void * vaddr,struct drm_framebuffer * fb,struct drm_rect * clip)64*4882a593Smuzhiyun static void st7586_xrgb8888_to_gray332(u8 *dst, void *vaddr,
65*4882a593Smuzhiyun struct drm_framebuffer *fb,
66*4882a593Smuzhiyun struct drm_rect *clip)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun size_t len = (clip->x2 - clip->x1) * (clip->y2 - clip->y1);
69*4882a593Smuzhiyun unsigned int x, y;
70*4882a593Smuzhiyun u8 *src, *buf, val;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun buf = kmalloc(len, GFP_KERNEL);
73*4882a593Smuzhiyun if (!buf)
74*4882a593Smuzhiyun return;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun drm_fb_xrgb8888_to_gray8(buf, vaddr, fb, clip);
77*4882a593Smuzhiyun src = buf;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun for (y = clip->y1; y < clip->y2; y++) {
80*4882a593Smuzhiyun for (x = clip->x1; x < clip->x2; x += 3) {
81*4882a593Smuzhiyun val = st7586_lookup[*src++ >> 6] << 5;
82*4882a593Smuzhiyun val |= st7586_lookup[*src++ >> 6] << 2;
83*4882a593Smuzhiyun val |= st7586_lookup[*src++ >> 6] >> 1;
84*4882a593Smuzhiyun *dst++ = val;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun kfree(buf);
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
st7586_buf_copy(void * dst,struct drm_framebuffer * fb,struct drm_rect * clip)91*4882a593Smuzhiyun static int st7586_buf_copy(void *dst, struct drm_framebuffer *fb,
92*4882a593Smuzhiyun struct drm_rect *clip)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun struct drm_gem_cma_object *cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
95*4882a593Smuzhiyun struct dma_buf_attachment *import_attach = cma_obj->base.import_attach;
96*4882a593Smuzhiyun void *src = cma_obj->vaddr;
97*4882a593Smuzhiyun int ret = 0;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun if (import_attach) {
100*4882a593Smuzhiyun ret = dma_buf_begin_cpu_access(import_attach->dmabuf,
101*4882a593Smuzhiyun DMA_FROM_DEVICE);
102*4882a593Smuzhiyun if (ret)
103*4882a593Smuzhiyun return ret;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun st7586_xrgb8888_to_gray332(dst, src, fb, clip);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun if (import_attach)
109*4882a593Smuzhiyun ret = dma_buf_end_cpu_access(import_attach->dmabuf,
110*4882a593Smuzhiyun DMA_FROM_DEVICE);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun return ret;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
st7586_fb_dirty(struct drm_framebuffer * fb,struct drm_rect * rect)115*4882a593Smuzhiyun static void st7586_fb_dirty(struct drm_framebuffer *fb, struct drm_rect *rect)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(fb->dev);
118*4882a593Smuzhiyun struct mipi_dbi *dbi = &dbidev->dbi;
119*4882a593Smuzhiyun int start, end, idx, ret = 0;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun if (!drm_dev_enter(fb->dev, &idx))
122*4882a593Smuzhiyun return;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /* 3 pixels per byte, so grow clip to nearest multiple of 3 */
125*4882a593Smuzhiyun rect->x1 = rounddown(rect->x1, 3);
126*4882a593Smuzhiyun rect->x2 = roundup(rect->x2, 3);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun DRM_DEBUG_KMS("Flushing [FB:%d] " DRM_RECT_FMT "\n", fb->base.id, DRM_RECT_ARG(rect));
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun ret = st7586_buf_copy(dbidev->tx_buf, fb, rect);
131*4882a593Smuzhiyun if (ret)
132*4882a593Smuzhiyun goto err_msg;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun /* Pixels are packed 3 per byte */
135*4882a593Smuzhiyun start = rect->x1 / 3;
136*4882a593Smuzhiyun end = rect->x2 / 3;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun mipi_dbi_command(dbi, MIPI_DCS_SET_COLUMN_ADDRESS,
139*4882a593Smuzhiyun (start >> 8) & 0xFF, start & 0xFF,
140*4882a593Smuzhiyun (end >> 8) & 0xFF, (end - 1) & 0xFF);
141*4882a593Smuzhiyun mipi_dbi_command(dbi, MIPI_DCS_SET_PAGE_ADDRESS,
142*4882a593Smuzhiyun (rect->y1 >> 8) & 0xFF, rect->y1 & 0xFF,
143*4882a593Smuzhiyun (rect->y2 >> 8) & 0xFF, (rect->y2 - 1) & 0xFF);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun ret = mipi_dbi_command_buf(dbi, MIPI_DCS_WRITE_MEMORY_START,
146*4882a593Smuzhiyun (u8 *)dbidev->tx_buf,
147*4882a593Smuzhiyun (end - start) * (rect->y2 - rect->y1));
148*4882a593Smuzhiyun err_msg:
149*4882a593Smuzhiyun if (ret)
150*4882a593Smuzhiyun dev_err_once(fb->dev->dev, "Failed to update display %d\n", ret);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun drm_dev_exit(idx);
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
st7586_pipe_update(struct drm_simple_display_pipe * pipe,struct drm_plane_state * old_state)155*4882a593Smuzhiyun static void st7586_pipe_update(struct drm_simple_display_pipe *pipe,
156*4882a593Smuzhiyun struct drm_plane_state *old_state)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun struct drm_plane_state *state = pipe->plane.state;
159*4882a593Smuzhiyun struct drm_rect rect;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun if (!pipe->crtc.state->active)
162*4882a593Smuzhiyun return;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun if (drm_atomic_helper_damage_merged(old_state, state, &rect))
165*4882a593Smuzhiyun st7586_fb_dirty(state->fb, &rect);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
st7586_pipe_enable(struct drm_simple_display_pipe * pipe,struct drm_crtc_state * crtc_state,struct drm_plane_state * plane_state)168*4882a593Smuzhiyun static void st7586_pipe_enable(struct drm_simple_display_pipe *pipe,
169*4882a593Smuzhiyun struct drm_crtc_state *crtc_state,
170*4882a593Smuzhiyun struct drm_plane_state *plane_state)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
173*4882a593Smuzhiyun struct drm_framebuffer *fb = plane_state->fb;
174*4882a593Smuzhiyun struct mipi_dbi *dbi = &dbidev->dbi;
175*4882a593Smuzhiyun struct drm_rect rect = {
176*4882a593Smuzhiyun .x1 = 0,
177*4882a593Smuzhiyun .x2 = fb->width,
178*4882a593Smuzhiyun .y1 = 0,
179*4882a593Smuzhiyun .y2 = fb->height,
180*4882a593Smuzhiyun };
181*4882a593Smuzhiyun int idx, ret;
182*4882a593Smuzhiyun u8 addr_mode;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun if (!drm_dev_enter(pipe->crtc.dev, &idx))
185*4882a593Smuzhiyun return;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun DRM_DEBUG_KMS("\n");
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun ret = mipi_dbi_poweron_reset(dbidev);
190*4882a593Smuzhiyun if (ret)
191*4882a593Smuzhiyun goto out_exit;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_AUTO_READ_CTRL, 0x9f);
194*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_OTP_RW_CTRL, 0x00);
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun msleep(10);
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_OTP_READ);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun msleep(20);
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_OTP_CTRL_OUT);
203*4882a593Smuzhiyun mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
204*4882a593Smuzhiyun mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun msleep(50);
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_SET_VOP_OFFSET, 0x00);
209*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_SET_VOP, 0xe3, 0x00);
210*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_SET_BIAS_SYSTEM, 0x02);
211*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_SET_BOOST_LEVEL, 0x04);
212*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_ENABLE_ANALOG, 0x1d);
213*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_SET_NLINE_INV, 0x00);
214*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_DISP_MODE_GRAY);
215*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_ENABLE_DDRAM, 0x02);
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun switch (dbidev->rotation) {
218*4882a593Smuzhiyun default:
219*4882a593Smuzhiyun addr_mode = 0x00;
220*4882a593Smuzhiyun break;
221*4882a593Smuzhiyun case 90:
222*4882a593Smuzhiyun addr_mode = ST7586_DISP_CTRL_MY;
223*4882a593Smuzhiyun break;
224*4882a593Smuzhiyun case 180:
225*4882a593Smuzhiyun addr_mode = ST7586_DISP_CTRL_MX | ST7586_DISP_CTRL_MY;
226*4882a593Smuzhiyun break;
227*4882a593Smuzhiyun case 270:
228*4882a593Smuzhiyun addr_mode = ST7586_DISP_CTRL_MX;
229*4882a593Smuzhiyun break;
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_SET_DISP_DUTY, 0x7f);
234*4882a593Smuzhiyun mipi_dbi_command(dbi, ST7586_SET_PART_DISP, 0xa0);
235*4882a593Smuzhiyun mipi_dbi_command(dbi, MIPI_DCS_SET_PARTIAL_ROWS, 0x00, 0x00, 0x00, 0x77);
236*4882a593Smuzhiyun mipi_dbi_command(dbi, MIPI_DCS_EXIT_INVERT_MODE);
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun msleep(100);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun st7586_fb_dirty(fb, &rect);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
243*4882a593Smuzhiyun out_exit:
244*4882a593Smuzhiyun drm_dev_exit(idx);
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
st7586_pipe_disable(struct drm_simple_display_pipe * pipe)247*4882a593Smuzhiyun static void st7586_pipe_disable(struct drm_simple_display_pipe *pipe)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun /*
252*4882a593Smuzhiyun * This callback is not protected by drm_dev_enter/exit since we want to
253*4882a593Smuzhiyun * turn off the display on regular driver unload. It's highly unlikely
254*4882a593Smuzhiyun * that the underlying SPI controller is gone should this be called after
255*4882a593Smuzhiyun * unplug.
256*4882a593Smuzhiyun */
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun DRM_DEBUG_KMS("\n");
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun mipi_dbi_command(&dbidev->dbi, MIPI_DCS_SET_DISPLAY_OFF);
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun static const u32 st7586_formats[] = {
264*4882a593Smuzhiyun DRM_FORMAT_XRGB8888,
265*4882a593Smuzhiyun };
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun static const struct drm_simple_display_pipe_funcs st7586_pipe_funcs = {
268*4882a593Smuzhiyun .enable = st7586_pipe_enable,
269*4882a593Smuzhiyun .disable = st7586_pipe_disable,
270*4882a593Smuzhiyun .update = st7586_pipe_update,
271*4882a593Smuzhiyun .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb,
272*4882a593Smuzhiyun };
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun static const struct drm_display_mode st7586_mode = {
275*4882a593Smuzhiyun DRM_SIMPLE_MODE(178, 128, 37, 27),
276*4882a593Smuzhiyun };
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun DEFINE_DRM_GEM_CMA_FOPS(st7586_fops);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun static struct drm_driver st7586_driver = {
281*4882a593Smuzhiyun .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
282*4882a593Smuzhiyun .fops = &st7586_fops,
283*4882a593Smuzhiyun DRM_GEM_CMA_DRIVER_OPS_VMAP,
284*4882a593Smuzhiyun .debugfs_init = mipi_dbi_debugfs_init,
285*4882a593Smuzhiyun .name = "st7586",
286*4882a593Smuzhiyun .desc = "Sitronix ST7586",
287*4882a593Smuzhiyun .date = "20170801",
288*4882a593Smuzhiyun .major = 1,
289*4882a593Smuzhiyun .minor = 0,
290*4882a593Smuzhiyun };
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun static const struct of_device_id st7586_of_match[] = {
293*4882a593Smuzhiyun { .compatible = "lego,ev3-lcd" },
294*4882a593Smuzhiyun {},
295*4882a593Smuzhiyun };
296*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, st7586_of_match);
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun static const struct spi_device_id st7586_id[] = {
299*4882a593Smuzhiyun { "ev3-lcd", 0 },
300*4882a593Smuzhiyun { },
301*4882a593Smuzhiyun };
302*4882a593Smuzhiyun MODULE_DEVICE_TABLE(spi, st7586_id);
303*4882a593Smuzhiyun
st7586_probe(struct spi_device * spi)304*4882a593Smuzhiyun static int st7586_probe(struct spi_device *spi)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun struct device *dev = &spi->dev;
307*4882a593Smuzhiyun struct mipi_dbi_dev *dbidev;
308*4882a593Smuzhiyun struct drm_device *drm;
309*4882a593Smuzhiyun struct mipi_dbi *dbi;
310*4882a593Smuzhiyun struct gpio_desc *a0;
311*4882a593Smuzhiyun u32 rotation = 0;
312*4882a593Smuzhiyun size_t bufsize;
313*4882a593Smuzhiyun int ret;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun dbidev = devm_drm_dev_alloc(dev, &st7586_driver,
316*4882a593Smuzhiyun struct mipi_dbi_dev, drm);
317*4882a593Smuzhiyun if (IS_ERR(dbidev))
318*4882a593Smuzhiyun return PTR_ERR(dbidev);
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun dbi = &dbidev->dbi;
321*4882a593Smuzhiyun drm = &dbidev->drm;
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun bufsize = (st7586_mode.vdisplay + 2) / 3 * st7586_mode.hdisplay;
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
326*4882a593Smuzhiyun if (IS_ERR(dbi->reset)) {
327*4882a593Smuzhiyun DRM_DEV_ERROR(dev, "Failed to get gpio 'reset'\n");
328*4882a593Smuzhiyun return PTR_ERR(dbi->reset);
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun a0 = devm_gpiod_get(dev, "a0", GPIOD_OUT_LOW);
332*4882a593Smuzhiyun if (IS_ERR(a0)) {
333*4882a593Smuzhiyun DRM_DEV_ERROR(dev, "Failed to get gpio 'a0'\n");
334*4882a593Smuzhiyun return PTR_ERR(a0);
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun device_property_read_u32(dev, "rotation", &rotation);
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun ret = mipi_dbi_spi_init(spi, dbi, a0);
340*4882a593Smuzhiyun if (ret)
341*4882a593Smuzhiyun return ret;
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun /* Cannot read from this controller via SPI */
344*4882a593Smuzhiyun dbi->read_commands = NULL;
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun ret = mipi_dbi_dev_init_with_formats(dbidev, &st7586_pipe_funcs,
347*4882a593Smuzhiyun st7586_formats, ARRAY_SIZE(st7586_formats),
348*4882a593Smuzhiyun &st7586_mode, rotation, bufsize);
349*4882a593Smuzhiyun if (ret)
350*4882a593Smuzhiyun return ret;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun /*
353*4882a593Smuzhiyun * we are using 8-bit data, so we are not actually swapping anything,
354*4882a593Smuzhiyun * but setting mipi->swap_bytes makes mipi_dbi_typec3_command() do the
355*4882a593Smuzhiyun * right thing and not use 16-bit transfers (which results in swapped
356*4882a593Smuzhiyun * bytes on little-endian systems and causes out of order data to be
357*4882a593Smuzhiyun * sent to the display).
358*4882a593Smuzhiyun */
359*4882a593Smuzhiyun dbi->swap_bytes = true;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun drm_mode_config_reset(drm);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun ret = drm_dev_register(drm, 0);
364*4882a593Smuzhiyun if (ret)
365*4882a593Smuzhiyun return ret;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun spi_set_drvdata(spi, drm);
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun drm_fbdev_generic_setup(drm, 0);
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun return 0;
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun
st7586_remove(struct spi_device * spi)374*4882a593Smuzhiyun static int st7586_remove(struct spi_device *spi)
375*4882a593Smuzhiyun {
376*4882a593Smuzhiyun struct drm_device *drm = spi_get_drvdata(spi);
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun drm_dev_unplug(drm);
379*4882a593Smuzhiyun drm_atomic_helper_shutdown(drm);
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun return 0;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun
st7586_shutdown(struct spi_device * spi)384*4882a593Smuzhiyun static void st7586_shutdown(struct spi_device *spi)
385*4882a593Smuzhiyun {
386*4882a593Smuzhiyun drm_atomic_helper_shutdown(spi_get_drvdata(spi));
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun static struct spi_driver st7586_spi_driver = {
390*4882a593Smuzhiyun .driver = {
391*4882a593Smuzhiyun .name = "st7586",
392*4882a593Smuzhiyun .owner = THIS_MODULE,
393*4882a593Smuzhiyun .of_match_table = st7586_of_match,
394*4882a593Smuzhiyun },
395*4882a593Smuzhiyun .id_table = st7586_id,
396*4882a593Smuzhiyun .probe = st7586_probe,
397*4882a593Smuzhiyun .remove = st7586_remove,
398*4882a593Smuzhiyun .shutdown = st7586_shutdown,
399*4882a593Smuzhiyun };
400*4882a593Smuzhiyun module_spi_driver(st7586_spi_driver);
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun MODULE_DESCRIPTION("Sitronix ST7586 DRM driver");
403*4882a593Smuzhiyun MODULE_AUTHOR("David Lechner <david@lechnology.com>");
404*4882a593Smuzhiyun MODULE_LICENSE("GPL");
405