1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * DRM driver for Ilitek ILI9225 panels
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2017 David Lechner <david@lechnology.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Some code copied from mipi-dbi.c
8*4882a593Smuzhiyun * Copyright 2016 Noralf Trønnes
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/dma-buf.h>
13*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/property.h>
16*4882a593Smuzhiyun #include <linux/spi/spi.h>
17*4882a593Smuzhiyun #include <video/mipi_display.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <drm/drm_atomic_helper.h>
20*4882a593Smuzhiyun #include <drm/drm_damage_helper.h>
21*4882a593Smuzhiyun #include <drm/drm_drv.h>
22*4882a593Smuzhiyun #include <drm/drm_fb_cma_helper.h>
23*4882a593Smuzhiyun #include <drm/drm_fb_helper.h>
24*4882a593Smuzhiyun #include <drm/drm_fourcc.h>
25*4882a593Smuzhiyun #include <drm/drm_gem_cma_helper.h>
26*4882a593Smuzhiyun #include <drm/drm_gem_framebuffer_helper.h>
27*4882a593Smuzhiyun #include <drm/drm_managed.h>
28*4882a593Smuzhiyun #include <drm/drm_mipi_dbi.h>
29*4882a593Smuzhiyun #include <drm/drm_rect.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define ILI9225_DRIVER_READ_CODE 0x00
32*4882a593Smuzhiyun #define ILI9225_DRIVER_OUTPUT_CONTROL 0x01
33*4882a593Smuzhiyun #define ILI9225_LCD_AC_DRIVING_CONTROL 0x02
34*4882a593Smuzhiyun #define ILI9225_ENTRY_MODE 0x03
35*4882a593Smuzhiyun #define ILI9225_DISPLAY_CONTROL_1 0x07
36*4882a593Smuzhiyun #define ILI9225_BLANK_PERIOD_CONTROL_1 0x08
37*4882a593Smuzhiyun #define ILI9225_FRAME_CYCLE_CONTROL 0x0b
38*4882a593Smuzhiyun #define ILI9225_INTERFACE_CONTROL 0x0c
39*4882a593Smuzhiyun #define ILI9225_OSCILLATION_CONTROL 0x0f
40*4882a593Smuzhiyun #define ILI9225_POWER_CONTROL_1 0x10
41*4882a593Smuzhiyun #define ILI9225_POWER_CONTROL_2 0x11
42*4882a593Smuzhiyun #define ILI9225_POWER_CONTROL_3 0x12
43*4882a593Smuzhiyun #define ILI9225_POWER_CONTROL_4 0x13
44*4882a593Smuzhiyun #define ILI9225_POWER_CONTROL_5 0x14
45*4882a593Smuzhiyun #define ILI9225_VCI_RECYCLING 0x15
46*4882a593Smuzhiyun #define ILI9225_RAM_ADDRESS_SET_1 0x20
47*4882a593Smuzhiyun #define ILI9225_RAM_ADDRESS_SET_2 0x21
48*4882a593Smuzhiyun #define ILI9225_WRITE_DATA_TO_GRAM 0x22
49*4882a593Smuzhiyun #define ILI9225_SOFTWARE_RESET 0x28
50*4882a593Smuzhiyun #define ILI9225_GATE_SCAN_CONTROL 0x30
51*4882a593Smuzhiyun #define ILI9225_VERTICAL_SCROLL_1 0x31
52*4882a593Smuzhiyun #define ILI9225_VERTICAL_SCROLL_2 0x32
53*4882a593Smuzhiyun #define ILI9225_VERTICAL_SCROLL_3 0x33
54*4882a593Smuzhiyun #define ILI9225_PARTIAL_DRIVING_POS_1 0x34
55*4882a593Smuzhiyun #define ILI9225_PARTIAL_DRIVING_POS_2 0x35
56*4882a593Smuzhiyun #define ILI9225_HORIZ_WINDOW_ADDR_1 0x36
57*4882a593Smuzhiyun #define ILI9225_HORIZ_WINDOW_ADDR_2 0x37
58*4882a593Smuzhiyun #define ILI9225_VERT_WINDOW_ADDR_1 0x38
59*4882a593Smuzhiyun #define ILI9225_VERT_WINDOW_ADDR_2 0x39
60*4882a593Smuzhiyun #define ILI9225_GAMMA_CONTROL_1 0x50
61*4882a593Smuzhiyun #define ILI9225_GAMMA_CONTROL_2 0x51
62*4882a593Smuzhiyun #define ILI9225_GAMMA_CONTROL_3 0x52
63*4882a593Smuzhiyun #define ILI9225_GAMMA_CONTROL_4 0x53
64*4882a593Smuzhiyun #define ILI9225_GAMMA_CONTROL_5 0x54
65*4882a593Smuzhiyun #define ILI9225_GAMMA_CONTROL_6 0x55
66*4882a593Smuzhiyun #define ILI9225_GAMMA_CONTROL_7 0x56
67*4882a593Smuzhiyun #define ILI9225_GAMMA_CONTROL_8 0x57
68*4882a593Smuzhiyun #define ILI9225_GAMMA_CONTROL_9 0x58
69*4882a593Smuzhiyun #define ILI9225_GAMMA_CONTROL_10 0x59
70*4882a593Smuzhiyun
ili9225_command(struct mipi_dbi * dbi,u8 cmd,u16 data)71*4882a593Smuzhiyun static inline int ili9225_command(struct mipi_dbi *dbi, u8 cmd, u16 data)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun u8 par[2] = { data >> 8, data & 0xff };
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun return mipi_dbi_command_buf(dbi, cmd, par, 2);
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
ili9225_fb_dirty(struct drm_framebuffer * fb,struct drm_rect * rect)78*4882a593Smuzhiyun static void ili9225_fb_dirty(struct drm_framebuffer *fb, struct drm_rect *rect)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct drm_gem_cma_object *cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
81*4882a593Smuzhiyun struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(fb->dev);
82*4882a593Smuzhiyun unsigned int height = rect->y2 - rect->y1;
83*4882a593Smuzhiyun unsigned int width = rect->x2 - rect->x1;
84*4882a593Smuzhiyun struct mipi_dbi *dbi = &dbidev->dbi;
85*4882a593Smuzhiyun bool swap = dbi->swap_bytes;
86*4882a593Smuzhiyun u16 x_start, y_start;
87*4882a593Smuzhiyun u16 x1, x2, y1, y2;
88*4882a593Smuzhiyun int idx, ret = 0;
89*4882a593Smuzhiyun bool full;
90*4882a593Smuzhiyun void *tr;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun if (!drm_dev_enter(fb->dev, &idx))
93*4882a593Smuzhiyun return;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun full = width == fb->width && height == fb->height;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun DRM_DEBUG_KMS("Flushing [FB:%d] " DRM_RECT_FMT "\n", fb->base.id, DRM_RECT_ARG(rect));
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun if (!dbi->dc || !full || swap ||
100*4882a593Smuzhiyun fb->format->format == DRM_FORMAT_XRGB8888) {
101*4882a593Smuzhiyun tr = dbidev->tx_buf;
102*4882a593Smuzhiyun ret = mipi_dbi_buf_copy(dbidev->tx_buf, fb, rect, swap);
103*4882a593Smuzhiyun if (ret)
104*4882a593Smuzhiyun goto err_msg;
105*4882a593Smuzhiyun } else {
106*4882a593Smuzhiyun tr = cma_obj->vaddr;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun switch (dbidev->rotation) {
110*4882a593Smuzhiyun default:
111*4882a593Smuzhiyun x1 = rect->x1;
112*4882a593Smuzhiyun x2 = rect->x2 - 1;
113*4882a593Smuzhiyun y1 = rect->y1;
114*4882a593Smuzhiyun y2 = rect->y2 - 1;
115*4882a593Smuzhiyun x_start = x1;
116*4882a593Smuzhiyun y_start = y1;
117*4882a593Smuzhiyun break;
118*4882a593Smuzhiyun case 90:
119*4882a593Smuzhiyun x1 = rect->y1;
120*4882a593Smuzhiyun x2 = rect->y2 - 1;
121*4882a593Smuzhiyun y1 = fb->width - rect->x2;
122*4882a593Smuzhiyun y2 = fb->width - rect->x1 - 1;
123*4882a593Smuzhiyun x_start = x1;
124*4882a593Smuzhiyun y_start = y2;
125*4882a593Smuzhiyun break;
126*4882a593Smuzhiyun case 180:
127*4882a593Smuzhiyun x1 = fb->width - rect->x2;
128*4882a593Smuzhiyun x2 = fb->width - rect->x1 - 1;
129*4882a593Smuzhiyun y1 = fb->height - rect->y2;
130*4882a593Smuzhiyun y2 = fb->height - rect->y1 - 1;
131*4882a593Smuzhiyun x_start = x2;
132*4882a593Smuzhiyun y_start = y2;
133*4882a593Smuzhiyun break;
134*4882a593Smuzhiyun case 270:
135*4882a593Smuzhiyun x1 = fb->height - rect->y2;
136*4882a593Smuzhiyun x2 = fb->height - rect->y1 - 1;
137*4882a593Smuzhiyun y1 = rect->x1;
138*4882a593Smuzhiyun y2 = rect->x2 - 1;
139*4882a593Smuzhiyun x_start = x2;
140*4882a593Smuzhiyun y_start = y1;
141*4882a593Smuzhiyun break;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_HORIZ_WINDOW_ADDR_1, x2);
145*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_HORIZ_WINDOW_ADDR_2, x1);
146*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_VERT_WINDOW_ADDR_1, y2);
147*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_VERT_WINDOW_ADDR_2, y1);
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_RAM_ADDRESS_SET_1, x_start);
150*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_RAM_ADDRESS_SET_2, y_start);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun ret = mipi_dbi_command_buf(dbi, ILI9225_WRITE_DATA_TO_GRAM, tr,
153*4882a593Smuzhiyun width * height * 2);
154*4882a593Smuzhiyun err_msg:
155*4882a593Smuzhiyun if (ret)
156*4882a593Smuzhiyun dev_err_once(fb->dev->dev, "Failed to update display %d\n", ret);
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun drm_dev_exit(idx);
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
ili9225_pipe_update(struct drm_simple_display_pipe * pipe,struct drm_plane_state * old_state)161*4882a593Smuzhiyun static void ili9225_pipe_update(struct drm_simple_display_pipe *pipe,
162*4882a593Smuzhiyun struct drm_plane_state *old_state)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun struct drm_plane_state *state = pipe->plane.state;
165*4882a593Smuzhiyun struct drm_rect rect;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun if (!pipe->crtc.state->active)
168*4882a593Smuzhiyun return;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun if (drm_atomic_helper_damage_merged(old_state, state, &rect))
171*4882a593Smuzhiyun ili9225_fb_dirty(state->fb, &rect);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
ili9225_pipe_enable(struct drm_simple_display_pipe * pipe,struct drm_crtc_state * crtc_state,struct drm_plane_state * plane_state)174*4882a593Smuzhiyun static void ili9225_pipe_enable(struct drm_simple_display_pipe *pipe,
175*4882a593Smuzhiyun struct drm_crtc_state *crtc_state,
176*4882a593Smuzhiyun struct drm_plane_state *plane_state)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
179*4882a593Smuzhiyun struct drm_framebuffer *fb = plane_state->fb;
180*4882a593Smuzhiyun struct device *dev = pipe->crtc.dev->dev;
181*4882a593Smuzhiyun struct mipi_dbi *dbi = &dbidev->dbi;
182*4882a593Smuzhiyun struct drm_rect rect = {
183*4882a593Smuzhiyun .x1 = 0,
184*4882a593Smuzhiyun .x2 = fb->width,
185*4882a593Smuzhiyun .y1 = 0,
186*4882a593Smuzhiyun .y2 = fb->height,
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun int ret, idx;
189*4882a593Smuzhiyun u8 am_id;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun if (!drm_dev_enter(pipe->crtc.dev, &idx))
192*4882a593Smuzhiyun return;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun DRM_DEBUG_KMS("\n");
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun mipi_dbi_hw_reset(dbi);
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun /*
199*4882a593Smuzhiyun * There don't seem to be two example init sequences that match, so
200*4882a593Smuzhiyun * using the one from the popular Arduino library for this display.
201*4882a593Smuzhiyun * https://github.com/Nkawu/TFT_22_ILI9225/blob/master/src/TFT_22_ILI9225.cpp
202*4882a593Smuzhiyun */
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun ret = ili9225_command(dbi, ILI9225_POWER_CONTROL_1, 0x0000);
205*4882a593Smuzhiyun if (ret) {
206*4882a593Smuzhiyun DRM_DEV_ERROR(dev, "Error sending command %d\n", ret);
207*4882a593Smuzhiyun goto out_exit;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_POWER_CONTROL_2, 0x0000);
210*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_POWER_CONTROL_3, 0x0000);
211*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_POWER_CONTROL_4, 0x0000);
212*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_POWER_CONTROL_5, 0x0000);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun msleep(40);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_POWER_CONTROL_2, 0x0018);
217*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_POWER_CONTROL_3, 0x6121);
218*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_POWER_CONTROL_4, 0x006f);
219*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_POWER_CONTROL_5, 0x495f);
220*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_POWER_CONTROL_1, 0x0800);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun msleep(10);
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_POWER_CONTROL_2, 0x103b);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun msleep(50);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun switch (dbidev->rotation) {
229*4882a593Smuzhiyun default:
230*4882a593Smuzhiyun am_id = 0x30;
231*4882a593Smuzhiyun break;
232*4882a593Smuzhiyun case 90:
233*4882a593Smuzhiyun am_id = 0x18;
234*4882a593Smuzhiyun break;
235*4882a593Smuzhiyun case 180:
236*4882a593Smuzhiyun am_id = 0x00;
237*4882a593Smuzhiyun break;
238*4882a593Smuzhiyun case 270:
239*4882a593Smuzhiyun am_id = 0x28;
240*4882a593Smuzhiyun break;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_DRIVER_OUTPUT_CONTROL, 0x011c);
243*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_LCD_AC_DRIVING_CONTROL, 0x0100);
244*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_ENTRY_MODE, 0x1000 | am_id);
245*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_DISPLAY_CONTROL_1, 0x0000);
246*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_BLANK_PERIOD_CONTROL_1, 0x0808);
247*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_FRAME_CYCLE_CONTROL, 0x1100);
248*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_INTERFACE_CONTROL, 0x0000);
249*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_OSCILLATION_CONTROL, 0x0d01);
250*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_VCI_RECYCLING, 0x0020);
251*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_RAM_ADDRESS_SET_1, 0x0000);
252*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_RAM_ADDRESS_SET_2, 0x0000);
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_GATE_SCAN_CONTROL, 0x0000);
255*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_VERTICAL_SCROLL_1, 0x00db);
256*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_VERTICAL_SCROLL_2, 0x0000);
257*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_VERTICAL_SCROLL_3, 0x0000);
258*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_PARTIAL_DRIVING_POS_1, 0x00db);
259*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_PARTIAL_DRIVING_POS_2, 0x0000);
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_GAMMA_CONTROL_1, 0x0000);
262*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_GAMMA_CONTROL_2, 0x0808);
263*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_GAMMA_CONTROL_3, 0x080a);
264*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_GAMMA_CONTROL_4, 0x000a);
265*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_GAMMA_CONTROL_5, 0x0a08);
266*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_GAMMA_CONTROL_6, 0x0808);
267*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_GAMMA_CONTROL_7, 0x0000);
268*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_GAMMA_CONTROL_8, 0x0a00);
269*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_GAMMA_CONTROL_9, 0x0710);
270*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_GAMMA_CONTROL_10, 0x0710);
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_DISPLAY_CONTROL_1, 0x0012);
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun msleep(50);
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_DISPLAY_CONTROL_1, 0x1017);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun ili9225_fb_dirty(fb, &rect);
279*4882a593Smuzhiyun out_exit:
280*4882a593Smuzhiyun drm_dev_exit(idx);
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun
ili9225_pipe_disable(struct drm_simple_display_pipe * pipe)283*4882a593Smuzhiyun static void ili9225_pipe_disable(struct drm_simple_display_pipe *pipe)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
286*4882a593Smuzhiyun struct mipi_dbi *dbi = &dbidev->dbi;
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun DRM_DEBUG_KMS("\n");
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun /*
291*4882a593Smuzhiyun * This callback is not protected by drm_dev_enter/exit since we want to
292*4882a593Smuzhiyun * turn off the display on regular driver unload. It's highly unlikely
293*4882a593Smuzhiyun * that the underlying SPI controller is gone should this be called after
294*4882a593Smuzhiyun * unplug.
295*4882a593Smuzhiyun */
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_DISPLAY_CONTROL_1, 0x0000);
298*4882a593Smuzhiyun msleep(50);
299*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_POWER_CONTROL_2, 0x0007);
300*4882a593Smuzhiyun msleep(50);
301*4882a593Smuzhiyun ili9225_command(dbi, ILI9225_POWER_CONTROL_1, 0x0a02);
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
ili9225_dbi_command(struct mipi_dbi * dbi,u8 * cmd,u8 * par,size_t num)304*4882a593Smuzhiyun static int ili9225_dbi_command(struct mipi_dbi *dbi, u8 *cmd, u8 *par,
305*4882a593Smuzhiyun size_t num)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun struct spi_device *spi = dbi->spi;
308*4882a593Smuzhiyun unsigned int bpw = 8;
309*4882a593Smuzhiyun u32 speed_hz;
310*4882a593Smuzhiyun int ret;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun gpiod_set_value_cansleep(dbi->dc, 0);
313*4882a593Smuzhiyun speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 1);
314*4882a593Smuzhiyun ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, cmd, 1);
315*4882a593Smuzhiyun if (ret || !num)
316*4882a593Smuzhiyun return ret;
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun if (*cmd == ILI9225_WRITE_DATA_TO_GRAM && !dbi->swap_bytes)
319*4882a593Smuzhiyun bpw = 16;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun gpiod_set_value_cansleep(dbi->dc, 1);
322*4882a593Smuzhiyun speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun return mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num);
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun static const struct drm_simple_display_pipe_funcs ili9225_pipe_funcs = {
328*4882a593Smuzhiyun .enable = ili9225_pipe_enable,
329*4882a593Smuzhiyun .disable = ili9225_pipe_disable,
330*4882a593Smuzhiyun .update = ili9225_pipe_update,
331*4882a593Smuzhiyun .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb,
332*4882a593Smuzhiyun };
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun static const struct drm_display_mode ili9225_mode = {
335*4882a593Smuzhiyun DRM_SIMPLE_MODE(176, 220, 35, 44),
336*4882a593Smuzhiyun };
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun DEFINE_DRM_GEM_CMA_FOPS(ili9225_fops);
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun static struct drm_driver ili9225_driver = {
341*4882a593Smuzhiyun .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
342*4882a593Smuzhiyun .fops = &ili9225_fops,
343*4882a593Smuzhiyun DRM_GEM_CMA_DRIVER_OPS_VMAP,
344*4882a593Smuzhiyun .name = "ili9225",
345*4882a593Smuzhiyun .desc = "Ilitek ILI9225",
346*4882a593Smuzhiyun .date = "20171106",
347*4882a593Smuzhiyun .major = 1,
348*4882a593Smuzhiyun .minor = 0,
349*4882a593Smuzhiyun };
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun static const struct of_device_id ili9225_of_match[] = {
352*4882a593Smuzhiyun { .compatible = "vot,v220hf01a-t" },
353*4882a593Smuzhiyun {},
354*4882a593Smuzhiyun };
355*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ili9225_of_match);
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun static const struct spi_device_id ili9225_id[] = {
358*4882a593Smuzhiyun { "v220hf01a-t", 0 },
359*4882a593Smuzhiyun { },
360*4882a593Smuzhiyun };
361*4882a593Smuzhiyun MODULE_DEVICE_TABLE(spi, ili9225_id);
362*4882a593Smuzhiyun
ili9225_probe(struct spi_device * spi)363*4882a593Smuzhiyun static int ili9225_probe(struct spi_device *spi)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun struct device *dev = &spi->dev;
366*4882a593Smuzhiyun struct mipi_dbi_dev *dbidev;
367*4882a593Smuzhiyun struct drm_device *drm;
368*4882a593Smuzhiyun struct mipi_dbi *dbi;
369*4882a593Smuzhiyun struct gpio_desc *rs;
370*4882a593Smuzhiyun u32 rotation = 0;
371*4882a593Smuzhiyun int ret;
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun dbidev = devm_drm_dev_alloc(dev, &ili9225_driver,
374*4882a593Smuzhiyun struct mipi_dbi_dev, drm);
375*4882a593Smuzhiyun if (IS_ERR(dbidev))
376*4882a593Smuzhiyun return PTR_ERR(dbidev);
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun dbi = &dbidev->dbi;
379*4882a593Smuzhiyun drm = &dbidev->drm;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
382*4882a593Smuzhiyun if (IS_ERR(dbi->reset)) {
383*4882a593Smuzhiyun DRM_DEV_ERROR(dev, "Failed to get gpio 'reset'\n");
384*4882a593Smuzhiyun return PTR_ERR(dbi->reset);
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun rs = devm_gpiod_get(dev, "rs", GPIOD_OUT_LOW);
388*4882a593Smuzhiyun if (IS_ERR(rs)) {
389*4882a593Smuzhiyun DRM_DEV_ERROR(dev, "Failed to get gpio 'rs'\n");
390*4882a593Smuzhiyun return PTR_ERR(rs);
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun device_property_read_u32(dev, "rotation", &rotation);
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun ret = mipi_dbi_spi_init(spi, dbi, rs);
396*4882a593Smuzhiyun if (ret)
397*4882a593Smuzhiyun return ret;
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun /* override the command function set in mipi_dbi_spi_init() */
400*4882a593Smuzhiyun dbi->command = ili9225_dbi_command;
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun ret = mipi_dbi_dev_init(dbidev, &ili9225_pipe_funcs, &ili9225_mode, rotation);
403*4882a593Smuzhiyun if (ret)
404*4882a593Smuzhiyun return ret;
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun drm_mode_config_reset(drm);
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun ret = drm_dev_register(drm, 0);
409*4882a593Smuzhiyun if (ret)
410*4882a593Smuzhiyun return ret;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun spi_set_drvdata(spi, drm);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun drm_fbdev_generic_setup(drm, 0);
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun return 0;
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun
ili9225_remove(struct spi_device * spi)419*4882a593Smuzhiyun static int ili9225_remove(struct spi_device *spi)
420*4882a593Smuzhiyun {
421*4882a593Smuzhiyun struct drm_device *drm = spi_get_drvdata(spi);
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun drm_dev_unplug(drm);
424*4882a593Smuzhiyun drm_atomic_helper_shutdown(drm);
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun return 0;
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun
ili9225_shutdown(struct spi_device * spi)429*4882a593Smuzhiyun static void ili9225_shutdown(struct spi_device *spi)
430*4882a593Smuzhiyun {
431*4882a593Smuzhiyun drm_atomic_helper_shutdown(spi_get_drvdata(spi));
432*4882a593Smuzhiyun }
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun static struct spi_driver ili9225_spi_driver = {
435*4882a593Smuzhiyun .driver = {
436*4882a593Smuzhiyun .name = "ili9225",
437*4882a593Smuzhiyun .owner = THIS_MODULE,
438*4882a593Smuzhiyun .of_match_table = ili9225_of_match,
439*4882a593Smuzhiyun },
440*4882a593Smuzhiyun .id_table = ili9225_id,
441*4882a593Smuzhiyun .probe = ili9225_probe,
442*4882a593Smuzhiyun .remove = ili9225_remove,
443*4882a593Smuzhiyun .shutdown = ili9225_shutdown,
444*4882a593Smuzhiyun };
445*4882a593Smuzhiyun module_spi_driver(ili9225_spi_driver);
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun MODULE_DESCRIPTION("Ilitek ILI9225 DRM driver");
448*4882a593Smuzhiyun MODULE_AUTHOR("David Lechner <david@lechnology.com>");
449*4882a593Smuzhiyun MODULE_LICENSE("GPL");
450