1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
4*4882a593Smuzhiyun * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <drm/drm_print.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include "tidss_crtc.h"
10*4882a593Smuzhiyun #include "tidss_dispc.h"
11*4882a593Smuzhiyun #include "tidss_drv.h"
12*4882a593Smuzhiyun #include "tidss_irq.h"
13*4882a593Smuzhiyun #include "tidss_plane.h"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun /* call with wait_lock and dispc runtime held */
tidss_irq_update(struct tidss_device * tidss)16*4882a593Smuzhiyun static void tidss_irq_update(struct tidss_device *tidss)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun assert_spin_locked(&tidss->wait_lock);
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun dispc_set_irqenable(tidss->dispc, tidss->irq_mask);
21*4882a593Smuzhiyun }
22*4882a593Smuzhiyun
tidss_irq_enable_vblank(struct drm_crtc * crtc)23*4882a593Smuzhiyun void tidss_irq_enable_vblank(struct drm_crtc *crtc)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun struct drm_device *ddev = crtc->dev;
26*4882a593Smuzhiyun struct tidss_device *tidss = to_tidss(ddev);
27*4882a593Smuzhiyun struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
28*4882a593Smuzhiyun u32 hw_videoport = tcrtc->hw_videoport;
29*4882a593Smuzhiyun unsigned long flags;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun spin_lock_irqsave(&tidss->wait_lock, flags);
32*4882a593Smuzhiyun tidss->irq_mask |= DSS_IRQ_VP_VSYNC_EVEN(hw_videoport) |
33*4882a593Smuzhiyun DSS_IRQ_VP_VSYNC_ODD(hw_videoport);
34*4882a593Smuzhiyun tidss_irq_update(tidss);
35*4882a593Smuzhiyun spin_unlock_irqrestore(&tidss->wait_lock, flags);
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
tidss_irq_disable_vblank(struct drm_crtc * crtc)38*4882a593Smuzhiyun void tidss_irq_disable_vblank(struct drm_crtc *crtc)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun struct drm_device *ddev = crtc->dev;
41*4882a593Smuzhiyun struct tidss_device *tidss = to_tidss(ddev);
42*4882a593Smuzhiyun struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
43*4882a593Smuzhiyun u32 hw_videoport = tcrtc->hw_videoport;
44*4882a593Smuzhiyun unsigned long flags;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun spin_lock_irqsave(&tidss->wait_lock, flags);
47*4882a593Smuzhiyun tidss->irq_mask &= ~(DSS_IRQ_VP_VSYNC_EVEN(hw_videoport) |
48*4882a593Smuzhiyun DSS_IRQ_VP_VSYNC_ODD(hw_videoport));
49*4882a593Smuzhiyun tidss_irq_update(tidss);
50*4882a593Smuzhiyun spin_unlock_irqrestore(&tidss->wait_lock, flags);
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
tidss_irq_handler(int irq,void * arg)53*4882a593Smuzhiyun irqreturn_t tidss_irq_handler(int irq, void *arg)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun struct drm_device *ddev = (struct drm_device *)arg;
56*4882a593Smuzhiyun struct tidss_device *tidss = to_tidss(ddev);
57*4882a593Smuzhiyun unsigned int id;
58*4882a593Smuzhiyun dispc_irq_t irqstatus;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun if (WARN_ON(!ddev->irq_enabled))
61*4882a593Smuzhiyun return IRQ_NONE;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun irqstatus = dispc_read_and_clear_irqstatus(tidss->dispc);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun for (id = 0; id < tidss->num_crtcs; id++) {
66*4882a593Smuzhiyun struct drm_crtc *crtc = tidss->crtcs[id];
67*4882a593Smuzhiyun struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
68*4882a593Smuzhiyun u32 hw_videoport = tcrtc->hw_videoport;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun if (irqstatus & (DSS_IRQ_VP_VSYNC_EVEN(hw_videoport) |
71*4882a593Smuzhiyun DSS_IRQ_VP_VSYNC_ODD(hw_videoport)))
72*4882a593Smuzhiyun tidss_crtc_vblank_irq(crtc);
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun if (irqstatus & (DSS_IRQ_VP_FRAME_DONE(hw_videoport)))
75*4882a593Smuzhiyun tidss_crtc_framedone_irq(crtc);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun if (irqstatus & DSS_IRQ_VP_SYNC_LOST(hw_videoport))
78*4882a593Smuzhiyun tidss_crtc_error_irq(crtc, irqstatus);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun if (irqstatus & DSS_IRQ_DEVICE_OCP_ERR)
82*4882a593Smuzhiyun dev_err_ratelimited(tidss->dev, "OCP error\n");
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun return IRQ_HANDLED;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
tidss_irq_resume(struct tidss_device * tidss)87*4882a593Smuzhiyun void tidss_irq_resume(struct tidss_device *tidss)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun unsigned long flags;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun spin_lock_irqsave(&tidss->wait_lock, flags);
92*4882a593Smuzhiyun tidss_irq_update(tidss);
93*4882a593Smuzhiyun spin_unlock_irqrestore(&tidss->wait_lock, flags);
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
tidss_irq_preinstall(struct drm_device * ddev)96*4882a593Smuzhiyun void tidss_irq_preinstall(struct drm_device *ddev)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun struct tidss_device *tidss = to_tidss(ddev);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun spin_lock_init(&tidss->wait_lock);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun tidss_runtime_get(tidss);
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun dispc_set_irqenable(tidss->dispc, 0);
105*4882a593Smuzhiyun dispc_read_and_clear_irqstatus(tidss->dispc);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun tidss_runtime_put(tidss);
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
tidss_irq_postinstall(struct drm_device * ddev)110*4882a593Smuzhiyun int tidss_irq_postinstall(struct drm_device *ddev)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun struct tidss_device *tidss = to_tidss(ddev);
113*4882a593Smuzhiyun unsigned long flags;
114*4882a593Smuzhiyun unsigned int i;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun tidss_runtime_get(tidss);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun spin_lock_irqsave(&tidss->wait_lock, flags);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun tidss->irq_mask = DSS_IRQ_DEVICE_OCP_ERR;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun for (i = 0; i < tidss->num_crtcs; ++i) {
123*4882a593Smuzhiyun struct tidss_crtc *tcrtc = to_tidss_crtc(tidss->crtcs[i]);
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun tidss->irq_mask |= DSS_IRQ_VP_SYNC_LOST(tcrtc->hw_videoport);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun tidss->irq_mask |= DSS_IRQ_VP_FRAME_DONE(tcrtc->hw_videoport);
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun tidss_irq_update(tidss);
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun spin_unlock_irqrestore(&tidss->wait_lock, flags);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun tidss_runtime_put(tidss);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun return 0;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
tidss_irq_uninstall(struct drm_device * ddev)139*4882a593Smuzhiyun void tidss_irq_uninstall(struct drm_device *ddev)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun struct tidss_device *tidss = to_tidss(ddev);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun tidss_runtime_get(tidss);
144*4882a593Smuzhiyun dispc_set_irqenable(tidss->dispc, 0);
145*4882a593Smuzhiyun tidss_runtime_put(tidss);
146*4882a593Smuzhiyun }
147