1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 4*4882a593Smuzhiyun * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __TIDSS_DRV_H__ 8*4882a593Smuzhiyun #define __TIDSS_DRV_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <linux/spinlock.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define TIDSS_MAX_PORTS 4 13*4882a593Smuzhiyun #define TIDSS_MAX_PLANES 4 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun typedef u32 dispc_irq_t; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun struct tidss_device { 18*4882a593Smuzhiyun struct drm_device ddev; /* DRM device for DSS */ 19*4882a593Smuzhiyun struct device *dev; /* Underlying DSS device */ 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun const struct dispc_features *feat; 22*4882a593Smuzhiyun struct dispc_device *dispc; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun unsigned int num_crtcs; 25*4882a593Smuzhiyun struct drm_crtc *crtcs[TIDSS_MAX_PORTS]; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun unsigned int num_planes; 28*4882a593Smuzhiyun struct drm_plane *planes[TIDSS_MAX_PLANES]; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun spinlock_t wait_lock; /* protects the irq masks */ 31*4882a593Smuzhiyun dispc_irq_t irq_mask; /* enabled irqs in addition to wait_list */ 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define to_tidss(__dev) container_of(__dev, struct tidss_device, ddev) 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun int tidss_runtime_get(struct tidss_device *tidss); 37*4882a593Smuzhiyun void tidss_runtime_put(struct tidss_device *tidss); 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #endif 40