1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 4*4882a593Smuzhiyun * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __TIDSS_CRTC_H__ 8*4882a593Smuzhiyun #define __TIDSS_CRTC_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <linux/completion.h> 11*4882a593Smuzhiyun #include <linux/wait.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <drm/drm_crtc.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define to_tidss_crtc(c) container_of((c), struct tidss_crtc, crtc) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun struct tidss_device; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun struct tidss_crtc { 20*4882a593Smuzhiyun struct drm_crtc crtc; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun u32 hw_videoport; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun struct drm_pending_vblank_event *event; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun struct completion framedone_completion; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define to_tidss_crtc_state(x) container_of(x, struct tidss_crtc_state, base) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun struct tidss_crtc_state { 32*4882a593Smuzhiyun /* Must be first. */ 33*4882a593Smuzhiyun struct drm_crtc_state base; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun bool plane_pos_changed; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun u32 bus_format; 38*4882a593Smuzhiyun u32 bus_flags; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun void tidss_crtc_vblank_irq(struct drm_crtc *crtc); 42*4882a593Smuzhiyun void tidss_crtc_framedone_irq(struct drm_crtc *crtc); 43*4882a593Smuzhiyun void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqstatus); 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss, 46*4882a593Smuzhiyun u32 hw_videoport, 47*4882a593Smuzhiyun struct drm_plane *primary); 48*4882a593Smuzhiyun #endif 49