1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2012-2013 Avionic Design GmbH
4*4882a593Smuzhiyun * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Based on the KMS/FB CMA helpers
7*4882a593Smuzhiyun * Copyright (C) 2012 Analog Devices Inc.
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/console.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <drm/drm_fourcc.h>
13*4882a593Smuzhiyun #include <drm/drm_gem_framebuffer_helper.h>
14*4882a593Smuzhiyun #include <drm/drm_modeset_helper.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include "drm.h"
17*4882a593Smuzhiyun #include "gem.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #ifdef CONFIG_DRM_FBDEV_EMULATION
to_tegra_fbdev(struct drm_fb_helper * helper)20*4882a593Smuzhiyun static inline struct tegra_fbdev *to_tegra_fbdev(struct drm_fb_helper *helper)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun return container_of(helper, struct tegra_fbdev, base);
23*4882a593Smuzhiyun }
24*4882a593Smuzhiyun #endif
25*4882a593Smuzhiyun
tegra_fb_get_plane(struct drm_framebuffer * framebuffer,unsigned int index)26*4882a593Smuzhiyun struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer,
27*4882a593Smuzhiyun unsigned int index)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun return to_tegra_bo(drm_gem_fb_get_obj(framebuffer, index));
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
tegra_fb_is_bottom_up(struct drm_framebuffer * framebuffer)32*4882a593Smuzhiyun bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun struct tegra_bo *bo = tegra_fb_get_plane(framebuffer, 0);
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun if (bo->flags & TEGRA_BO_BOTTOM_UP)
37*4882a593Smuzhiyun return true;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun return false;
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
tegra_fb_get_tiling(struct drm_framebuffer * framebuffer,struct tegra_bo_tiling * tiling)42*4882a593Smuzhiyun int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer,
43*4882a593Smuzhiyun struct tegra_bo_tiling *tiling)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun uint64_t modifier = framebuffer->modifier;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun switch (modifier) {
48*4882a593Smuzhiyun case DRM_FORMAT_MOD_LINEAR:
49*4882a593Smuzhiyun tiling->mode = TEGRA_BO_TILING_MODE_PITCH;
50*4882a593Smuzhiyun tiling->value = 0;
51*4882a593Smuzhiyun break;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun case DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED:
54*4882a593Smuzhiyun tiling->mode = TEGRA_BO_TILING_MODE_TILED;
55*4882a593Smuzhiyun tiling->value = 0;
56*4882a593Smuzhiyun break;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(0):
59*4882a593Smuzhiyun tiling->mode = TEGRA_BO_TILING_MODE_BLOCK;
60*4882a593Smuzhiyun tiling->value = 0;
61*4882a593Smuzhiyun break;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(1):
64*4882a593Smuzhiyun tiling->mode = TEGRA_BO_TILING_MODE_BLOCK;
65*4882a593Smuzhiyun tiling->value = 1;
66*4882a593Smuzhiyun break;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(2):
69*4882a593Smuzhiyun tiling->mode = TEGRA_BO_TILING_MODE_BLOCK;
70*4882a593Smuzhiyun tiling->value = 2;
71*4882a593Smuzhiyun break;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(3):
74*4882a593Smuzhiyun tiling->mode = TEGRA_BO_TILING_MODE_BLOCK;
75*4882a593Smuzhiyun tiling->value = 3;
76*4882a593Smuzhiyun break;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(4):
79*4882a593Smuzhiyun tiling->mode = TEGRA_BO_TILING_MODE_BLOCK;
80*4882a593Smuzhiyun tiling->value = 4;
81*4882a593Smuzhiyun break;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(5):
84*4882a593Smuzhiyun tiling->mode = TEGRA_BO_TILING_MODE_BLOCK;
85*4882a593Smuzhiyun tiling->value = 5;
86*4882a593Smuzhiyun break;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun default:
89*4882a593Smuzhiyun return -EINVAL;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun static const struct drm_framebuffer_funcs tegra_fb_funcs = {
96*4882a593Smuzhiyun .destroy = drm_gem_fb_destroy,
97*4882a593Smuzhiyun .create_handle = drm_gem_fb_create_handle,
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun
tegra_fb_alloc(struct drm_device * drm,const struct drm_mode_fb_cmd2 * mode_cmd,struct tegra_bo ** planes,unsigned int num_planes)100*4882a593Smuzhiyun static struct drm_framebuffer *tegra_fb_alloc(struct drm_device *drm,
101*4882a593Smuzhiyun const struct drm_mode_fb_cmd2 *mode_cmd,
102*4882a593Smuzhiyun struct tegra_bo **planes,
103*4882a593Smuzhiyun unsigned int num_planes)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun struct drm_framebuffer *fb;
106*4882a593Smuzhiyun unsigned int i;
107*4882a593Smuzhiyun int err;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun fb = kzalloc(sizeof(*fb), GFP_KERNEL);
110*4882a593Smuzhiyun if (!fb)
111*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun drm_helper_mode_fill_fb_struct(drm, fb, mode_cmd);
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun for (i = 0; i < fb->format->num_planes; i++)
116*4882a593Smuzhiyun fb->obj[i] = &planes[i]->gem;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun err = drm_framebuffer_init(drm, fb, &tegra_fb_funcs);
119*4882a593Smuzhiyun if (err < 0) {
120*4882a593Smuzhiyun dev_err(drm->dev, "failed to initialize framebuffer: %d\n",
121*4882a593Smuzhiyun err);
122*4882a593Smuzhiyun kfree(fb);
123*4882a593Smuzhiyun return ERR_PTR(err);
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun return fb;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
tegra_fb_create(struct drm_device * drm,struct drm_file * file,const struct drm_mode_fb_cmd2 * cmd)129*4882a593Smuzhiyun struct drm_framebuffer *tegra_fb_create(struct drm_device *drm,
130*4882a593Smuzhiyun struct drm_file *file,
131*4882a593Smuzhiyun const struct drm_mode_fb_cmd2 *cmd)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun const struct drm_format_info *info = drm_get_format_info(drm, cmd);
134*4882a593Smuzhiyun struct tegra_bo *planes[4];
135*4882a593Smuzhiyun struct drm_gem_object *gem;
136*4882a593Smuzhiyun struct drm_framebuffer *fb;
137*4882a593Smuzhiyun unsigned int i;
138*4882a593Smuzhiyun int err;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun for (i = 0; i < info->num_planes; i++) {
141*4882a593Smuzhiyun unsigned int width = cmd->width / (i ? info->hsub : 1);
142*4882a593Smuzhiyun unsigned int height = cmd->height / (i ? info->vsub : 1);
143*4882a593Smuzhiyun unsigned int size, bpp;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun gem = drm_gem_object_lookup(file, cmd->handles[i]);
146*4882a593Smuzhiyun if (!gem) {
147*4882a593Smuzhiyun err = -ENXIO;
148*4882a593Smuzhiyun goto unreference;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun bpp = info->cpp[i];
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun size = (height - 1) * cmd->pitches[i] +
154*4882a593Smuzhiyun width * bpp + cmd->offsets[i];
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun if (gem->size < size) {
157*4882a593Smuzhiyun err = -EINVAL;
158*4882a593Smuzhiyun goto unreference;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun planes[i] = to_tegra_bo(gem);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun fb = tegra_fb_alloc(drm, cmd, planes, i);
165*4882a593Smuzhiyun if (IS_ERR(fb)) {
166*4882a593Smuzhiyun err = PTR_ERR(fb);
167*4882a593Smuzhiyun goto unreference;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun return fb;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun unreference:
173*4882a593Smuzhiyun while (i--)
174*4882a593Smuzhiyun drm_gem_object_put(&planes[i]->gem);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun return ERR_PTR(err);
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun #ifdef CONFIG_DRM_FBDEV_EMULATION
tegra_fb_mmap(struct fb_info * info,struct vm_area_struct * vma)180*4882a593Smuzhiyun static int tegra_fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun struct drm_fb_helper *helper = info->par;
183*4882a593Smuzhiyun struct tegra_bo *bo;
184*4882a593Smuzhiyun int err;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun bo = tegra_fb_get_plane(helper->fb, 0);
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun err = drm_gem_mmap_obj(&bo->gem, bo->gem.size, vma);
189*4882a593Smuzhiyun if (err < 0)
190*4882a593Smuzhiyun return err;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun return __tegra_gem_mmap(&bo->gem, vma);
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun static const struct fb_ops tegra_fb_ops = {
196*4882a593Smuzhiyun .owner = THIS_MODULE,
197*4882a593Smuzhiyun DRM_FB_HELPER_DEFAULT_OPS,
198*4882a593Smuzhiyun .fb_fillrect = drm_fb_helper_sys_fillrect,
199*4882a593Smuzhiyun .fb_copyarea = drm_fb_helper_sys_copyarea,
200*4882a593Smuzhiyun .fb_imageblit = drm_fb_helper_sys_imageblit,
201*4882a593Smuzhiyun .fb_mmap = tegra_fb_mmap,
202*4882a593Smuzhiyun };
203*4882a593Smuzhiyun
tegra_fbdev_probe(struct drm_fb_helper * helper,struct drm_fb_helper_surface_size * sizes)204*4882a593Smuzhiyun static int tegra_fbdev_probe(struct drm_fb_helper *helper,
205*4882a593Smuzhiyun struct drm_fb_helper_surface_size *sizes)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun struct tegra_fbdev *fbdev = to_tegra_fbdev(helper);
208*4882a593Smuzhiyun struct tegra_drm *tegra = helper->dev->dev_private;
209*4882a593Smuzhiyun struct drm_device *drm = helper->dev;
210*4882a593Smuzhiyun struct drm_mode_fb_cmd2 cmd = { 0 };
211*4882a593Smuzhiyun unsigned int bytes_per_pixel;
212*4882a593Smuzhiyun struct drm_framebuffer *fb;
213*4882a593Smuzhiyun unsigned long offset;
214*4882a593Smuzhiyun struct fb_info *info;
215*4882a593Smuzhiyun struct tegra_bo *bo;
216*4882a593Smuzhiyun size_t size;
217*4882a593Smuzhiyun int err;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun bytes_per_pixel = DIV_ROUND_UP(sizes->surface_bpp, 8);
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun cmd.width = sizes->surface_width;
222*4882a593Smuzhiyun cmd.height = sizes->surface_height;
223*4882a593Smuzhiyun cmd.pitches[0] = round_up(sizes->surface_width * bytes_per_pixel,
224*4882a593Smuzhiyun tegra->pitch_align);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
227*4882a593Smuzhiyun sizes->surface_depth);
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun size = cmd.pitches[0] * cmd.height;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun bo = tegra_bo_create(drm, size, 0);
232*4882a593Smuzhiyun if (IS_ERR(bo))
233*4882a593Smuzhiyun return PTR_ERR(bo);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun info = drm_fb_helper_alloc_fbi(helper);
236*4882a593Smuzhiyun if (IS_ERR(info)) {
237*4882a593Smuzhiyun dev_err(drm->dev, "failed to allocate framebuffer info\n");
238*4882a593Smuzhiyun drm_gem_object_put(&bo->gem);
239*4882a593Smuzhiyun return PTR_ERR(info);
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun fbdev->fb = tegra_fb_alloc(drm, &cmd, &bo, 1);
243*4882a593Smuzhiyun if (IS_ERR(fbdev->fb)) {
244*4882a593Smuzhiyun err = PTR_ERR(fbdev->fb);
245*4882a593Smuzhiyun dev_err(drm->dev, "failed to allocate DRM framebuffer: %d\n",
246*4882a593Smuzhiyun err);
247*4882a593Smuzhiyun drm_gem_object_put(&bo->gem);
248*4882a593Smuzhiyun return PTR_ERR(fbdev->fb);
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun fb = fbdev->fb;
252*4882a593Smuzhiyun helper->fb = fb;
253*4882a593Smuzhiyun helper->fbdev = info;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun info->fbops = &tegra_fb_ops;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun drm_fb_helper_fill_info(info, helper, sizes);
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun offset = info->var.xoffset * bytes_per_pixel +
260*4882a593Smuzhiyun info->var.yoffset * fb->pitches[0];
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun if (bo->pages) {
263*4882a593Smuzhiyun bo->vaddr = vmap(bo->pages, bo->num_pages, VM_MAP,
264*4882a593Smuzhiyun pgprot_writecombine(PAGE_KERNEL));
265*4882a593Smuzhiyun if (!bo->vaddr) {
266*4882a593Smuzhiyun dev_err(drm->dev, "failed to vmap() framebuffer\n");
267*4882a593Smuzhiyun err = -ENOMEM;
268*4882a593Smuzhiyun goto destroy;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun drm->mode_config.fb_base = (resource_size_t)bo->iova;
273*4882a593Smuzhiyun info->screen_base = (void __iomem *)bo->vaddr + offset;
274*4882a593Smuzhiyun info->screen_size = size;
275*4882a593Smuzhiyun info->fix.smem_start = (unsigned long)(bo->iova + offset);
276*4882a593Smuzhiyun info->fix.smem_len = size;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun return 0;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun destroy:
281*4882a593Smuzhiyun drm_framebuffer_remove(fb);
282*4882a593Smuzhiyun return err;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun static const struct drm_fb_helper_funcs tegra_fb_helper_funcs = {
286*4882a593Smuzhiyun .fb_probe = tegra_fbdev_probe,
287*4882a593Smuzhiyun };
288*4882a593Smuzhiyun
tegra_fbdev_create(struct drm_device * drm)289*4882a593Smuzhiyun static struct tegra_fbdev *tegra_fbdev_create(struct drm_device *drm)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun struct tegra_fbdev *fbdev;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL);
294*4882a593Smuzhiyun if (!fbdev) {
295*4882a593Smuzhiyun dev_err(drm->dev, "failed to allocate DRM fbdev\n");
296*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun drm_fb_helper_prepare(drm, &fbdev->base, &tegra_fb_helper_funcs);
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun return fbdev;
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
tegra_fbdev_free(struct tegra_fbdev * fbdev)304*4882a593Smuzhiyun static void tegra_fbdev_free(struct tegra_fbdev *fbdev)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun kfree(fbdev);
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
tegra_fbdev_init(struct tegra_fbdev * fbdev,unsigned int preferred_bpp,unsigned int num_crtc,unsigned int max_connectors)309*4882a593Smuzhiyun static int tegra_fbdev_init(struct tegra_fbdev *fbdev,
310*4882a593Smuzhiyun unsigned int preferred_bpp,
311*4882a593Smuzhiyun unsigned int num_crtc,
312*4882a593Smuzhiyun unsigned int max_connectors)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun struct drm_device *drm = fbdev->base.dev;
315*4882a593Smuzhiyun int err;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun err = drm_fb_helper_init(drm, &fbdev->base);
318*4882a593Smuzhiyun if (err < 0) {
319*4882a593Smuzhiyun dev_err(drm->dev, "failed to initialize DRM FB helper: %d\n",
320*4882a593Smuzhiyun err);
321*4882a593Smuzhiyun return err;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun err = drm_fb_helper_initial_config(&fbdev->base, preferred_bpp);
325*4882a593Smuzhiyun if (err < 0) {
326*4882a593Smuzhiyun dev_err(drm->dev, "failed to set initial configuration: %d\n",
327*4882a593Smuzhiyun err);
328*4882a593Smuzhiyun goto fini;
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun return 0;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun fini:
334*4882a593Smuzhiyun drm_fb_helper_fini(&fbdev->base);
335*4882a593Smuzhiyun return err;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
tegra_fbdev_exit(struct tegra_fbdev * fbdev)338*4882a593Smuzhiyun static void tegra_fbdev_exit(struct tegra_fbdev *fbdev)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun drm_fb_helper_unregister_fbi(&fbdev->base);
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun if (fbdev->fb) {
343*4882a593Smuzhiyun struct tegra_bo *bo = tegra_fb_get_plane(fbdev->fb, 0);
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun /* Undo the special mapping we made in fbdev probe. */
346*4882a593Smuzhiyun if (bo && bo->pages) {
347*4882a593Smuzhiyun vunmap(bo->vaddr);
348*4882a593Smuzhiyun bo->vaddr = NULL;
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun drm_framebuffer_remove(fbdev->fb);
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun drm_fb_helper_fini(&fbdev->base);
355*4882a593Smuzhiyun tegra_fbdev_free(fbdev);
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun #endif
358*4882a593Smuzhiyun
tegra_drm_fb_prepare(struct drm_device * drm)359*4882a593Smuzhiyun int tegra_drm_fb_prepare(struct drm_device *drm)
360*4882a593Smuzhiyun {
361*4882a593Smuzhiyun #ifdef CONFIG_DRM_FBDEV_EMULATION
362*4882a593Smuzhiyun struct tegra_drm *tegra = drm->dev_private;
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun tegra->fbdev = tegra_fbdev_create(drm);
365*4882a593Smuzhiyun if (IS_ERR(tegra->fbdev))
366*4882a593Smuzhiyun return PTR_ERR(tegra->fbdev);
367*4882a593Smuzhiyun #endif
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun return 0;
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun
tegra_drm_fb_free(struct drm_device * drm)372*4882a593Smuzhiyun void tegra_drm_fb_free(struct drm_device *drm)
373*4882a593Smuzhiyun {
374*4882a593Smuzhiyun #ifdef CONFIG_DRM_FBDEV_EMULATION
375*4882a593Smuzhiyun struct tegra_drm *tegra = drm->dev_private;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun tegra_fbdev_free(tegra->fbdev);
378*4882a593Smuzhiyun #endif
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun
tegra_drm_fb_init(struct drm_device * drm)381*4882a593Smuzhiyun int tegra_drm_fb_init(struct drm_device *drm)
382*4882a593Smuzhiyun {
383*4882a593Smuzhiyun #ifdef CONFIG_DRM_FBDEV_EMULATION
384*4882a593Smuzhiyun struct tegra_drm *tegra = drm->dev_private;
385*4882a593Smuzhiyun int err;
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun err = tegra_fbdev_init(tegra->fbdev, 32, drm->mode_config.num_crtc,
388*4882a593Smuzhiyun drm->mode_config.num_connector);
389*4882a593Smuzhiyun if (err < 0)
390*4882a593Smuzhiyun return err;
391*4882a593Smuzhiyun #endif
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun return 0;
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun
tegra_drm_fb_exit(struct drm_device * drm)396*4882a593Smuzhiyun void tegra_drm_fb_exit(struct drm_device *drm)
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun #ifdef CONFIG_DRM_FBDEV_EMULATION
399*4882a593Smuzhiyun struct tegra_drm *tegra = drm->dev_private;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun tegra_fbdev_exit(tegra->fbdev);
402*4882a593Smuzhiyun #endif
403*4882a593Smuzhiyun }
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