1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) Jernej Skrabec <jernej.skrabec@siol.net> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef _SUN8I_CSC_H_ 7*4882a593Smuzhiyun #define _SUN8I_CSC_H_ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <drm/drm_color_mgmt.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun struct sun8i_mixer; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* VI channel CSC units offsets */ 14*4882a593Smuzhiyun #define CCSC00_OFFSET 0xAA050 15*4882a593Smuzhiyun #define CCSC01_OFFSET 0xFA050 16*4882a593Smuzhiyun #define CCSC10_OFFSET 0xA0000 17*4882a593Smuzhiyun #define CCSC11_OFFSET 0xF0000 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define SUN8I_CSC_CTRL(base) ((base) + 0x0) 20*4882a593Smuzhiyun #define SUN8I_CSC_COEFF(base, i) ((base) + 0x10 + 4 * (i)) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define SUN8I_CSC_CTRL_EN BIT(0) 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun enum sun8i_csc_mode { 25*4882a593Smuzhiyun SUN8I_CSC_MODE_OFF, 26*4882a593Smuzhiyun SUN8I_CSC_MODE_YUV2RGB, 27*4882a593Smuzhiyun SUN8I_CSC_MODE_YVU2RGB, 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer, 31*4882a593Smuzhiyun enum sun8i_csc_mode mode, 32*4882a593Smuzhiyun enum drm_color_encoding encoding, 33*4882a593Smuzhiyun enum drm_color_range range); 34*4882a593Smuzhiyun void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable); 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #endif 37