1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2016 Free Electrons
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Maxime Ripard <maxime.ripard@free-electrons.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/clk.h>
9*4882a593Smuzhiyun #include <linux/component.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/regmap.h>
14*4882a593Smuzhiyun #include <linux/reset.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun struct sun6i_drc {
17*4882a593Smuzhiyun struct clk *bus_clk;
18*4882a593Smuzhiyun struct clk *mod_clk;
19*4882a593Smuzhiyun struct reset_control *reset;
20*4882a593Smuzhiyun };
21*4882a593Smuzhiyun
sun6i_drc_bind(struct device * dev,struct device * master,void * data)22*4882a593Smuzhiyun static int sun6i_drc_bind(struct device *dev, struct device *master,
23*4882a593Smuzhiyun void *data)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun struct sun6i_drc *drc;
26*4882a593Smuzhiyun int ret;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun drc = devm_kzalloc(dev, sizeof(*drc), GFP_KERNEL);
29*4882a593Smuzhiyun if (!drc)
30*4882a593Smuzhiyun return -ENOMEM;
31*4882a593Smuzhiyun dev_set_drvdata(dev, drc);
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun drc->reset = devm_reset_control_get(dev, NULL);
34*4882a593Smuzhiyun if (IS_ERR(drc->reset)) {
35*4882a593Smuzhiyun dev_err(dev, "Couldn't get our reset line\n");
36*4882a593Smuzhiyun return PTR_ERR(drc->reset);
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun ret = reset_control_deassert(drc->reset);
40*4882a593Smuzhiyun if (ret) {
41*4882a593Smuzhiyun dev_err(dev, "Couldn't deassert our reset line\n");
42*4882a593Smuzhiyun return ret;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun drc->bus_clk = devm_clk_get(dev, "ahb");
46*4882a593Smuzhiyun if (IS_ERR(drc->bus_clk)) {
47*4882a593Smuzhiyun dev_err(dev, "Couldn't get our bus clock\n");
48*4882a593Smuzhiyun ret = PTR_ERR(drc->bus_clk);
49*4882a593Smuzhiyun goto err_assert_reset;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun clk_prepare_enable(drc->bus_clk);
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun drc->mod_clk = devm_clk_get(dev, "mod");
54*4882a593Smuzhiyun if (IS_ERR(drc->mod_clk)) {
55*4882a593Smuzhiyun dev_err(dev, "Couldn't get our mod clock\n");
56*4882a593Smuzhiyun ret = PTR_ERR(drc->mod_clk);
57*4882a593Smuzhiyun goto err_disable_bus_clk;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun ret = clk_set_rate_exclusive(drc->mod_clk, 300000000);
61*4882a593Smuzhiyun if (ret) {
62*4882a593Smuzhiyun dev_err(dev, "Couldn't set the module clock frequency\n");
63*4882a593Smuzhiyun goto err_disable_bus_clk;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun clk_prepare_enable(drc->mod_clk);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun return 0;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun err_disable_bus_clk:
71*4882a593Smuzhiyun clk_disable_unprepare(drc->bus_clk);
72*4882a593Smuzhiyun err_assert_reset:
73*4882a593Smuzhiyun reset_control_assert(drc->reset);
74*4882a593Smuzhiyun return ret;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
sun6i_drc_unbind(struct device * dev,struct device * master,void * data)77*4882a593Smuzhiyun static void sun6i_drc_unbind(struct device *dev, struct device *master,
78*4882a593Smuzhiyun void *data)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct sun6i_drc *drc = dev_get_drvdata(dev);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun clk_rate_exclusive_put(drc->mod_clk);
83*4882a593Smuzhiyun clk_disable_unprepare(drc->mod_clk);
84*4882a593Smuzhiyun clk_disable_unprepare(drc->bus_clk);
85*4882a593Smuzhiyun reset_control_assert(drc->reset);
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun static const struct component_ops sun6i_drc_ops = {
89*4882a593Smuzhiyun .bind = sun6i_drc_bind,
90*4882a593Smuzhiyun .unbind = sun6i_drc_unbind,
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun
sun6i_drc_probe(struct platform_device * pdev)93*4882a593Smuzhiyun static int sun6i_drc_probe(struct platform_device *pdev)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun return component_add(&pdev->dev, &sun6i_drc_ops);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
sun6i_drc_remove(struct platform_device * pdev)98*4882a593Smuzhiyun static int sun6i_drc_remove(struct platform_device *pdev)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun component_del(&pdev->dev, &sun6i_drc_ops);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun static const struct of_device_id sun6i_drc_of_table[] = {
106*4882a593Smuzhiyun { .compatible = "allwinner,sun6i-a31-drc" },
107*4882a593Smuzhiyun { .compatible = "allwinner,sun6i-a31s-drc" },
108*4882a593Smuzhiyun { .compatible = "allwinner,sun8i-a23-drc" },
109*4882a593Smuzhiyun { .compatible = "allwinner,sun8i-a33-drc" },
110*4882a593Smuzhiyun { .compatible = "allwinner,sun9i-a80-drc" },
111*4882a593Smuzhiyun { }
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, sun6i_drc_of_table);
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun static struct platform_driver sun6i_drc_platform_driver = {
116*4882a593Smuzhiyun .probe = sun6i_drc_probe,
117*4882a593Smuzhiyun .remove = sun6i_drc_remove,
118*4882a593Smuzhiyun .driver = {
119*4882a593Smuzhiyun .name = "sun6i-drc",
120*4882a593Smuzhiyun .of_match_table = sun6i_drc_of_table,
121*4882a593Smuzhiyun },
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun module_platform_driver(sun6i_drc_platform_driver);
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
126*4882a593Smuzhiyun MODULE_DESCRIPTION("Allwinner A31 Dynamic Range Control (DRC) Driver");
127*4882a593Smuzhiyun MODULE_LICENSE("GPL");
128