xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/sun4i/sun4i_backend.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2015 Free Electrons
4*4882a593Smuzhiyun  * Copyright (C) 2015 NextThing Co
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Maxime Ripard <maxime.ripard@free-electrons.com>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifndef _SUN4I_BACKEND_H_
10*4882a593Smuzhiyun #define _SUN4I_BACKEND_H_
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/clk.h>
13*4882a593Smuzhiyun #include <linux/list.h>
14*4882a593Smuzhiyun #include <linux/of.h>
15*4882a593Smuzhiyun #include <linux/regmap.h>
16*4882a593Smuzhiyun #include <linux/reset.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include "sunxi_engine.h"
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_REG		0x800
21*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_LINE_SEL			BIT(29)
22*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_ITLMOD_EN			BIT(28)
23*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_OUT_SEL			GENMASK(22, 20)
24*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_OUT_LCD0				(0 << 20)
25*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_OUT_LCD1				(1 << 20)
26*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_OUT_FE0				(6 << 20)
27*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_OUT_FE1				(7 << 20)
28*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_HWC_EN			BIT(16)
29*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_LAY_EN(l)			BIT(8 + l)
30*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_OCSC_EN			BIT(5)
31*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_DFLK_EN			BIT(4)
32*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_DLP_START_CTL		BIT(2)
33*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_START_CTL			BIT(1)
34*4882a593Smuzhiyun #define SUN4I_BACKEND_MODCTL_DEBE_EN			BIT(0)
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define SUN4I_BACKEND_BACKCOLOR_REG		0x804
37*4882a593Smuzhiyun #define SUN4I_BACKEND_BACKCOLOR(r, g, b)		(((r) << 16) | ((g) << 8) | (b))
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define SUN4I_BACKEND_DISSIZE_REG		0x808
40*4882a593Smuzhiyun #define SUN4I_BACKEND_DISSIZE(w, h)			(((((h) - 1) & 0xffff) << 16) | \
41*4882a593Smuzhiyun 							 (((w) - 1) & 0xffff))
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define SUN4I_BACKEND_LAYSIZE_REG(l)		(0x810 + (0x4 * (l)))
44*4882a593Smuzhiyun #define SUN4I_BACKEND_LAYSIZE(w, h)			(((((h) - 1) & 0x1fff) << 16) | \
45*4882a593Smuzhiyun 							 (((w) - 1) & 0x1fff))
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define SUN4I_BACKEND_LAYCOOR_REG(l)		(0x820 + (0x4 * (l)))
48*4882a593Smuzhiyun #define SUN4I_BACKEND_LAYCOOR(x, y)			((((u32)(y) & 0xffff) << 16) | \
49*4882a593Smuzhiyun 							 ((u32)(x) & 0xffff))
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #define SUN4I_BACKEND_LAYLINEWIDTH_REG(l)	(0x840 + (0x4 * (l)))
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #define SUN4I_BACKEND_LAYFB_L32ADD_REG(l)	(0x850 + (0x4 * (l)))
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun #define SUN4I_BACKEND_LAYFB_H4ADD_REG		0x860
56*4882a593Smuzhiyun #define SUN4I_BACKEND_LAYFB_H4ADD_MSK(l)		GENMASK(3 + ((l) * 8), (l) * 8)
57*4882a593Smuzhiyun #define SUN4I_BACKEND_LAYFB_H4ADD(l, val)		((val) << ((l) * 8))
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun #define SUN4I_BACKEND_REGBUFFCTL_REG		0x870
60*4882a593Smuzhiyun #define SUN4I_BACKEND_REGBUFFCTL_AUTOLOAD_DIS		BIT(1)
61*4882a593Smuzhiyun #define SUN4I_BACKEND_REGBUFFCTL_LOADCTL		BIT(0)
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun #define SUN4I_BACKEND_CKMAX_REG			0x880
64*4882a593Smuzhiyun #define SUN4I_BACKEND_CKMIN_REG			0x884
65*4882a593Smuzhiyun #define SUN4I_BACKEND_CKCFG_REG			0x888
66*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG0(l)		(0x890 + (0x4 * (l)))
67*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_MASK	GENMASK(31, 24)
68*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA(x)		((x) << 24)
69*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL_MASK	BIT(15)
70*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL(x)		((x) << 15)
71*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL_MASK	GENMASK(11, 10)
72*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL(x)			((x) << 10)
73*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG0_LAY_YUVEN		BIT(2)
74*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG0_LAY_VDOEN		BIT(1)
75*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_EN	BIT(0)
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG1(l)		(0x8a0 + (0x4 * (l)))
78*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG1_LAY_HSCAFCT		GENMASK(15, 14)
79*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG1_LAY_WSCAFCT		GENMASK(13, 12)
80*4882a593Smuzhiyun #define SUN4I_BACKEND_ATTCTL_REG1_LAY_FBFMT		GENMASK(11, 8)
81*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_1BPP				(0 << 8)
82*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_2BPP				(1 << 8)
83*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_4BPP				(2 << 8)
84*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_8BPP				(3 << 8)
85*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_RGB655				(4 << 8)
86*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_RGB565				(5 << 8)
87*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_RGB556				(6 << 8)
88*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_ARGB1555			(7 << 8)
89*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_RGBA5551			(8 << 8)
90*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_XRGB8888			(9 << 8)
91*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_ARGB8888			(10 << 8)
92*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_RGB888				(11 << 8)
93*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_ARGB4444			(12 << 8)
94*4882a593Smuzhiyun #define SUN4I_BACKEND_LAY_FBFMT_RGBA4444			(13 << 8)
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun #define SUN4I_BACKEND_DLCDPCTL_REG		0x8b0
97*4882a593Smuzhiyun #define SUN4I_BACKEND_DLCDPFRMBUF_ADDRCTL_REG	0x8b4
98*4882a593Smuzhiyun #define SUN4I_BACKEND_DLCDPCOOR_REG0		0x8b8
99*4882a593Smuzhiyun #define SUN4I_BACKEND_DLCDPCOOR_REG1		0x8bc
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun #define SUN4I_BACKEND_INT_EN_REG		0x8c0
102*4882a593Smuzhiyun #define SUN4I_BACKEND_INT_FLAG_REG		0x8c4
103*4882a593Smuzhiyun #define SUN4I_BACKEND_REG_LOAD_FINISHED			BIT(1)
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun #define SUN4I_BACKEND_HWCCTL_REG		0x8d8
106*4882a593Smuzhiyun #define SUN4I_BACKEND_HWCFBCTL_REG		0x8e0
107*4882a593Smuzhiyun #define SUN4I_BACKEND_WBCTL_REG			0x8f0
108*4882a593Smuzhiyun #define SUN4I_BACKEND_WBADD_REG			0x8f4
109*4882a593Smuzhiyun #define SUN4I_BACKEND_WBLINEWIDTH_REG		0x8f8
110*4882a593Smuzhiyun #define SUN4I_BACKEND_SPREN_REG			0x900
111*4882a593Smuzhiyun #define SUN4I_BACKEND_SPRFMTCTL_REG		0x908
112*4882a593Smuzhiyun #define SUN4I_BACKEND_SPRALPHACTL_REG		0x90c
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_REG		0x920
115*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_FBFMT_MASK		GENMASK(14, 12)
116*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_FBFMT_PACKED_YUV444		(4 << 12)
117*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_FBFMT_PACKED_YUV422		(3 << 12)
118*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_FBFMT_PLANAR_YUV444		(2 << 12)
119*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_FBFMT_PLANAR_YUV222		(1 << 12)
120*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_FBFMT_PLANAR_YUV111		(0 << 12)
121*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_FBPS_MASK			GENMASK(9, 8)
122*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_FBPS_YVYU				(3 << 8)
123*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_FBPS_VYUY				(2 << 8)
124*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_FBPS_YUYV				(1 << 8)
125*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_FBPS_UYVY				(0 << 8)
126*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_FBPS_VUYA				(1 << 8)
127*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_FBPS_AYUV				(0 << 8)
128*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVCTL_EN			BIT(0)
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVADD_REG(c)		(0x930 + (0x4 * (c)))
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun #define SUN4I_BACKEND_IYUVLINEWIDTH_REG(c)	(0x940 + (0x4 * (c)))
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun #define SUN4I_BACKEND_YGCOEF_REG(c)		(0x950 + (0x4 * (c)))
135*4882a593Smuzhiyun #define SUN4I_BACKEND_YGCONS_REG		0x95c
136*4882a593Smuzhiyun #define SUN4I_BACKEND_URCOEF_REG(c)		(0x960 + (0x4 * (c)))
137*4882a593Smuzhiyun #define SUN4I_BACKEND_URCONS_REG		0x96c
138*4882a593Smuzhiyun #define SUN4I_BACKEND_VBCOEF_REG(c)		(0x970 + (0x4 * (c)))
139*4882a593Smuzhiyun #define SUN4I_BACKEND_VBCONS_REG		0x97c
140*4882a593Smuzhiyun #define SUN4I_BACKEND_KSCTL_REG			0x980
141*4882a593Smuzhiyun #define SUN4I_BACKEND_KSBKCOLOR_REG		0x984
142*4882a593Smuzhiyun #define SUN4I_BACKEND_KSFSTLINEWIDTH_REG	0x988
143*4882a593Smuzhiyun #define SUN4I_BACKEND_KSVSCAFCT_REG		0x98c
144*4882a593Smuzhiyun #define SUN4I_BACKEND_KSHSCACOEF_REG(x)		(0x9a0 + (0x4 * (x)))
145*4882a593Smuzhiyun #define SUN4I_BACKEND_OCCTL_REG			0x9c0
146*4882a593Smuzhiyun #define SUN4I_BACKEND_OCCTL_ENABLE			BIT(0)
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun #define SUN4I_BACKEND_OCRCOEF_REG(x)		(0x9d0 + (0x4 * (x)))
149*4882a593Smuzhiyun #define SUN4I_BACKEND_OCRCONS_REG		0x9dc
150*4882a593Smuzhiyun #define SUN4I_BACKEND_OCGCOEF_REG(x)		(0x9e0 + (0x4 * (x)))
151*4882a593Smuzhiyun #define SUN4I_BACKEND_OCGCONS_REG		0x9ec
152*4882a593Smuzhiyun #define SUN4I_BACKEND_OCBCOEF_REG(x)		(0x9f0 + (0x4 * (x)))
153*4882a593Smuzhiyun #define SUN4I_BACKEND_OCBCONS_REG		0x9fc
154*4882a593Smuzhiyun #define SUN4I_BACKEND_SPRCOORCTL_REG(s)		(0xa00 + (0x4 * (s)))
155*4882a593Smuzhiyun #define SUN4I_BACKEND_SPRATTCTL_REG(s)		(0xb00 + (0x4 * (s)))
156*4882a593Smuzhiyun #define SUN4I_BACKEND_SPRADD_REG(s)		(0xc00 + (0x4 * (s)))
157*4882a593Smuzhiyun #define SUN4I_BACKEND_SPRLINEWIDTH_REG(s)	(0xd00 + (0x4 * (s)))
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun #define SUN4I_BACKEND_SPRPALTAB_OFF		0x4000
160*4882a593Smuzhiyun #define SUN4I_BACKEND_GAMMATAB_OFF		0x4400
161*4882a593Smuzhiyun #define SUN4I_BACKEND_HWCPATTERN_OFF		0x4800
162*4882a593Smuzhiyun #define SUN4I_BACKEND_HWCCOLORTAB_OFF		0x4c00
163*4882a593Smuzhiyun #define SUN4I_BACKEND_PIPE_OFF(p)		(0x5000 + (0x400 * (p)))
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun #define SUN4I_BACKEND_NUM_LAYERS		4
166*4882a593Smuzhiyun #define SUN4I_BACKEND_NUM_FRONTEND_LAYERS	1
167*4882a593Smuzhiyun #define SUN4I_BACKEND_NUM_YUV_PLANES		1
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun struct sun4i_backend {
170*4882a593Smuzhiyun 	struct sunxi_engine	engine;
171*4882a593Smuzhiyun 	struct sun4i_frontend	*frontend;
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	struct reset_control	*reset;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	struct clk		*bus_clk;
176*4882a593Smuzhiyun 	struct clk		*mod_clk;
177*4882a593Smuzhiyun 	struct clk		*ram_clk;
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	struct clk		*sat_clk;
180*4882a593Smuzhiyun 	struct reset_control	*sat_reset;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	/* Protects against races in the frontend teardown */
183*4882a593Smuzhiyun 	spinlock_t		frontend_lock;
184*4882a593Smuzhiyun 	bool			frontend_teardown;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	const struct sun4i_backend_quirks	*quirks;
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun static inline struct sun4i_backend *
engine_to_sun4i_backend(struct sunxi_engine * engine)190*4882a593Smuzhiyun engine_to_sun4i_backend(struct sunxi_engine *engine)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	return container_of(engine, struct sun4i_backend, engine);
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun void sun4i_backend_layer_enable(struct sun4i_backend *backend,
196*4882a593Smuzhiyun 				int layer, bool enable);
197*4882a593Smuzhiyun bool sun4i_backend_format_is_supported(uint32_t fmt, uint64_t modifier);
198*4882a593Smuzhiyun int sun4i_backend_update_layer_coord(struct sun4i_backend *backend,
199*4882a593Smuzhiyun 				     int layer, struct drm_plane *plane);
200*4882a593Smuzhiyun int sun4i_backend_update_layer_formats(struct sun4i_backend *backend,
201*4882a593Smuzhiyun 				       int layer, struct drm_plane *plane);
202*4882a593Smuzhiyun int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend,
203*4882a593Smuzhiyun 				      int layer, struct drm_plane *plane);
204*4882a593Smuzhiyun int sun4i_backend_update_layer_frontend(struct sun4i_backend *backend,
205*4882a593Smuzhiyun 					int layer, uint32_t in_fmt);
206*4882a593Smuzhiyun int sun4i_backend_update_layer_zpos(struct sun4i_backend *backend,
207*4882a593Smuzhiyun 				    int layer, struct drm_plane *plane);
208*4882a593Smuzhiyun void sun4i_backend_cleanup_layer(struct sun4i_backend *backend,
209*4882a593Smuzhiyun 				 int layer);
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun #endif /* _SUN4I_BACKEND_H_ */
212