xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/shmobile/shmob_drm_plane.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * shmob_drm_plane.c  --  SH Mobile DRM Planes
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2012 Renesas Electronics Corporation
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <drm/drm_crtc.h>
11*4882a593Smuzhiyun #include <drm/drm_crtc_helper.h>
12*4882a593Smuzhiyun #include <drm/drm_fb_cma_helper.h>
13*4882a593Smuzhiyun #include <drm/drm_fourcc.h>
14*4882a593Smuzhiyun #include <drm/drm_gem_cma_helper.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include "shmob_drm_drv.h"
17*4882a593Smuzhiyun #include "shmob_drm_kms.h"
18*4882a593Smuzhiyun #include "shmob_drm_plane.h"
19*4882a593Smuzhiyun #include "shmob_drm_regs.h"
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun struct shmob_drm_plane {
22*4882a593Smuzhiyun 	struct drm_plane plane;
23*4882a593Smuzhiyun 	unsigned int index;
24*4882a593Smuzhiyun 	unsigned int alpha;
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun 	const struct shmob_drm_format_info *format;
27*4882a593Smuzhiyun 	unsigned long dma[2];
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 	unsigned int src_x;
30*4882a593Smuzhiyun 	unsigned int src_y;
31*4882a593Smuzhiyun 	unsigned int crtc_x;
32*4882a593Smuzhiyun 	unsigned int crtc_y;
33*4882a593Smuzhiyun 	unsigned int crtc_w;
34*4882a593Smuzhiyun 	unsigned int crtc_h;
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define to_shmob_plane(p)	container_of(p, struct shmob_drm_plane, plane)
38*4882a593Smuzhiyun 
shmob_drm_plane_compute_base(struct shmob_drm_plane * splane,struct drm_framebuffer * fb,int x,int y)39*4882a593Smuzhiyun static void shmob_drm_plane_compute_base(struct shmob_drm_plane *splane,
40*4882a593Smuzhiyun 					 struct drm_framebuffer *fb,
41*4882a593Smuzhiyun 					 int x, int y)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun 	struct drm_gem_cma_object *gem;
44*4882a593Smuzhiyun 	unsigned int bpp;
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	bpp = splane->format->yuv ? 8 : splane->format->bpp;
47*4882a593Smuzhiyun 	gem = drm_fb_cma_get_gem_obj(fb, 0);
48*4882a593Smuzhiyun 	splane->dma[0] = gem->paddr + fb->offsets[0]
49*4882a593Smuzhiyun 		       + y * fb->pitches[0] + x * bpp / 8;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	if (splane->format->yuv) {
52*4882a593Smuzhiyun 		bpp = splane->format->bpp - 8;
53*4882a593Smuzhiyun 		gem = drm_fb_cma_get_gem_obj(fb, 1);
54*4882a593Smuzhiyun 		splane->dma[1] = gem->paddr + fb->offsets[1]
55*4882a593Smuzhiyun 			       + y / (bpp == 4 ? 2 : 1) * fb->pitches[1]
56*4882a593Smuzhiyun 			       + x * (bpp == 16 ? 2 : 1);
57*4882a593Smuzhiyun 	}
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
__shmob_drm_plane_setup(struct shmob_drm_plane * splane,struct drm_framebuffer * fb)60*4882a593Smuzhiyun static void __shmob_drm_plane_setup(struct shmob_drm_plane *splane,
61*4882a593Smuzhiyun 				    struct drm_framebuffer *fb)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	struct shmob_drm_device *sdev = splane->plane.dev->dev_private;
64*4882a593Smuzhiyun 	u32 format;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	/* TODO: Support ROP3 mode */
67*4882a593Smuzhiyun 	format = LDBBSIFR_EN | (splane->alpha << LDBBSIFR_LAY_SHIFT);
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	switch (splane->format->fourcc) {
70*4882a593Smuzhiyun 	case DRM_FORMAT_RGB565:
71*4882a593Smuzhiyun 	case DRM_FORMAT_NV21:
72*4882a593Smuzhiyun 	case DRM_FORMAT_NV61:
73*4882a593Smuzhiyun 	case DRM_FORMAT_NV42:
74*4882a593Smuzhiyun 		format |= LDBBSIFR_SWPL | LDBBSIFR_SWPW;
75*4882a593Smuzhiyun 		break;
76*4882a593Smuzhiyun 	case DRM_FORMAT_RGB888:
77*4882a593Smuzhiyun 	case DRM_FORMAT_NV12:
78*4882a593Smuzhiyun 	case DRM_FORMAT_NV16:
79*4882a593Smuzhiyun 	case DRM_FORMAT_NV24:
80*4882a593Smuzhiyun 		format |= LDBBSIFR_SWPL | LDBBSIFR_SWPW | LDBBSIFR_SWPB;
81*4882a593Smuzhiyun 		break;
82*4882a593Smuzhiyun 	case DRM_FORMAT_ARGB8888:
83*4882a593Smuzhiyun 	default:
84*4882a593Smuzhiyun 		format |= LDBBSIFR_SWPL;
85*4882a593Smuzhiyun 		break;
86*4882a593Smuzhiyun 	}
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	switch (splane->format->fourcc) {
89*4882a593Smuzhiyun 	case DRM_FORMAT_RGB565:
90*4882a593Smuzhiyun 		format |= LDBBSIFR_AL_1 | LDBBSIFR_RY | LDBBSIFR_RPKF_RGB16;
91*4882a593Smuzhiyun 		break;
92*4882a593Smuzhiyun 	case DRM_FORMAT_RGB888:
93*4882a593Smuzhiyun 		format |= LDBBSIFR_AL_1 | LDBBSIFR_RY | LDBBSIFR_RPKF_RGB24;
94*4882a593Smuzhiyun 		break;
95*4882a593Smuzhiyun 	case DRM_FORMAT_ARGB8888:
96*4882a593Smuzhiyun 		format |= LDBBSIFR_AL_PK | LDBBSIFR_RY | LDDFR_PKF_ARGB32;
97*4882a593Smuzhiyun 		break;
98*4882a593Smuzhiyun 	case DRM_FORMAT_NV12:
99*4882a593Smuzhiyun 	case DRM_FORMAT_NV21:
100*4882a593Smuzhiyun 		format |= LDBBSIFR_AL_1 | LDBBSIFR_CHRR_420;
101*4882a593Smuzhiyun 		break;
102*4882a593Smuzhiyun 	case DRM_FORMAT_NV16:
103*4882a593Smuzhiyun 	case DRM_FORMAT_NV61:
104*4882a593Smuzhiyun 		format |= LDBBSIFR_AL_1 | LDBBSIFR_CHRR_422;
105*4882a593Smuzhiyun 		break;
106*4882a593Smuzhiyun 	case DRM_FORMAT_NV24:
107*4882a593Smuzhiyun 	case DRM_FORMAT_NV42:
108*4882a593Smuzhiyun 		format |= LDBBSIFR_AL_1 | LDBBSIFR_CHRR_444;
109*4882a593Smuzhiyun 		break;
110*4882a593Smuzhiyun 	}
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun #define plane_reg_dump(sdev, splane, reg) \
113*4882a593Smuzhiyun 	dev_dbg(sdev->ddev->dev, "%s(%u): %s 0x%08x 0x%08x\n", __func__, \
114*4882a593Smuzhiyun 		splane->index, #reg, \
115*4882a593Smuzhiyun 		lcdc_read(sdev, reg(splane->index)), \
116*4882a593Smuzhiyun 		lcdc_read(sdev, reg(splane->index) + LCDC_SIDE_B_OFFSET))
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	plane_reg_dump(sdev, splane, LDBnBSIFR);
119*4882a593Smuzhiyun 	plane_reg_dump(sdev, splane, LDBnBSSZR);
120*4882a593Smuzhiyun 	plane_reg_dump(sdev, splane, LDBnBLOCR);
121*4882a593Smuzhiyun 	plane_reg_dump(sdev, splane, LDBnBSMWR);
122*4882a593Smuzhiyun 	plane_reg_dump(sdev, splane, LDBnBSAYR);
123*4882a593Smuzhiyun 	plane_reg_dump(sdev, splane, LDBnBSACR);
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	lcdc_write(sdev, LDBCR, LDBCR_UPC(splane->index));
126*4882a593Smuzhiyun 	dev_dbg(sdev->ddev->dev, "%s(%u): %s 0x%08x\n", __func__, splane->index,
127*4882a593Smuzhiyun 		"LDBCR", lcdc_read(sdev, LDBCR));
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	lcdc_write(sdev, LDBnBSIFR(splane->index), format);
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	lcdc_write(sdev, LDBnBSSZR(splane->index),
132*4882a593Smuzhiyun 		   (splane->crtc_h << LDBBSSZR_BVSS_SHIFT) |
133*4882a593Smuzhiyun 		   (splane->crtc_w << LDBBSSZR_BHSS_SHIFT));
134*4882a593Smuzhiyun 	lcdc_write(sdev, LDBnBLOCR(splane->index),
135*4882a593Smuzhiyun 		   (splane->crtc_y << LDBBLOCR_CVLC_SHIFT) |
136*4882a593Smuzhiyun 		   (splane->crtc_x << LDBBLOCR_CHLC_SHIFT));
137*4882a593Smuzhiyun 	lcdc_write(sdev, LDBnBSMWR(splane->index),
138*4882a593Smuzhiyun 		   fb->pitches[0] << LDBBSMWR_BSMW_SHIFT);
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	shmob_drm_plane_compute_base(splane, fb, splane->src_x, splane->src_y);
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	lcdc_write(sdev, LDBnBSAYR(splane->index), splane->dma[0]);
143*4882a593Smuzhiyun 	if (splane->format->yuv)
144*4882a593Smuzhiyun 		lcdc_write(sdev, LDBnBSACR(splane->index), splane->dma[1]);
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	lcdc_write(sdev, LDBCR,
147*4882a593Smuzhiyun 		   LDBCR_UPF(splane->index) | LDBCR_UPD(splane->index));
148*4882a593Smuzhiyun 	dev_dbg(sdev->ddev->dev, "%s(%u): %s 0x%08x\n", __func__, splane->index,
149*4882a593Smuzhiyun 		"LDBCR", lcdc_read(sdev, LDBCR));
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	plane_reg_dump(sdev, splane, LDBnBSIFR);
152*4882a593Smuzhiyun 	plane_reg_dump(sdev, splane, LDBnBSSZR);
153*4882a593Smuzhiyun 	plane_reg_dump(sdev, splane, LDBnBLOCR);
154*4882a593Smuzhiyun 	plane_reg_dump(sdev, splane, LDBnBSMWR);
155*4882a593Smuzhiyun 	plane_reg_dump(sdev, splane, LDBnBSAYR);
156*4882a593Smuzhiyun 	plane_reg_dump(sdev, splane, LDBnBSACR);
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun 
shmob_drm_plane_setup(struct drm_plane * plane)159*4882a593Smuzhiyun void shmob_drm_plane_setup(struct drm_plane *plane)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun 	struct shmob_drm_plane *splane = to_shmob_plane(plane);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	if (plane->fb == NULL)
164*4882a593Smuzhiyun 		return;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	__shmob_drm_plane_setup(splane, plane->fb);
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun static int
shmob_drm_plane_update(struct drm_plane * plane,struct drm_crtc * crtc,struct drm_framebuffer * fb,int crtc_x,int crtc_y,unsigned int crtc_w,unsigned int crtc_h,uint32_t src_x,uint32_t src_y,uint32_t src_w,uint32_t src_h,struct drm_modeset_acquire_ctx * ctx)170*4882a593Smuzhiyun shmob_drm_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
171*4882a593Smuzhiyun 		       struct drm_framebuffer *fb, int crtc_x, int crtc_y,
172*4882a593Smuzhiyun 		       unsigned int crtc_w, unsigned int crtc_h,
173*4882a593Smuzhiyun 		       uint32_t src_x, uint32_t src_y,
174*4882a593Smuzhiyun 		       uint32_t src_w, uint32_t src_h,
175*4882a593Smuzhiyun 		       struct drm_modeset_acquire_ctx *ctx)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	struct shmob_drm_plane *splane = to_shmob_plane(plane);
178*4882a593Smuzhiyun 	struct shmob_drm_device *sdev = plane->dev->dev_private;
179*4882a593Smuzhiyun 	const struct shmob_drm_format_info *format;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	format = shmob_drm_format_info(fb->format->format);
182*4882a593Smuzhiyun 	if (format == NULL) {
183*4882a593Smuzhiyun 		dev_dbg(sdev->dev, "update_plane: unsupported format %08x\n",
184*4882a593Smuzhiyun 			fb->format->format);
185*4882a593Smuzhiyun 		return -EINVAL;
186*4882a593Smuzhiyun 	}
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	if (src_w >> 16 != crtc_w || src_h >> 16 != crtc_h) {
189*4882a593Smuzhiyun 		dev_dbg(sdev->dev, "%s: scaling not supported\n", __func__);
190*4882a593Smuzhiyun 		return -EINVAL;
191*4882a593Smuzhiyun 	}
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	splane->format = format;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	splane->src_x = src_x >> 16;
196*4882a593Smuzhiyun 	splane->src_y = src_y >> 16;
197*4882a593Smuzhiyun 	splane->crtc_x = crtc_x;
198*4882a593Smuzhiyun 	splane->crtc_y = crtc_y;
199*4882a593Smuzhiyun 	splane->crtc_w = crtc_w;
200*4882a593Smuzhiyun 	splane->crtc_h = crtc_h;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	__shmob_drm_plane_setup(splane, fb);
203*4882a593Smuzhiyun 	return 0;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun 
shmob_drm_plane_disable(struct drm_plane * plane,struct drm_modeset_acquire_ctx * ctx)206*4882a593Smuzhiyun static int shmob_drm_plane_disable(struct drm_plane *plane,
207*4882a593Smuzhiyun 				   struct drm_modeset_acquire_ctx *ctx)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun 	struct shmob_drm_plane *splane = to_shmob_plane(plane);
210*4882a593Smuzhiyun 	struct shmob_drm_device *sdev = plane->dev->dev_private;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	splane->format = NULL;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	lcdc_write(sdev, LDBnBSIFR(splane->index), 0);
215*4882a593Smuzhiyun 	return 0;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun 
shmob_drm_plane_destroy(struct drm_plane * plane)218*4882a593Smuzhiyun static void shmob_drm_plane_destroy(struct drm_plane *plane)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun 	drm_plane_force_disable(plane);
221*4882a593Smuzhiyun 	drm_plane_cleanup(plane);
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun static const struct drm_plane_funcs shmob_drm_plane_funcs = {
225*4882a593Smuzhiyun 	.update_plane = shmob_drm_plane_update,
226*4882a593Smuzhiyun 	.disable_plane = shmob_drm_plane_disable,
227*4882a593Smuzhiyun 	.destroy = shmob_drm_plane_destroy,
228*4882a593Smuzhiyun };
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun static const uint32_t formats[] = {
231*4882a593Smuzhiyun 	DRM_FORMAT_RGB565,
232*4882a593Smuzhiyun 	DRM_FORMAT_RGB888,
233*4882a593Smuzhiyun 	DRM_FORMAT_ARGB8888,
234*4882a593Smuzhiyun 	DRM_FORMAT_NV12,
235*4882a593Smuzhiyun 	DRM_FORMAT_NV21,
236*4882a593Smuzhiyun 	DRM_FORMAT_NV16,
237*4882a593Smuzhiyun 	DRM_FORMAT_NV61,
238*4882a593Smuzhiyun 	DRM_FORMAT_NV24,
239*4882a593Smuzhiyun 	DRM_FORMAT_NV42,
240*4882a593Smuzhiyun };
241*4882a593Smuzhiyun 
shmob_drm_plane_create(struct shmob_drm_device * sdev,unsigned int index)242*4882a593Smuzhiyun int shmob_drm_plane_create(struct shmob_drm_device *sdev, unsigned int index)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun 	struct shmob_drm_plane *splane;
245*4882a593Smuzhiyun 	int ret;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	splane = devm_kzalloc(sdev->dev, sizeof(*splane), GFP_KERNEL);
248*4882a593Smuzhiyun 	if (splane == NULL)
249*4882a593Smuzhiyun 		return -ENOMEM;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	splane->index = index;
252*4882a593Smuzhiyun 	splane->alpha = 255;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	ret = drm_plane_init(sdev->ddev, &splane->plane, 1,
255*4882a593Smuzhiyun 			     &shmob_drm_plane_funcs, formats,
256*4882a593Smuzhiyun 			     ARRAY_SIZE(formats), false);
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	return ret;
259*4882a593Smuzhiyun }
260