xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/rk628/rk628_lvds.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2020 Rockchip Electronics Co. Ltd.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Author: Wyon Bi <bivvy.bi@rock-chips.com>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/clk.h>
10*4882a593Smuzhiyun #include <linux/platform_device.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/regmap.h>
13*4882a593Smuzhiyun #include <linux/mfd/rk628.h>
14*4882a593Smuzhiyun #include <linux/phy/phy.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <drm/drm_of.h>
17*4882a593Smuzhiyun #include <drm/drm_atomic.h>
18*4882a593Smuzhiyun #include <drm/drm_probe_helper.h>
19*4882a593Smuzhiyun #include <drm/drm_atomic_helper.h>
20*4882a593Smuzhiyun #include <drm/drm_panel.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include <video/of_display_timing.h>
23*4882a593Smuzhiyun #include <video/videomode.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun enum lvds_format {
26*4882a593Smuzhiyun 	LVDS_FORMAT_VESA_24BIT,
27*4882a593Smuzhiyun 	LVDS_FORMAT_JEIDA_24BIT,
28*4882a593Smuzhiyun 	LVDS_FORMAT_JEIDA_18BIT,
29*4882a593Smuzhiyun 	LVDS_FORMAT_VESA_18BIT,
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun enum lvds_link_type {
33*4882a593Smuzhiyun 	LVDS_SINGLE_LINK,
34*4882a593Smuzhiyun 	LVDS_DUAL_LINK_ODD_EVEN_PIXELS,
35*4882a593Smuzhiyun 	LVDS_DUAL_LINK_EVEN_ODD_PIXELS,
36*4882a593Smuzhiyun 	LVDS_DUAL_LINK_LEFT_RIGHT_PIXELS,
37*4882a593Smuzhiyun 	LVDS_DUAL_LINK_RIGHT_LEFT_PIXELS,
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun struct rk628_lvds {
41*4882a593Smuzhiyun 	struct drm_bridge base;
42*4882a593Smuzhiyun 	struct drm_connector connector;
43*4882a593Smuzhiyun 	struct drm_panel *panel;
44*4882a593Smuzhiyun 	struct drm_display_mode mode;
45*4882a593Smuzhiyun 	struct device *dev;
46*4882a593Smuzhiyun 	struct regmap *grf;
47*4882a593Smuzhiyun 	struct phy *phy;
48*4882a593Smuzhiyun 	struct rk628 *parent;
49*4882a593Smuzhiyun 	enum lvds_format format;
50*4882a593Smuzhiyun 	enum lvds_link_type link_type;
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun 
bridge_to_lvds(struct drm_bridge * b)53*4882a593Smuzhiyun static inline struct rk628_lvds *bridge_to_lvds(struct drm_bridge *b)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun 	return container_of(b, struct rk628_lvds, base);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun 
connector_to_lvds(struct drm_connector * c)58*4882a593Smuzhiyun static inline struct rk628_lvds *connector_to_lvds(struct drm_connector *c)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun 	return container_of(c, struct rk628_lvds, connector);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun 
rk628_lvds_get_format(u32 bus_format)63*4882a593Smuzhiyun static enum lvds_format rk628_lvds_get_format(u32 bus_format)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun 	switch (bus_format) {
66*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
67*4882a593Smuzhiyun 		return LVDS_FORMAT_JEIDA_24BIT;
68*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
69*4882a593Smuzhiyun 		return LVDS_FORMAT_VESA_18BIT;
70*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
71*4882a593Smuzhiyun 	default:
72*4882a593Smuzhiyun 		return LVDS_FORMAT_VESA_24BIT;
73*4882a593Smuzhiyun 	}
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun 
rk628_lvds_get_link_type(struct rk628_lvds * lvds)76*4882a593Smuzhiyun static enum lvds_link_type rk628_lvds_get_link_type(struct rk628_lvds *lvds)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun 	struct device *dev = lvds->dev;
79*4882a593Smuzhiyun 	const char *str;
80*4882a593Smuzhiyun 	int ret;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	ret = of_property_read_string(dev->of_node, "rockchip,link-type", &str);
83*4882a593Smuzhiyun 	if (ret < 0)
84*4882a593Smuzhiyun 		return LVDS_SINGLE_LINK;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	if (!strcmp(str, "dual-link-odd-even-pixels"))
87*4882a593Smuzhiyun 		return LVDS_DUAL_LINK_ODD_EVEN_PIXELS;
88*4882a593Smuzhiyun 	else if (!strcmp(str, "dual-link-even-odd-pixels"))
89*4882a593Smuzhiyun 		return LVDS_DUAL_LINK_EVEN_ODD_PIXELS;
90*4882a593Smuzhiyun 	else if (!strcmp(str, "dual-link-left-right-pixels"))
91*4882a593Smuzhiyun 		return LVDS_DUAL_LINK_LEFT_RIGHT_PIXELS;
92*4882a593Smuzhiyun 	else if (!strcmp(str, "dual-link-right-left-pixels"))
93*4882a593Smuzhiyun 		return LVDS_DUAL_LINK_RIGHT_LEFT_PIXELS;
94*4882a593Smuzhiyun 	else
95*4882a593Smuzhiyun 		return LVDS_SINGLE_LINK;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun static struct drm_encoder *
rk628_lvds_connector_best_encoder(struct drm_connector * connector)99*4882a593Smuzhiyun rk628_lvds_connector_best_encoder(struct drm_connector *connector)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	struct rk628_lvds *lvds = connector_to_lvds(connector);
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	return lvds->base.encoder;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun 
rk628_lvds_connector_get_modes(struct drm_connector * connector)106*4882a593Smuzhiyun static int rk628_lvds_connector_get_modes(struct drm_connector *connector)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun 	struct rk628_lvds *lvds = connector_to_lvds(connector);
109*4882a593Smuzhiyun 	struct drm_display_info *info = &connector->display_info;
110*4882a593Smuzhiyun 	int num_modes = 0;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	num_modes = drm_panel_get_modes(lvds->panel, connector);
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	if (info->num_bus_formats)
115*4882a593Smuzhiyun 		lvds->format = rk628_lvds_get_format(info->bus_formats[0]);
116*4882a593Smuzhiyun 	else
117*4882a593Smuzhiyun 		lvds->format = LVDS_FORMAT_VESA_24BIT;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	return num_modes;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun static const struct drm_connector_helper_funcs
123*4882a593Smuzhiyun rk628_lvds_connector_helper_funcs = {
124*4882a593Smuzhiyun 	.get_modes = rk628_lvds_connector_get_modes,
125*4882a593Smuzhiyun 	.best_encoder = rk628_lvds_connector_best_encoder,
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun 
rk628_lvds_connector_destroy(struct drm_connector * connector)128*4882a593Smuzhiyun static void rk628_lvds_connector_destroy(struct drm_connector *connector)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun 	drm_connector_cleanup(connector);
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun static const struct drm_connector_funcs rk628_lvds_connector_funcs = {
134*4882a593Smuzhiyun 	.fill_modes = drm_helper_probe_single_connector_modes,
135*4882a593Smuzhiyun 	.destroy = rk628_lvds_connector_destroy,
136*4882a593Smuzhiyun 	.reset = drm_atomic_helper_connector_reset,
137*4882a593Smuzhiyun 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
138*4882a593Smuzhiyun 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
139*4882a593Smuzhiyun };
140*4882a593Smuzhiyun 
rk628_lvds_bridge_enable(struct drm_bridge * bridge)141*4882a593Smuzhiyun static void rk628_lvds_bridge_enable(struct drm_bridge *bridge)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun 	struct rk628_lvds *lvds = bridge_to_lvds(bridge);
144*4882a593Smuzhiyun 	const struct drm_display_mode *mode = &lvds->mode;
145*4882a593Smuzhiyun 	u32 val, bus_width;
146*4882a593Smuzhiyun 	int ret;
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	regmap_update_bits(lvds->grf, GRF_SYSTEM_CON0, SW_OUTPUT_MODE_MASK,
149*4882a593Smuzhiyun 			   SW_OUTPUT_MODE(OUTPUT_MODE_LVDS));
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	switch (lvds->link_type) {
152*4882a593Smuzhiyun 	case LVDS_DUAL_LINK_ODD_EVEN_PIXELS:
153*4882a593Smuzhiyun 		val = SW_LVDS_CON_CHASEL(1) | SW_LVDS_CON_STARTSEL(0) |
154*4882a593Smuzhiyun 		      SW_LVDS_CON_DUAL_SEL(0);
155*4882a593Smuzhiyun 		bus_width = COMBTXPHY_MODULEA_EN | COMBTXPHY_MODULEB_EN;
156*4882a593Smuzhiyun 		break;
157*4882a593Smuzhiyun 	case LVDS_DUAL_LINK_EVEN_ODD_PIXELS:
158*4882a593Smuzhiyun 		val = SW_LVDS_CON_CHASEL(1) | SW_LVDS_CON_STARTSEL(1) |
159*4882a593Smuzhiyun 		      SW_LVDS_CON_DUAL_SEL(0);
160*4882a593Smuzhiyun 		bus_width = COMBTXPHY_MODULEA_EN | COMBTXPHY_MODULEB_EN;
161*4882a593Smuzhiyun 		break;
162*4882a593Smuzhiyun 	case LVDS_DUAL_LINK_LEFT_RIGHT_PIXELS:
163*4882a593Smuzhiyun 		val = SW_LVDS_CON_CHASEL(1) | SW_LVDS_CON_STARTSEL(0) |
164*4882a593Smuzhiyun 		      SW_LVDS_CON_DUAL_SEL(1);
165*4882a593Smuzhiyun 		regmap_update_bits(lvds->grf, GRF_POST_PROC_CON,
166*4882a593Smuzhiyun 				   SW_SPLIT_EN, SW_SPLIT_EN);
167*4882a593Smuzhiyun 		bus_width = COMBTXPHY_MODULEA_EN | COMBTXPHY_MODULEB_EN;
168*4882a593Smuzhiyun 		break;
169*4882a593Smuzhiyun 	case LVDS_DUAL_LINK_RIGHT_LEFT_PIXELS:
170*4882a593Smuzhiyun 		val = SW_LVDS_CON_CHASEL(1) | SW_LVDS_CON_STARTSEL(1) |
171*4882a593Smuzhiyun 		      SW_LVDS_CON_DUAL_SEL(1);
172*4882a593Smuzhiyun 		regmap_update_bits(lvds->grf, GRF_POST_PROC_CON,
173*4882a593Smuzhiyun 				   SW_SPLIT_EN, SW_SPLIT_EN);
174*4882a593Smuzhiyun 		bus_width = COMBTXPHY_MODULEA_EN | COMBTXPHY_MODULEB_EN;
175*4882a593Smuzhiyun 		break;
176*4882a593Smuzhiyun 	case LVDS_SINGLE_LINK:
177*4882a593Smuzhiyun 	default:
178*4882a593Smuzhiyun 		val = SW_LVDS_CON_CHASEL(0) | SW_LVDS_CON_STARTSEL(0) |
179*4882a593Smuzhiyun 		      SW_LVDS_CON_DUAL_SEL(0);
180*4882a593Smuzhiyun 		bus_width = COMBTXPHY_MODULEA_EN;
181*4882a593Smuzhiyun 		break;
182*4882a593Smuzhiyun 	}
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	val |= SW_LVDS_CON_SELECT(lvds->format) |
185*4882a593Smuzhiyun 	       SW_LVDS_CON_MSBSEL(0) |
186*4882a593Smuzhiyun 	       SW_LVDS_CON_CLKINV(0);
187*4882a593Smuzhiyun 	regmap_write(lvds->grf, GRF_LVDS_TX_CON, val);
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	bus_width |= (mode->clock / 1000) << 8;
190*4882a593Smuzhiyun 	phy_set_bus_width(lvds->phy, bus_width);
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	ret = phy_set_mode(lvds->phy, PHY_MODE_LVDS);
193*4882a593Smuzhiyun 	if (ret) {
194*4882a593Smuzhiyun 		dev_err(lvds->dev, "failed to set phy mode: %d\n", ret);
195*4882a593Smuzhiyun 		return;
196*4882a593Smuzhiyun 	}
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	phy_power_on(lvds->phy);
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	drm_panel_prepare(lvds->panel);
201*4882a593Smuzhiyun 	drm_panel_enable(lvds->panel);
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun 
rk628_lvds_bridge_disable(struct drm_bridge * bridge)204*4882a593Smuzhiyun static void rk628_lvds_bridge_disable(struct drm_bridge *bridge)
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun 	struct rk628_lvds *lvds = bridge_to_lvds(bridge);
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	drm_panel_disable(lvds->panel);
209*4882a593Smuzhiyun 	drm_panel_unprepare(lvds->panel);
210*4882a593Smuzhiyun 	phy_power_off(lvds->phy);
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun 
rk628_lvds_bridge_attach(struct drm_bridge * bridge,enum drm_bridge_attach_flags flags)213*4882a593Smuzhiyun static int rk628_lvds_bridge_attach(struct drm_bridge *bridge,
214*4882a593Smuzhiyun 				    enum drm_bridge_attach_flags flags)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun 	struct rk628_lvds *lvds = bridge_to_lvds(bridge);
217*4882a593Smuzhiyun 	struct drm_connector *connector = &lvds->connector;
218*4882a593Smuzhiyun 	struct drm_device *drm = bridge->dev;
219*4882a593Smuzhiyun 	int ret;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)
222*4882a593Smuzhiyun 		return 0;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	ret = drm_connector_init(drm, connector, &rk628_lvds_connector_funcs,
225*4882a593Smuzhiyun 				 DRM_MODE_CONNECTOR_LVDS);
226*4882a593Smuzhiyun 	if (ret) {
227*4882a593Smuzhiyun 		dev_err(lvds->dev, "Failed to initialize connector with drm\n");
228*4882a593Smuzhiyun 		return ret;
229*4882a593Smuzhiyun 	}
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	drm_connector_helper_add(connector, &rk628_lvds_connector_helper_funcs);
232*4882a593Smuzhiyun 	drm_connector_attach_encoder(connector, bridge->encoder);
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	return 0;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun 
rk628_lvds_bridge_mode_set(struct drm_bridge * bridge,const struct drm_display_mode * mode,const struct drm_display_mode * adj)237*4882a593Smuzhiyun static void rk628_lvds_bridge_mode_set(struct drm_bridge *bridge,
238*4882a593Smuzhiyun 				       const struct drm_display_mode *mode,
239*4882a593Smuzhiyun 				       const struct drm_display_mode *adj)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun 	struct rk628_lvds *lvds = bridge_to_lvds(bridge);
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	drm_mode_copy(&lvds->mode, mode);
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun static const struct drm_bridge_funcs rk628_lvds_bridge_funcs = {
247*4882a593Smuzhiyun 	.attach = rk628_lvds_bridge_attach,
248*4882a593Smuzhiyun 	.enable = rk628_lvds_bridge_enable,
249*4882a593Smuzhiyun 	.disable = rk628_lvds_bridge_disable,
250*4882a593Smuzhiyun 	.mode_set = rk628_lvds_bridge_mode_set,
251*4882a593Smuzhiyun };
252*4882a593Smuzhiyun 
rk628_lvds_probe(struct platform_device * pdev)253*4882a593Smuzhiyun static int rk628_lvds_probe(struct platform_device *pdev)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun 	struct rk628 *rk628 = dev_get_drvdata(pdev->dev.parent);
256*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
257*4882a593Smuzhiyun 	struct rk628_lvds *lvds;
258*4882a593Smuzhiyun 	int ret;
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	if (!of_device_is_available(dev->of_node))
261*4882a593Smuzhiyun 		return -ENODEV;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	lvds = devm_kzalloc(dev, sizeof(*lvds), GFP_KERNEL);
264*4882a593Smuzhiyun 	if (!lvds)
265*4882a593Smuzhiyun 		return -ENOMEM;
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	ret = drm_of_find_panel_or_bridge(dev->of_node, 1, -1,
268*4882a593Smuzhiyun 					  &lvds->panel, NULL);
269*4882a593Smuzhiyun 	if (ret)
270*4882a593Smuzhiyun 		return ret;
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	lvds->dev = dev;
273*4882a593Smuzhiyun 	lvds->parent = rk628;
274*4882a593Smuzhiyun 	lvds->grf = rk628->grf;
275*4882a593Smuzhiyun 	lvds->link_type = rk628_lvds_get_link_type(lvds);
276*4882a593Smuzhiyun 	platform_set_drvdata(pdev, lvds);
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	lvds->phy = devm_of_phy_get(dev, dev->of_node, NULL);
279*4882a593Smuzhiyun 	if (IS_ERR(lvds->phy)) {
280*4882a593Smuzhiyun 		ret = PTR_ERR(lvds->phy);
281*4882a593Smuzhiyun 		dev_err(dev, "failed to get phy: %d\n", ret);
282*4882a593Smuzhiyun 		return ret;
283*4882a593Smuzhiyun 	}
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	lvds->base.funcs = &rk628_lvds_bridge_funcs;
286*4882a593Smuzhiyun 	lvds->base.of_node = dev->of_node;
287*4882a593Smuzhiyun 	drm_bridge_add(&lvds->base);
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	return 0;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun 
rk628_lvds_remove(struct platform_device * pdev)292*4882a593Smuzhiyun static int rk628_lvds_remove(struct platform_device *pdev)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	struct rk628_lvds *lvds = platform_get_drvdata(pdev);
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	drm_bridge_remove(&lvds->base);
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	return 0;
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun static const struct of_device_id rk628_lvds_of_match[] = {
302*4882a593Smuzhiyun 	{ .compatible = "rockchip,rk628-lvds", },
303*4882a593Smuzhiyun 	{},
304*4882a593Smuzhiyun };
305*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, rk628_lvds_of_match);
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun static struct platform_driver rk628_lvds_driver = {
308*4882a593Smuzhiyun 	.driver = {
309*4882a593Smuzhiyun 		.name = "rk628-lvds",
310*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(rk628_lvds_of_match),
311*4882a593Smuzhiyun 	},
312*4882a593Smuzhiyun 	.probe = rk628_lvds_probe,
313*4882a593Smuzhiyun 	.remove = rk628_lvds_remove,
314*4882a593Smuzhiyun };
315*4882a593Smuzhiyun module_platform_driver(rk628_lvds_driver);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun MODULE_AUTHOR("Wyon Bi <bivvy.bi@rock-chips.com>");
318*4882a593Smuzhiyun MODULE_DESCRIPTION("Rockchip RK628 LVDS driver");
319*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
320