1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2013 Advanced Micro Devices, Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun *
22*4882a593Smuzhiyun * Authors: Christian König <christian.koenig@amd.com>
23*4882a593Smuzhiyun */
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include <linux/firmware.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #include "radeon.h"
28*4882a593Smuzhiyun #include "radeon_asic.h"
29*4882a593Smuzhiyun #include "cikd.h"
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /**
32*4882a593Smuzhiyun * uvd_v4_2_resume - memory controller programming
33*4882a593Smuzhiyun *
34*4882a593Smuzhiyun * @rdev: radeon_device pointer
35*4882a593Smuzhiyun *
36*4882a593Smuzhiyun * Let the UVD memory controller know it's offsets
37*4882a593Smuzhiyun */
uvd_v4_2_resume(struct radeon_device * rdev)38*4882a593Smuzhiyun int uvd_v4_2_resume(struct radeon_device *rdev)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun uint64_t addr;
41*4882a593Smuzhiyun uint32_t size;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /* program the VCPU memory controller bits 0-27 */
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /* skip over the header of the new firmware format */
46*4882a593Smuzhiyun if (rdev->uvd.fw_header_present)
47*4882a593Smuzhiyun addr = (rdev->uvd.gpu_addr + 0x200) >> 3;
48*4882a593Smuzhiyun else
49*4882a593Smuzhiyun addr = rdev->uvd.gpu_addr >> 3;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 4) >> 3;
52*4882a593Smuzhiyun WREG32(UVD_VCPU_CACHE_OFFSET0, addr);
53*4882a593Smuzhiyun WREG32(UVD_VCPU_CACHE_SIZE0, size);
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun addr += size;
56*4882a593Smuzhiyun size = RADEON_UVD_HEAP_SIZE >> 3;
57*4882a593Smuzhiyun WREG32(UVD_VCPU_CACHE_OFFSET1, addr);
58*4882a593Smuzhiyun WREG32(UVD_VCPU_CACHE_SIZE1, size);
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun addr += size;
61*4882a593Smuzhiyun size = (RADEON_UVD_STACK_SIZE +
62*4882a593Smuzhiyun (RADEON_UVD_SESSION_SIZE * rdev->uvd.max_handles)) >> 3;
63*4882a593Smuzhiyun WREG32(UVD_VCPU_CACHE_OFFSET2, addr);
64*4882a593Smuzhiyun WREG32(UVD_VCPU_CACHE_SIZE2, size);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /* bits 28-31 */
67*4882a593Smuzhiyun addr = (rdev->uvd.gpu_addr >> 28) & 0xF;
68*4882a593Smuzhiyun WREG32(UVD_LMI_ADDR_EXT, (addr << 12) | (addr << 0));
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun /* bits 32-39 */
71*4882a593Smuzhiyun addr = (rdev->uvd.gpu_addr >> 32) & 0xFF;
72*4882a593Smuzhiyun WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31));
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun if (rdev->uvd.fw_header_present)
75*4882a593Smuzhiyun WREG32(UVD_GP_SCRATCH4, rdev->uvd.max_handles);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun return 0;
78*4882a593Smuzhiyun }
79