xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/trinity_smc.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2012 Advanced Micro Devices, Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun  * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*4882a593Smuzhiyun  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4882a593Smuzhiyun  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4882a593Smuzhiyun  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4882a593Smuzhiyun  * OTHER DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  */
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #include "radeon.h"
25*4882a593Smuzhiyun #include "trinityd.h"
26*4882a593Smuzhiyun #include "trinity_dpm.h"
27*4882a593Smuzhiyun #include "ppsmc.h"
28*4882a593Smuzhiyun 
trinity_notify_message_to_smu(struct radeon_device * rdev,u32 id)29*4882a593Smuzhiyun static int trinity_notify_message_to_smu(struct radeon_device *rdev, u32 id)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun 	int i;
32*4882a593Smuzhiyun 	u32 v = 0;
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 	WREG32(SMC_MESSAGE_0, id);
35*4882a593Smuzhiyun 	for (i = 0; i < rdev->usec_timeout; i++) {
36*4882a593Smuzhiyun 		if (RREG32(SMC_RESP_0) != 0)
37*4882a593Smuzhiyun 			break;
38*4882a593Smuzhiyun 		udelay(1);
39*4882a593Smuzhiyun 	}
40*4882a593Smuzhiyun 	v = RREG32(SMC_RESP_0);
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	if (v != 1) {
43*4882a593Smuzhiyun 		if (v == 0xFF) {
44*4882a593Smuzhiyun 			DRM_ERROR("SMC failed to handle the message!\n");
45*4882a593Smuzhiyun 			return -EINVAL;
46*4882a593Smuzhiyun 		} else if (v == 0xFE) {
47*4882a593Smuzhiyun 			DRM_ERROR("Unknown SMC message!\n");
48*4882a593Smuzhiyun 			return -EINVAL;
49*4882a593Smuzhiyun 		}
50*4882a593Smuzhiyun 	}
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	return 0;
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun 
trinity_dpm_bapm_enable(struct radeon_device * rdev,bool enable)55*4882a593Smuzhiyun int trinity_dpm_bapm_enable(struct radeon_device *rdev, bool enable)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun 	if (enable)
58*4882a593Smuzhiyun 		return trinity_notify_message_to_smu(rdev, PPSMC_MSG_EnableBAPM);
59*4882a593Smuzhiyun 	else
60*4882a593Smuzhiyun 		return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DisableBAPM);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun 
trinity_dpm_config(struct radeon_device * rdev,bool enable)63*4882a593Smuzhiyun int trinity_dpm_config(struct radeon_device *rdev, bool enable)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun 	if (enable)
66*4882a593Smuzhiyun 		WREG32_SMC(SMU_SCRATCH0, 1);
67*4882a593Smuzhiyun 	else
68*4882a593Smuzhiyun 		WREG32_SMC(SMU_SCRATCH0, 0);
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DPM_Config);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun 
trinity_dpm_force_state(struct radeon_device * rdev,u32 n)73*4882a593Smuzhiyun int trinity_dpm_force_state(struct radeon_device *rdev, u32 n)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun 	WREG32_SMC(SMU_SCRATCH0, n);
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DPM_ForceState);
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun 
trinity_dpm_n_levels_disabled(struct radeon_device * rdev,u32 n)80*4882a593Smuzhiyun int trinity_dpm_n_levels_disabled(struct radeon_device *rdev, u32 n)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	WREG32_SMC(SMU_SCRATCH0, n);
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DPM_N_LevelsDisabled);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun 
trinity_uvd_dpm_config(struct radeon_device * rdev)87*4882a593Smuzhiyun int trinity_uvd_dpm_config(struct radeon_device *rdev)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun 	return trinity_notify_message_to_smu(rdev, PPSMC_MSG_UVD_DPM_Config);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun 
trinity_dpm_no_forced_level(struct radeon_device * rdev)92*4882a593Smuzhiyun int trinity_dpm_no_forced_level(struct radeon_device *rdev)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	return trinity_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun 
trinity_dce_enable_voltage_adjustment(struct radeon_device * rdev,bool enable)97*4882a593Smuzhiyun int trinity_dce_enable_voltage_adjustment(struct radeon_device *rdev,
98*4882a593Smuzhiyun 					  bool enable)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun 	if (enable)
101*4882a593Smuzhiyun 		return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DCE_AllowVoltageAdjustment);
102*4882a593Smuzhiyun 	else
103*4882a593Smuzhiyun 		return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DCE_RemoveVoltageAdjustment);
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun 
trinity_gfx_dynamic_mgpg_config(struct radeon_device * rdev)106*4882a593Smuzhiyun int trinity_gfx_dynamic_mgpg_config(struct radeon_device *rdev)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun 	return trinity_notify_message_to_smu(rdev, PPSMC_MSG_PG_SIMD_Config);
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun 
trinity_acquire_mutex(struct radeon_device * rdev)111*4882a593Smuzhiyun void trinity_acquire_mutex(struct radeon_device *rdev)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun 	int i;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	WREG32(SMC_INT_REQ, 1);
116*4882a593Smuzhiyun 	for (i = 0; i < rdev->usec_timeout; i++) {
117*4882a593Smuzhiyun 		if ((RREG32(SMC_INT_REQ) & 0xffff) == 1)
118*4882a593Smuzhiyun 			break;
119*4882a593Smuzhiyun 		udelay(1);
120*4882a593Smuzhiyun 	}
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun 
trinity_release_mutex(struct radeon_device * rdev)123*4882a593Smuzhiyun void trinity_release_mutex(struct radeon_device *rdev)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun 	WREG32(SMC_INT_REQ, 0);
126*4882a593Smuzhiyun }
127