xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/radeon_trace.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: MIT */
2*4882a593Smuzhiyun #if !defined(_RADEON_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
3*4882a593Smuzhiyun #define _RADEON_TRACE_H_
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun #include <linux/stringify.h>
6*4882a593Smuzhiyun #include <linux/tracepoint.h>
7*4882a593Smuzhiyun #include <linux/types.h>
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <drm/drm_file.h>
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #undef TRACE_SYSTEM
12*4882a593Smuzhiyun #define TRACE_SYSTEM radeon
13*4882a593Smuzhiyun #define TRACE_INCLUDE_FILE radeon_trace
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun TRACE_EVENT(radeon_bo_create,
16*4882a593Smuzhiyun 	    TP_PROTO(struct radeon_bo *bo),
17*4882a593Smuzhiyun 	    TP_ARGS(bo),
18*4882a593Smuzhiyun 	    TP_STRUCT__entry(
19*4882a593Smuzhiyun 			     __field(struct radeon_bo *, bo)
20*4882a593Smuzhiyun 			     __field(u32, pages)
21*4882a593Smuzhiyun 			     ),
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun 	    TP_fast_assign(
24*4882a593Smuzhiyun 			   __entry->bo = bo;
25*4882a593Smuzhiyun 			   __entry->pages = bo->tbo.num_pages;
26*4882a593Smuzhiyun 			   ),
27*4882a593Smuzhiyun 	    TP_printk("bo=%p, pages=%u", __entry->bo, __entry->pages)
28*4882a593Smuzhiyun );
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun TRACE_EVENT(radeon_cs,
31*4882a593Smuzhiyun 	    TP_PROTO(struct radeon_cs_parser *p),
32*4882a593Smuzhiyun 	    TP_ARGS(p),
33*4882a593Smuzhiyun 	    TP_STRUCT__entry(
34*4882a593Smuzhiyun 			     __field(u32, ring)
35*4882a593Smuzhiyun 			     __field(u32, dw)
36*4882a593Smuzhiyun 			     __field(u32, fences)
37*4882a593Smuzhiyun 			     ),
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	    TP_fast_assign(
40*4882a593Smuzhiyun 			   __entry->ring = p->ring;
41*4882a593Smuzhiyun 			   __entry->dw = p->chunk_ib->length_dw;
42*4882a593Smuzhiyun 			   __entry->fences = radeon_fence_count_emitted(
43*4882a593Smuzhiyun 				p->rdev, p->ring);
44*4882a593Smuzhiyun 			   ),
45*4882a593Smuzhiyun 	    TP_printk("ring=%u, dw=%u, fences=%u",
46*4882a593Smuzhiyun 		      __entry->ring, __entry->dw,
47*4882a593Smuzhiyun 		      __entry->fences)
48*4882a593Smuzhiyun );
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun TRACE_EVENT(radeon_vm_grab_id,
51*4882a593Smuzhiyun 	    TP_PROTO(unsigned vmid, int ring),
52*4882a593Smuzhiyun 	    TP_ARGS(vmid, ring),
53*4882a593Smuzhiyun 	    TP_STRUCT__entry(
54*4882a593Smuzhiyun 			     __field(u32, vmid)
55*4882a593Smuzhiyun 			     __field(u32, ring)
56*4882a593Smuzhiyun 			     ),
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	    TP_fast_assign(
59*4882a593Smuzhiyun 			   __entry->vmid = vmid;
60*4882a593Smuzhiyun 			   __entry->ring = ring;
61*4882a593Smuzhiyun 			   ),
62*4882a593Smuzhiyun 	    TP_printk("vmid=%u, ring=%u", __entry->vmid, __entry->ring)
63*4882a593Smuzhiyun );
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun TRACE_EVENT(radeon_vm_bo_update,
66*4882a593Smuzhiyun 	    TP_PROTO(struct radeon_bo_va *bo_va),
67*4882a593Smuzhiyun 	    TP_ARGS(bo_va),
68*4882a593Smuzhiyun 	    TP_STRUCT__entry(
69*4882a593Smuzhiyun 			     __field(u64, soffset)
70*4882a593Smuzhiyun 			     __field(u64, eoffset)
71*4882a593Smuzhiyun 			     __field(u32, flags)
72*4882a593Smuzhiyun 			     ),
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	    TP_fast_assign(
75*4882a593Smuzhiyun 			   __entry->soffset = bo_va->it.start;
76*4882a593Smuzhiyun 			   __entry->eoffset = bo_va->it.last + 1;
77*4882a593Smuzhiyun 			   __entry->flags = bo_va->flags;
78*4882a593Smuzhiyun 			   ),
79*4882a593Smuzhiyun 	    TP_printk("soffs=%010llx, eoffs=%010llx, flags=%08x",
80*4882a593Smuzhiyun 		      __entry->soffset, __entry->eoffset, __entry->flags)
81*4882a593Smuzhiyun );
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun TRACE_EVENT(radeon_vm_set_page,
84*4882a593Smuzhiyun 	    TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
85*4882a593Smuzhiyun 		     uint32_t incr, uint32_t flags),
86*4882a593Smuzhiyun 	    TP_ARGS(pe, addr, count, incr, flags),
87*4882a593Smuzhiyun 	    TP_STRUCT__entry(
88*4882a593Smuzhiyun 			     __field(u64, pe)
89*4882a593Smuzhiyun 			     __field(u64, addr)
90*4882a593Smuzhiyun 			     __field(u32, count)
91*4882a593Smuzhiyun 			     __field(u32, incr)
92*4882a593Smuzhiyun 			     __field(u32, flags)
93*4882a593Smuzhiyun 			     ),
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	    TP_fast_assign(
96*4882a593Smuzhiyun 			   __entry->pe = pe;
97*4882a593Smuzhiyun 			   __entry->addr = addr;
98*4882a593Smuzhiyun 			   __entry->count = count;
99*4882a593Smuzhiyun 			   __entry->incr = incr;
100*4882a593Smuzhiyun 			   __entry->flags = flags;
101*4882a593Smuzhiyun 			   ),
102*4882a593Smuzhiyun 	    TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%08x, count=%u",
103*4882a593Smuzhiyun 		      __entry->pe, __entry->addr, __entry->incr,
104*4882a593Smuzhiyun 		      __entry->flags, __entry->count)
105*4882a593Smuzhiyun );
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun TRACE_EVENT(radeon_vm_flush,
108*4882a593Smuzhiyun 	    TP_PROTO(uint64_t pd_addr, unsigned ring, unsigned id),
109*4882a593Smuzhiyun 	    TP_ARGS(pd_addr, ring, id),
110*4882a593Smuzhiyun 	    TP_STRUCT__entry(
111*4882a593Smuzhiyun 			     __field(u64, pd_addr)
112*4882a593Smuzhiyun 			     __field(u32, ring)
113*4882a593Smuzhiyun 			     __field(u32, id)
114*4882a593Smuzhiyun 			     ),
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	    TP_fast_assign(
117*4882a593Smuzhiyun 			   __entry->pd_addr = pd_addr;
118*4882a593Smuzhiyun 			   __entry->ring = ring;
119*4882a593Smuzhiyun 			   __entry->id = id;
120*4882a593Smuzhiyun 			   ),
121*4882a593Smuzhiyun 	    TP_printk("pd_addr=%010Lx, ring=%u, id=%u",
122*4882a593Smuzhiyun 		      __entry->pd_addr, __entry->ring, __entry->id)
123*4882a593Smuzhiyun );
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun DECLARE_EVENT_CLASS(radeon_fence_request,
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	    TP_PROTO(struct drm_device *dev, int ring, u32 seqno),
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	    TP_ARGS(dev, ring, seqno),
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	    TP_STRUCT__entry(
132*4882a593Smuzhiyun 			     __field(u32, dev)
133*4882a593Smuzhiyun 			     __field(int, ring)
134*4882a593Smuzhiyun 			     __field(u32, seqno)
135*4882a593Smuzhiyun 			     ),
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	    TP_fast_assign(
138*4882a593Smuzhiyun 			   __entry->dev = dev->primary->index;
139*4882a593Smuzhiyun 			   __entry->ring = ring;
140*4882a593Smuzhiyun 			   __entry->seqno = seqno;
141*4882a593Smuzhiyun 			   ),
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	    TP_printk("dev=%u, ring=%d, seqno=%u",
144*4882a593Smuzhiyun 		      __entry->dev, __entry->ring, __entry->seqno)
145*4882a593Smuzhiyun );
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun DEFINE_EVENT(radeon_fence_request, radeon_fence_emit,
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	    TP_PROTO(struct drm_device *dev, int ring, u32 seqno),
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	    TP_ARGS(dev, ring, seqno)
152*4882a593Smuzhiyun );
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun DEFINE_EVENT(radeon_fence_request, radeon_fence_wait_begin,
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	    TP_PROTO(struct drm_device *dev, int ring, u32 seqno),
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	    TP_ARGS(dev, ring, seqno)
159*4882a593Smuzhiyun );
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun DEFINE_EVENT(radeon_fence_request, radeon_fence_wait_end,
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	    TP_PROTO(struct drm_device *dev, int ring, u32 seqno),
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	    TP_ARGS(dev, ring, seqno)
166*4882a593Smuzhiyun );
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun DECLARE_EVENT_CLASS(radeon_semaphore_request,
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	    TP_PROTO(int ring, struct radeon_semaphore *sem),
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	    TP_ARGS(ring, sem),
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	    TP_STRUCT__entry(
175*4882a593Smuzhiyun 			     __field(int, ring)
176*4882a593Smuzhiyun 			     __field(signed, waiters)
177*4882a593Smuzhiyun 			     __field(uint64_t, gpu_addr)
178*4882a593Smuzhiyun 			     ),
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	    TP_fast_assign(
181*4882a593Smuzhiyun 			   __entry->ring = ring;
182*4882a593Smuzhiyun 			   __entry->waiters = sem->waiters;
183*4882a593Smuzhiyun 			   __entry->gpu_addr = sem->gpu_addr;
184*4882a593Smuzhiyun 			   ),
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	    TP_printk("ring=%u, waiters=%d, addr=%010Lx", __entry->ring,
187*4882a593Smuzhiyun 		      __entry->waiters, __entry->gpu_addr)
188*4882a593Smuzhiyun );
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun DEFINE_EVENT(radeon_semaphore_request, radeon_semaphore_signale,
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	    TP_PROTO(int ring, struct radeon_semaphore *sem),
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	    TP_ARGS(ring, sem)
195*4882a593Smuzhiyun );
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun DEFINE_EVENT(radeon_semaphore_request, radeon_semaphore_wait,
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	    TP_PROTO(int ring, struct radeon_semaphore *sem),
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	    TP_ARGS(ring, sem)
202*4882a593Smuzhiyun );
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun #endif
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun /* This part must be outside protection */
207*4882a593Smuzhiyun #undef TRACE_INCLUDE_PATH
208*4882a593Smuzhiyun #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/radeon
209*4882a593Smuzhiyun #include <trace/define_trace.h>
210