xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/radeon_irq_kms.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2008 Advanced Micro Devices, Inc.
3*4882a593Smuzhiyun  * Copyright 2008 Red Hat Inc.
4*4882a593Smuzhiyun  * Copyright 2009 Jerome Glisse.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
7*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
8*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
9*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
11*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * The above copyright notice and this permission notice shall be included in
14*4882a593Smuzhiyun  * all copies or substantial portions of the Software.
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19*4882a593Smuzhiyun  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20*4882a593Smuzhiyun  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21*4882a593Smuzhiyun  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22*4882a593Smuzhiyun  * OTHER DEALINGS IN THE SOFTWARE.
23*4882a593Smuzhiyun  *
24*4882a593Smuzhiyun  * Authors: Dave Airlie
25*4882a593Smuzhiyun  *          Alex Deucher
26*4882a593Smuzhiyun  *          Jerome Glisse
27*4882a593Smuzhiyun  */
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #include <linux/pci.h>
30*4882a593Smuzhiyun #include <linux/pm_runtime.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #include <drm/drm_crtc_helper.h>
33*4882a593Smuzhiyun #include <drm/drm_device.h>
34*4882a593Smuzhiyun #include <drm/drm_irq.h>
35*4882a593Smuzhiyun #include <drm/drm_probe_helper.h>
36*4882a593Smuzhiyun #include <drm/drm_vblank.h>
37*4882a593Smuzhiyun #include <drm/radeon_drm.h>
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #include "atom.h"
40*4882a593Smuzhiyun #include "radeon.h"
41*4882a593Smuzhiyun #include "radeon_reg.h"
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define RADEON_WAIT_IDLE_TIMEOUT 200
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun /**
47*4882a593Smuzhiyun  * radeon_driver_irq_handler_kms - irq handler for KMS
48*4882a593Smuzhiyun  *
49*4882a593Smuzhiyun  * @int irq, void *arg: args
50*4882a593Smuzhiyun  *
51*4882a593Smuzhiyun  * This is the irq handler for the radeon KMS driver (all asics).
52*4882a593Smuzhiyun  * radeon_irq_process is a macro that points to the per-asic
53*4882a593Smuzhiyun  * irq handler callback.
54*4882a593Smuzhiyun  */
radeon_driver_irq_handler_kms(int irq,void * arg)55*4882a593Smuzhiyun irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun 	struct drm_device *dev = (struct drm_device *) arg;
58*4882a593Smuzhiyun 	struct radeon_device *rdev = dev->dev_private;
59*4882a593Smuzhiyun 	irqreturn_t ret;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	ret = radeon_irq_process(rdev);
62*4882a593Smuzhiyun 	if (ret == IRQ_HANDLED)
63*4882a593Smuzhiyun 		pm_runtime_mark_last_busy(dev->dev);
64*4882a593Smuzhiyun 	return ret;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun /*
68*4882a593Smuzhiyun  * Handle hotplug events outside the interrupt handler proper.
69*4882a593Smuzhiyun  */
70*4882a593Smuzhiyun /**
71*4882a593Smuzhiyun  * radeon_hotplug_work_func - display hotplug work handler
72*4882a593Smuzhiyun  *
73*4882a593Smuzhiyun  * @work: work struct
74*4882a593Smuzhiyun  *
75*4882a593Smuzhiyun  * This is the hot plug event work handler (all asics).
76*4882a593Smuzhiyun  * The work gets scheduled from the irq handler if there
77*4882a593Smuzhiyun  * was a hot plug interrupt.  It walks the connector table
78*4882a593Smuzhiyun  * and calls the hotplug handler for each one, then sends
79*4882a593Smuzhiyun  * a drm hotplug event to alert userspace.
80*4882a593Smuzhiyun  */
radeon_hotplug_work_func(struct work_struct * work)81*4882a593Smuzhiyun static void radeon_hotplug_work_func(struct work_struct *work)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	struct radeon_device *rdev = container_of(work, struct radeon_device,
84*4882a593Smuzhiyun 						  hotplug_work.work);
85*4882a593Smuzhiyun 	struct drm_device *dev = rdev->ddev;
86*4882a593Smuzhiyun 	struct drm_mode_config *mode_config = &dev->mode_config;
87*4882a593Smuzhiyun 	struct drm_connector *connector;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	/* we can race here at startup, some boards seem to trigger
90*4882a593Smuzhiyun 	 * hotplug irqs when they shouldn't. */
91*4882a593Smuzhiyun 	if (!rdev->mode_info.mode_config_initialized)
92*4882a593Smuzhiyun 		return;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	mutex_lock(&mode_config->mutex);
95*4882a593Smuzhiyun 	list_for_each_entry(connector, &mode_config->connector_list, head)
96*4882a593Smuzhiyun 		radeon_connector_hotplug(connector);
97*4882a593Smuzhiyun 	mutex_unlock(&mode_config->mutex);
98*4882a593Smuzhiyun 	/* Just fire off a uevent and let userspace tell us what to do */
99*4882a593Smuzhiyun 	drm_helper_hpd_irq_event(dev);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun 
radeon_dp_work_func(struct work_struct * work)102*4882a593Smuzhiyun static void radeon_dp_work_func(struct work_struct *work)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun 	struct radeon_device *rdev = container_of(work, struct radeon_device,
105*4882a593Smuzhiyun 						  dp_work);
106*4882a593Smuzhiyun 	struct drm_device *dev = rdev->ddev;
107*4882a593Smuzhiyun 	struct drm_mode_config *mode_config = &dev->mode_config;
108*4882a593Smuzhiyun 	struct drm_connector *connector;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	/* this should take a mutex */
111*4882a593Smuzhiyun 	list_for_each_entry(connector, &mode_config->connector_list, head)
112*4882a593Smuzhiyun 		radeon_connector_hotplug(connector);
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun /**
115*4882a593Smuzhiyun  * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
116*4882a593Smuzhiyun  *
117*4882a593Smuzhiyun  * @dev: drm dev pointer
118*4882a593Smuzhiyun  *
119*4882a593Smuzhiyun  * Gets the hw ready to enable irqs (all asics).
120*4882a593Smuzhiyun  * This function disables all interrupt sources on the GPU.
121*4882a593Smuzhiyun  */
radeon_driver_irq_preinstall_kms(struct drm_device * dev)122*4882a593Smuzhiyun void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun 	struct radeon_device *rdev = dev->dev_private;
125*4882a593Smuzhiyun 	unsigned long irqflags;
126*4882a593Smuzhiyun 	unsigned i;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	spin_lock_irqsave(&rdev->irq.lock, irqflags);
129*4882a593Smuzhiyun 	/* Disable *all* interrupts */
130*4882a593Smuzhiyun 	for (i = 0; i < RADEON_NUM_RINGS; i++)
131*4882a593Smuzhiyun 		atomic_set(&rdev->irq.ring_int[i], 0);
132*4882a593Smuzhiyun 	rdev->irq.dpm_thermal = false;
133*4882a593Smuzhiyun 	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
134*4882a593Smuzhiyun 		rdev->irq.hpd[i] = false;
135*4882a593Smuzhiyun 	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
136*4882a593Smuzhiyun 		rdev->irq.crtc_vblank_int[i] = false;
137*4882a593Smuzhiyun 		atomic_set(&rdev->irq.pflip[i], 0);
138*4882a593Smuzhiyun 		rdev->irq.afmt[i] = false;
139*4882a593Smuzhiyun 	}
140*4882a593Smuzhiyun 	radeon_irq_set(rdev);
141*4882a593Smuzhiyun 	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
142*4882a593Smuzhiyun 	/* Clear bits */
143*4882a593Smuzhiyun 	radeon_irq_process(rdev);
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun /**
147*4882a593Smuzhiyun  * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
148*4882a593Smuzhiyun  *
149*4882a593Smuzhiyun  * @dev: drm dev pointer
150*4882a593Smuzhiyun  *
151*4882a593Smuzhiyun  * Handles stuff to be done after enabling irqs (all asics).
152*4882a593Smuzhiyun  * Returns 0 on success.
153*4882a593Smuzhiyun  */
radeon_driver_irq_postinstall_kms(struct drm_device * dev)154*4882a593Smuzhiyun int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun 	struct radeon_device *rdev = dev->dev_private;
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	if (ASIC_IS_AVIVO(rdev))
159*4882a593Smuzhiyun 		dev->max_vblank_count = 0x00ffffff;
160*4882a593Smuzhiyun 	else
161*4882a593Smuzhiyun 		dev->max_vblank_count = 0x001fffff;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	return 0;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun /**
167*4882a593Smuzhiyun  * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
168*4882a593Smuzhiyun  *
169*4882a593Smuzhiyun  * @dev: drm dev pointer
170*4882a593Smuzhiyun  *
171*4882a593Smuzhiyun  * This function disables all interrupt sources on the GPU (all asics).
172*4882a593Smuzhiyun  */
radeon_driver_irq_uninstall_kms(struct drm_device * dev)173*4882a593Smuzhiyun void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	struct radeon_device *rdev = dev->dev_private;
176*4882a593Smuzhiyun 	unsigned long irqflags;
177*4882a593Smuzhiyun 	unsigned i;
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	if (rdev == NULL) {
180*4882a593Smuzhiyun 		return;
181*4882a593Smuzhiyun 	}
182*4882a593Smuzhiyun 	spin_lock_irqsave(&rdev->irq.lock, irqflags);
183*4882a593Smuzhiyun 	/* Disable *all* interrupts */
184*4882a593Smuzhiyun 	for (i = 0; i < RADEON_NUM_RINGS; i++)
185*4882a593Smuzhiyun 		atomic_set(&rdev->irq.ring_int[i], 0);
186*4882a593Smuzhiyun 	rdev->irq.dpm_thermal = false;
187*4882a593Smuzhiyun 	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
188*4882a593Smuzhiyun 		rdev->irq.hpd[i] = false;
189*4882a593Smuzhiyun 	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
190*4882a593Smuzhiyun 		rdev->irq.crtc_vblank_int[i] = false;
191*4882a593Smuzhiyun 		atomic_set(&rdev->irq.pflip[i], 0);
192*4882a593Smuzhiyun 		rdev->irq.afmt[i] = false;
193*4882a593Smuzhiyun 	}
194*4882a593Smuzhiyun 	radeon_irq_set(rdev);
195*4882a593Smuzhiyun 	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun /**
199*4882a593Smuzhiyun  * radeon_msi_ok - asic specific msi checks
200*4882a593Smuzhiyun  *
201*4882a593Smuzhiyun  * @rdev: radeon device pointer
202*4882a593Smuzhiyun  *
203*4882a593Smuzhiyun  * Handles asic specific MSI checks to determine if
204*4882a593Smuzhiyun  * MSIs should be enabled on a particular chip (all asics).
205*4882a593Smuzhiyun  * Returns true if MSIs should be enabled, false if MSIs
206*4882a593Smuzhiyun  * should not be enabled.
207*4882a593Smuzhiyun  */
radeon_msi_ok(struct radeon_device * rdev)208*4882a593Smuzhiyun static bool radeon_msi_ok(struct radeon_device *rdev)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	/* RV370/RV380 was first asic with MSI support */
211*4882a593Smuzhiyun 	if (rdev->family < CHIP_RV380)
212*4882a593Smuzhiyun 		return false;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	/* MSIs don't work on AGP */
215*4882a593Smuzhiyun 	if (rdev->flags & RADEON_IS_AGP)
216*4882a593Smuzhiyun 		return false;
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	/*
219*4882a593Smuzhiyun 	 * Older chips have a HW limitation, they can only generate 40 bits
220*4882a593Smuzhiyun 	 * of address for "64-bit" MSIs which breaks on some platforms, notably
221*4882a593Smuzhiyun 	 * IBM POWER servers, so we limit them
222*4882a593Smuzhiyun 	 */
223*4882a593Smuzhiyun 	if (rdev->family < CHIP_BONAIRE) {
224*4882a593Smuzhiyun 		dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
225*4882a593Smuzhiyun 		rdev->pdev->no_64bit_msi = 1;
226*4882a593Smuzhiyun 	}
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	/* force MSI on */
229*4882a593Smuzhiyun 	if (radeon_msi == 1)
230*4882a593Smuzhiyun 		return true;
231*4882a593Smuzhiyun 	else if (radeon_msi == 0)
232*4882a593Smuzhiyun 		return false;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	/* Quirks */
235*4882a593Smuzhiyun 	/* HP RS690 only seems to work with MSIs. */
236*4882a593Smuzhiyun 	if ((rdev->pdev->device == 0x791f) &&
237*4882a593Smuzhiyun 	    (rdev->pdev->subsystem_vendor == 0x103c) &&
238*4882a593Smuzhiyun 	    (rdev->pdev->subsystem_device == 0x30c2))
239*4882a593Smuzhiyun 		return true;
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	/* Dell RS690 only seems to work with MSIs. */
242*4882a593Smuzhiyun 	if ((rdev->pdev->device == 0x791f) &&
243*4882a593Smuzhiyun 	    (rdev->pdev->subsystem_vendor == 0x1028) &&
244*4882a593Smuzhiyun 	    (rdev->pdev->subsystem_device == 0x01fc))
245*4882a593Smuzhiyun 		return true;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	/* Dell RS690 only seems to work with MSIs. */
248*4882a593Smuzhiyun 	if ((rdev->pdev->device == 0x791f) &&
249*4882a593Smuzhiyun 	    (rdev->pdev->subsystem_vendor == 0x1028) &&
250*4882a593Smuzhiyun 	    (rdev->pdev->subsystem_device == 0x01fd))
251*4882a593Smuzhiyun 		return true;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	/* Gateway RS690 only seems to work with MSIs. */
254*4882a593Smuzhiyun 	if ((rdev->pdev->device == 0x791f) &&
255*4882a593Smuzhiyun 	    (rdev->pdev->subsystem_vendor == 0x107b) &&
256*4882a593Smuzhiyun 	    (rdev->pdev->subsystem_device == 0x0185))
257*4882a593Smuzhiyun 		return true;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	/* try and enable MSIs by default on all RS690s */
260*4882a593Smuzhiyun 	if (rdev->family == CHIP_RS690)
261*4882a593Smuzhiyun 		return true;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	/* RV515 seems to have MSI issues where it loses
264*4882a593Smuzhiyun 	 * MSI rearms occasionally. This leads to lockups and freezes.
265*4882a593Smuzhiyun 	 * disable it by default.
266*4882a593Smuzhiyun 	 */
267*4882a593Smuzhiyun 	if (rdev->family == CHIP_RV515)
268*4882a593Smuzhiyun 		return false;
269*4882a593Smuzhiyun 	if (rdev->flags & RADEON_IS_IGP) {
270*4882a593Smuzhiyun 		/* APUs work fine with MSIs */
271*4882a593Smuzhiyun 		if (rdev->family >= CHIP_PALM)
272*4882a593Smuzhiyun 			return true;
273*4882a593Smuzhiyun 		/* lots of IGPs have problems with MSIs */
274*4882a593Smuzhiyun 		return false;
275*4882a593Smuzhiyun 	}
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	return true;
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun /**
281*4882a593Smuzhiyun  * radeon_irq_kms_init - init driver interrupt info
282*4882a593Smuzhiyun  *
283*4882a593Smuzhiyun  * @rdev: radeon device pointer
284*4882a593Smuzhiyun  *
285*4882a593Smuzhiyun  * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
286*4882a593Smuzhiyun  * Returns 0 for success, error for failure.
287*4882a593Smuzhiyun  */
radeon_irq_kms_init(struct radeon_device * rdev)288*4882a593Smuzhiyun int radeon_irq_kms_init(struct radeon_device *rdev)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun 	int r = 0;
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	spin_lock_init(&rdev->irq.lock);
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	/* Disable vblank irqs aggressively for power-saving */
295*4882a593Smuzhiyun 	rdev->ddev->vblank_disable_immediate = true;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
298*4882a593Smuzhiyun 	if (r) {
299*4882a593Smuzhiyun 		return r;
300*4882a593Smuzhiyun 	}
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	/* enable msi */
303*4882a593Smuzhiyun 	rdev->msi_enabled = 0;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	if (radeon_msi_ok(rdev)) {
306*4882a593Smuzhiyun 		int ret = pci_enable_msi(rdev->pdev);
307*4882a593Smuzhiyun 		if (!ret) {
308*4882a593Smuzhiyun 			rdev->msi_enabled = 1;
309*4882a593Smuzhiyun 			dev_info(rdev->dev, "radeon: using MSI.\n");
310*4882a593Smuzhiyun 		}
311*4882a593Smuzhiyun 	}
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
314*4882a593Smuzhiyun 	INIT_WORK(&rdev->dp_work, radeon_dp_work_func);
315*4882a593Smuzhiyun 	INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	rdev->irq.installed = true;
318*4882a593Smuzhiyun 	r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq);
319*4882a593Smuzhiyun 	if (r) {
320*4882a593Smuzhiyun 		rdev->irq.installed = false;
321*4882a593Smuzhiyun 		flush_delayed_work(&rdev->hotplug_work);
322*4882a593Smuzhiyun 		return r;
323*4882a593Smuzhiyun 	}
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	DRM_INFO("radeon: irq initialized.\n");
326*4882a593Smuzhiyun 	return 0;
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun /**
330*4882a593Smuzhiyun  * radeon_irq_kms_fini - tear down driver interrupt info
331*4882a593Smuzhiyun  *
332*4882a593Smuzhiyun  * @rdev: radeon device pointer
333*4882a593Smuzhiyun  *
334*4882a593Smuzhiyun  * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
335*4882a593Smuzhiyun  */
radeon_irq_kms_fini(struct radeon_device * rdev)336*4882a593Smuzhiyun void radeon_irq_kms_fini(struct radeon_device *rdev)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun 	if (rdev->irq.installed) {
339*4882a593Smuzhiyun 		drm_irq_uninstall(rdev->ddev);
340*4882a593Smuzhiyun 		rdev->irq.installed = false;
341*4882a593Smuzhiyun 		if (rdev->msi_enabled)
342*4882a593Smuzhiyun 			pci_disable_msi(rdev->pdev);
343*4882a593Smuzhiyun 		flush_delayed_work(&rdev->hotplug_work);
344*4882a593Smuzhiyun 	}
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun /**
348*4882a593Smuzhiyun  * radeon_irq_kms_sw_irq_get - enable software interrupt
349*4882a593Smuzhiyun  *
350*4882a593Smuzhiyun  * @rdev: radeon device pointer
351*4882a593Smuzhiyun  * @ring: ring whose interrupt you want to enable
352*4882a593Smuzhiyun  *
353*4882a593Smuzhiyun  * Enables the software interrupt for a specific ring (all asics).
354*4882a593Smuzhiyun  * The software interrupt is generally used to signal a fence on
355*4882a593Smuzhiyun  * a particular ring.
356*4882a593Smuzhiyun  */
radeon_irq_kms_sw_irq_get(struct radeon_device * rdev,int ring)357*4882a593Smuzhiyun void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun 	unsigned long irqflags;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	if (!rdev->ddev->irq_enabled)
362*4882a593Smuzhiyun 		return;
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
365*4882a593Smuzhiyun 		spin_lock_irqsave(&rdev->irq.lock, irqflags);
366*4882a593Smuzhiyun 		radeon_irq_set(rdev);
367*4882a593Smuzhiyun 		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
368*4882a593Smuzhiyun 	}
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun /**
372*4882a593Smuzhiyun  * radeon_irq_kms_sw_irq_get_delayed - enable software interrupt
373*4882a593Smuzhiyun  *
374*4882a593Smuzhiyun  * @rdev: radeon device pointer
375*4882a593Smuzhiyun  * @ring: ring whose interrupt you want to enable
376*4882a593Smuzhiyun  *
377*4882a593Smuzhiyun  * Enables the software interrupt for a specific ring (all asics).
378*4882a593Smuzhiyun  * The software interrupt is generally used to signal a fence on
379*4882a593Smuzhiyun  * a particular ring.
380*4882a593Smuzhiyun  */
radeon_irq_kms_sw_irq_get_delayed(struct radeon_device * rdev,int ring)381*4882a593Smuzhiyun bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring)
382*4882a593Smuzhiyun {
383*4882a593Smuzhiyun 	return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun /**
387*4882a593Smuzhiyun  * radeon_irq_kms_sw_irq_put - disable software interrupt
388*4882a593Smuzhiyun  *
389*4882a593Smuzhiyun  * @rdev: radeon device pointer
390*4882a593Smuzhiyun  * @ring: ring whose interrupt you want to disable
391*4882a593Smuzhiyun  *
392*4882a593Smuzhiyun  * Disables the software interrupt for a specific ring (all asics).
393*4882a593Smuzhiyun  * The software interrupt is generally used to signal a fence on
394*4882a593Smuzhiyun  * a particular ring.
395*4882a593Smuzhiyun  */
radeon_irq_kms_sw_irq_put(struct radeon_device * rdev,int ring)396*4882a593Smuzhiyun void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun 	unsigned long irqflags;
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun 	if (!rdev->ddev->irq_enabled)
401*4882a593Smuzhiyun 		return;
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
404*4882a593Smuzhiyun 		spin_lock_irqsave(&rdev->irq.lock, irqflags);
405*4882a593Smuzhiyun 		radeon_irq_set(rdev);
406*4882a593Smuzhiyun 		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
407*4882a593Smuzhiyun 	}
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun /**
411*4882a593Smuzhiyun  * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
412*4882a593Smuzhiyun  *
413*4882a593Smuzhiyun  * @rdev: radeon device pointer
414*4882a593Smuzhiyun  * @crtc: crtc whose interrupt you want to enable
415*4882a593Smuzhiyun  *
416*4882a593Smuzhiyun  * Enables the pageflip interrupt for a specific crtc (all asics).
417*4882a593Smuzhiyun  * For pageflips we use the vblank interrupt source.
418*4882a593Smuzhiyun  */
radeon_irq_kms_pflip_irq_get(struct radeon_device * rdev,int crtc)419*4882a593Smuzhiyun void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
420*4882a593Smuzhiyun {
421*4882a593Smuzhiyun 	unsigned long irqflags;
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun 	if (crtc < 0 || crtc >= rdev->num_crtc)
424*4882a593Smuzhiyun 		return;
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	if (!rdev->ddev->irq_enabled)
427*4882a593Smuzhiyun 		return;
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
430*4882a593Smuzhiyun 		spin_lock_irqsave(&rdev->irq.lock, irqflags);
431*4882a593Smuzhiyun 		radeon_irq_set(rdev);
432*4882a593Smuzhiyun 		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
433*4882a593Smuzhiyun 	}
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun /**
437*4882a593Smuzhiyun  * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
438*4882a593Smuzhiyun  *
439*4882a593Smuzhiyun  * @rdev: radeon device pointer
440*4882a593Smuzhiyun  * @crtc: crtc whose interrupt you want to disable
441*4882a593Smuzhiyun  *
442*4882a593Smuzhiyun  * Disables the pageflip interrupt for a specific crtc (all asics).
443*4882a593Smuzhiyun  * For pageflips we use the vblank interrupt source.
444*4882a593Smuzhiyun  */
radeon_irq_kms_pflip_irq_put(struct radeon_device * rdev,int crtc)445*4882a593Smuzhiyun void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
446*4882a593Smuzhiyun {
447*4882a593Smuzhiyun 	unsigned long irqflags;
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	if (crtc < 0 || crtc >= rdev->num_crtc)
450*4882a593Smuzhiyun 		return;
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	if (!rdev->ddev->irq_enabled)
453*4882a593Smuzhiyun 		return;
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun 	if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
456*4882a593Smuzhiyun 		spin_lock_irqsave(&rdev->irq.lock, irqflags);
457*4882a593Smuzhiyun 		radeon_irq_set(rdev);
458*4882a593Smuzhiyun 		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
459*4882a593Smuzhiyun 	}
460*4882a593Smuzhiyun }
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun /**
463*4882a593Smuzhiyun  * radeon_irq_kms_enable_afmt - enable audio format change interrupt
464*4882a593Smuzhiyun  *
465*4882a593Smuzhiyun  * @rdev: radeon device pointer
466*4882a593Smuzhiyun  * @block: afmt block whose interrupt you want to enable
467*4882a593Smuzhiyun  *
468*4882a593Smuzhiyun  * Enables the afmt change interrupt for a specific afmt block (all asics).
469*4882a593Smuzhiyun  */
radeon_irq_kms_enable_afmt(struct radeon_device * rdev,int block)470*4882a593Smuzhiyun void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
471*4882a593Smuzhiyun {
472*4882a593Smuzhiyun 	unsigned long irqflags;
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	if (!rdev->ddev->irq_enabled)
475*4882a593Smuzhiyun 		return;
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	spin_lock_irqsave(&rdev->irq.lock, irqflags);
478*4882a593Smuzhiyun 	rdev->irq.afmt[block] = true;
479*4882a593Smuzhiyun 	radeon_irq_set(rdev);
480*4882a593Smuzhiyun 	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun /**
485*4882a593Smuzhiyun  * radeon_irq_kms_disable_afmt - disable audio format change interrupt
486*4882a593Smuzhiyun  *
487*4882a593Smuzhiyun  * @rdev: radeon device pointer
488*4882a593Smuzhiyun  * @block: afmt block whose interrupt you want to disable
489*4882a593Smuzhiyun  *
490*4882a593Smuzhiyun  * Disables the afmt change interrupt for a specific afmt block (all asics).
491*4882a593Smuzhiyun  */
radeon_irq_kms_disable_afmt(struct radeon_device * rdev,int block)492*4882a593Smuzhiyun void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun 	unsigned long irqflags;
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 	if (!rdev->ddev->irq_enabled)
497*4882a593Smuzhiyun 		return;
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	spin_lock_irqsave(&rdev->irq.lock, irqflags);
500*4882a593Smuzhiyun 	rdev->irq.afmt[block] = false;
501*4882a593Smuzhiyun 	radeon_irq_set(rdev);
502*4882a593Smuzhiyun 	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun /**
506*4882a593Smuzhiyun  * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
507*4882a593Smuzhiyun  *
508*4882a593Smuzhiyun  * @rdev: radeon device pointer
509*4882a593Smuzhiyun  * @hpd_mask: mask of hpd pins you want to enable.
510*4882a593Smuzhiyun  *
511*4882a593Smuzhiyun  * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
512*4882a593Smuzhiyun  */
radeon_irq_kms_enable_hpd(struct radeon_device * rdev,unsigned hpd_mask)513*4882a593Smuzhiyun void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun 	unsigned long irqflags;
516*4882a593Smuzhiyun 	int i;
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun 	if (!rdev->ddev->irq_enabled)
519*4882a593Smuzhiyun 		return;
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	spin_lock_irqsave(&rdev->irq.lock, irqflags);
522*4882a593Smuzhiyun 	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
523*4882a593Smuzhiyun 		rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
524*4882a593Smuzhiyun 	radeon_irq_set(rdev);
525*4882a593Smuzhiyun 	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun /**
529*4882a593Smuzhiyun  * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
530*4882a593Smuzhiyun  *
531*4882a593Smuzhiyun  * @rdev: radeon device pointer
532*4882a593Smuzhiyun  * @hpd_mask: mask of hpd pins you want to disable.
533*4882a593Smuzhiyun  *
534*4882a593Smuzhiyun  * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
535*4882a593Smuzhiyun  */
radeon_irq_kms_disable_hpd(struct radeon_device * rdev,unsigned hpd_mask)536*4882a593Smuzhiyun void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
537*4882a593Smuzhiyun {
538*4882a593Smuzhiyun 	unsigned long irqflags;
539*4882a593Smuzhiyun 	int i;
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	if (!rdev->ddev->irq_enabled)
542*4882a593Smuzhiyun 		return;
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	spin_lock_irqsave(&rdev->irq.lock, irqflags);
545*4882a593Smuzhiyun 	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
546*4882a593Smuzhiyun 		rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
547*4882a593Smuzhiyun 	radeon_irq_set(rdev);
548*4882a593Smuzhiyun 	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
549*4882a593Smuzhiyun }
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun /**
552*4882a593Smuzhiyun  * radeon_irq_kms_update_int_n - helper for updating interrupt enable registers
553*4882a593Smuzhiyun  *
554*4882a593Smuzhiyun  * @rdev: radeon device pointer
555*4882a593Smuzhiyun  * @reg: the register to write to enable/disable interrupts
556*4882a593Smuzhiyun  * @mask: the mask that enables the interrupts
557*4882a593Smuzhiyun  * @enable: whether to enable or disable the interrupt register
558*4882a593Smuzhiyun  * @name: the name of the interrupt register to print to the kernel log
559*4882a593Smuzhiyun  * @num: the number of the interrupt register to print to the kernel log
560*4882a593Smuzhiyun  *
561*4882a593Smuzhiyun  * Helper for updating the enable state of interrupt registers. Checks whether
562*4882a593Smuzhiyun  * or not the interrupt matches the enable state we want. If it doesn't, then
563*4882a593Smuzhiyun  * we update it and print a debugging message to the kernel log indicating the
564*4882a593Smuzhiyun  * new state of the interrupt register.
565*4882a593Smuzhiyun  *
566*4882a593Smuzhiyun  * Used for updating sequences of interrupts registers like HPD1, HPD2, etc.
567*4882a593Smuzhiyun  */
radeon_irq_kms_set_irq_n_enabled(struct radeon_device * rdev,u32 reg,u32 mask,bool enable,const char * name,unsigned n)568*4882a593Smuzhiyun void radeon_irq_kms_set_irq_n_enabled(struct radeon_device *rdev,
569*4882a593Smuzhiyun 				      u32 reg, u32 mask,
570*4882a593Smuzhiyun 				      bool enable, const char *name, unsigned n)
571*4882a593Smuzhiyun {
572*4882a593Smuzhiyun 	u32 tmp = RREG32(reg);
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	/* Interrupt state didn't change */
575*4882a593Smuzhiyun 	if (!!(tmp & mask) == enable)
576*4882a593Smuzhiyun 		return;
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	if (enable) {
579*4882a593Smuzhiyun 		DRM_DEBUG("%s%d interrupts enabled\n", name, n);
580*4882a593Smuzhiyun 		WREG32(reg, tmp |= mask);
581*4882a593Smuzhiyun 	} else {
582*4882a593Smuzhiyun 		DRM_DEBUG("%s%d interrupts disabled\n", name, n);
583*4882a593Smuzhiyun 		WREG32(reg, tmp & ~mask);
584*4882a593Smuzhiyun 	}
585*4882a593Smuzhiyun }
586