xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/radeon_benchmark.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2009 Jerome Glisse.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun  * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*4882a593Smuzhiyun  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4882a593Smuzhiyun  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4882a593Smuzhiyun  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4882a593Smuzhiyun  * OTHER DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  * Authors: Jerome Glisse
23*4882a593Smuzhiyun  */
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include <drm/radeon_drm.h>
26*4882a593Smuzhiyun #include "radeon_reg.h"
27*4882a593Smuzhiyun #include "radeon.h"
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define RADEON_BENCHMARK_COPY_BLIT 1
30*4882a593Smuzhiyun #define RADEON_BENCHMARK_COPY_DMA  0
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define RADEON_BENCHMARK_ITERATIONS 1024
33*4882a593Smuzhiyun #define RADEON_BENCHMARK_COMMON_MODES_N 17
34*4882a593Smuzhiyun 
radeon_benchmark_do_move(struct radeon_device * rdev,unsigned size,uint64_t saddr,uint64_t daddr,int flag,int n,struct dma_resv * resv)35*4882a593Smuzhiyun static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size,
36*4882a593Smuzhiyun 				    uint64_t saddr, uint64_t daddr,
37*4882a593Smuzhiyun 				    int flag, int n,
38*4882a593Smuzhiyun 				    struct dma_resv *resv)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun 	unsigned long start_jiffies;
41*4882a593Smuzhiyun 	unsigned long end_jiffies;
42*4882a593Smuzhiyun 	struct radeon_fence *fence = NULL;
43*4882a593Smuzhiyun 	int i, r;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	start_jiffies = jiffies;
46*4882a593Smuzhiyun 	for (i = 0; i < n; i++) {
47*4882a593Smuzhiyun 		switch (flag) {
48*4882a593Smuzhiyun 		case RADEON_BENCHMARK_COPY_DMA:
49*4882a593Smuzhiyun 			fence = radeon_copy_dma(rdev, saddr, daddr,
50*4882a593Smuzhiyun 						size / RADEON_GPU_PAGE_SIZE,
51*4882a593Smuzhiyun 						resv);
52*4882a593Smuzhiyun 			break;
53*4882a593Smuzhiyun 		case RADEON_BENCHMARK_COPY_BLIT:
54*4882a593Smuzhiyun 			fence = radeon_copy_blit(rdev, saddr, daddr,
55*4882a593Smuzhiyun 						 size / RADEON_GPU_PAGE_SIZE,
56*4882a593Smuzhiyun 						 resv);
57*4882a593Smuzhiyun 			break;
58*4882a593Smuzhiyun 		default:
59*4882a593Smuzhiyun 			DRM_ERROR("Unknown copy method\n");
60*4882a593Smuzhiyun 			return -EINVAL;
61*4882a593Smuzhiyun 		}
62*4882a593Smuzhiyun 		if (IS_ERR(fence))
63*4882a593Smuzhiyun 			return PTR_ERR(fence);
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 		r = radeon_fence_wait(fence, false);
66*4882a593Smuzhiyun 		radeon_fence_unref(&fence);
67*4882a593Smuzhiyun 		if (r)
68*4882a593Smuzhiyun 			return r;
69*4882a593Smuzhiyun 	}
70*4882a593Smuzhiyun 	end_jiffies = jiffies;
71*4882a593Smuzhiyun 	return jiffies_to_msecs(end_jiffies - start_jiffies);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 
radeon_benchmark_log_results(int n,unsigned size,unsigned int time,unsigned sdomain,unsigned ddomain,char * kind)75*4882a593Smuzhiyun static void radeon_benchmark_log_results(int n, unsigned size,
76*4882a593Smuzhiyun 					 unsigned int time,
77*4882a593Smuzhiyun 					 unsigned sdomain, unsigned ddomain,
78*4882a593Smuzhiyun 					 char *kind)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	unsigned int throughput = (n * (size >> 10)) / time;
81*4882a593Smuzhiyun 	DRM_INFO("radeon: %s %u bo moves of %u kB from"
82*4882a593Smuzhiyun 		 " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n",
83*4882a593Smuzhiyun 		 kind, n, size >> 10, sdomain, ddomain, time,
84*4882a593Smuzhiyun 		 throughput * 8, throughput);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun 
radeon_benchmark_move(struct radeon_device * rdev,unsigned size,unsigned sdomain,unsigned ddomain)87*4882a593Smuzhiyun static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size,
88*4882a593Smuzhiyun 				  unsigned sdomain, unsigned ddomain)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun 	struct radeon_bo *dobj = NULL;
91*4882a593Smuzhiyun 	struct radeon_bo *sobj = NULL;
92*4882a593Smuzhiyun 	uint64_t saddr, daddr;
93*4882a593Smuzhiyun 	int r, n;
94*4882a593Smuzhiyun 	int time;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	n = RADEON_BENCHMARK_ITERATIONS;
97*4882a593Smuzhiyun 	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, 0, NULL, NULL, &sobj);
98*4882a593Smuzhiyun 	if (r) {
99*4882a593Smuzhiyun 		goto out_cleanup;
100*4882a593Smuzhiyun 	}
101*4882a593Smuzhiyun 	r = radeon_bo_reserve(sobj, false);
102*4882a593Smuzhiyun 	if (unlikely(r != 0))
103*4882a593Smuzhiyun 		goto out_cleanup;
104*4882a593Smuzhiyun 	r = radeon_bo_pin(sobj, sdomain, &saddr);
105*4882a593Smuzhiyun 	radeon_bo_unreserve(sobj);
106*4882a593Smuzhiyun 	if (r) {
107*4882a593Smuzhiyun 		goto out_cleanup;
108*4882a593Smuzhiyun 	}
109*4882a593Smuzhiyun 	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, 0, NULL, NULL, &dobj);
110*4882a593Smuzhiyun 	if (r) {
111*4882a593Smuzhiyun 		goto out_cleanup;
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun 	r = radeon_bo_reserve(dobj, false);
114*4882a593Smuzhiyun 	if (unlikely(r != 0))
115*4882a593Smuzhiyun 		goto out_cleanup;
116*4882a593Smuzhiyun 	r = radeon_bo_pin(dobj, ddomain, &daddr);
117*4882a593Smuzhiyun 	radeon_bo_unreserve(dobj);
118*4882a593Smuzhiyun 	if (r) {
119*4882a593Smuzhiyun 		goto out_cleanup;
120*4882a593Smuzhiyun 	}
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	if (rdev->asic->copy.dma) {
123*4882a593Smuzhiyun 		time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
124*4882a593Smuzhiyun 						RADEON_BENCHMARK_COPY_DMA, n,
125*4882a593Smuzhiyun 						dobj->tbo.base.resv);
126*4882a593Smuzhiyun 		if (time < 0)
127*4882a593Smuzhiyun 			goto out_cleanup;
128*4882a593Smuzhiyun 		if (time > 0)
129*4882a593Smuzhiyun 			radeon_benchmark_log_results(n, size, time,
130*4882a593Smuzhiyun 						     sdomain, ddomain, "dma");
131*4882a593Smuzhiyun 	}
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	if (rdev->asic->copy.blit) {
134*4882a593Smuzhiyun 		time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
135*4882a593Smuzhiyun 						RADEON_BENCHMARK_COPY_BLIT, n,
136*4882a593Smuzhiyun 						dobj->tbo.base.resv);
137*4882a593Smuzhiyun 		if (time < 0)
138*4882a593Smuzhiyun 			goto out_cleanup;
139*4882a593Smuzhiyun 		if (time > 0)
140*4882a593Smuzhiyun 			radeon_benchmark_log_results(n, size, time,
141*4882a593Smuzhiyun 						     sdomain, ddomain, "blit");
142*4882a593Smuzhiyun 	}
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun out_cleanup:
145*4882a593Smuzhiyun 	if (sobj) {
146*4882a593Smuzhiyun 		r = radeon_bo_reserve(sobj, false);
147*4882a593Smuzhiyun 		if (likely(r == 0)) {
148*4882a593Smuzhiyun 			radeon_bo_unpin(sobj);
149*4882a593Smuzhiyun 			radeon_bo_unreserve(sobj);
150*4882a593Smuzhiyun 		}
151*4882a593Smuzhiyun 		radeon_bo_unref(&sobj);
152*4882a593Smuzhiyun 	}
153*4882a593Smuzhiyun 	if (dobj) {
154*4882a593Smuzhiyun 		r = radeon_bo_reserve(dobj, false);
155*4882a593Smuzhiyun 		if (likely(r == 0)) {
156*4882a593Smuzhiyun 			radeon_bo_unpin(dobj);
157*4882a593Smuzhiyun 			radeon_bo_unreserve(dobj);
158*4882a593Smuzhiyun 		}
159*4882a593Smuzhiyun 		radeon_bo_unref(&dobj);
160*4882a593Smuzhiyun 	}
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	if (r) {
163*4882a593Smuzhiyun 		DRM_ERROR("Error while benchmarking BO move.\n");
164*4882a593Smuzhiyun 	}
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun 
radeon_benchmark(struct radeon_device * rdev,int test_number)167*4882a593Smuzhiyun void radeon_benchmark(struct radeon_device *rdev, int test_number)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun 	int i;
170*4882a593Smuzhiyun 	int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = {
171*4882a593Smuzhiyun 		640 * 480 * 4,
172*4882a593Smuzhiyun 		720 * 480 * 4,
173*4882a593Smuzhiyun 		800 * 600 * 4,
174*4882a593Smuzhiyun 		848 * 480 * 4,
175*4882a593Smuzhiyun 		1024 * 768 * 4,
176*4882a593Smuzhiyun 		1152 * 768 * 4,
177*4882a593Smuzhiyun 		1280 * 720 * 4,
178*4882a593Smuzhiyun 		1280 * 800 * 4,
179*4882a593Smuzhiyun 		1280 * 854 * 4,
180*4882a593Smuzhiyun 		1280 * 960 * 4,
181*4882a593Smuzhiyun 		1280 * 1024 * 4,
182*4882a593Smuzhiyun 		1440 * 900 * 4,
183*4882a593Smuzhiyun 		1400 * 1050 * 4,
184*4882a593Smuzhiyun 		1680 * 1050 * 4,
185*4882a593Smuzhiyun 		1600 * 1200 * 4,
186*4882a593Smuzhiyun 		1920 * 1080 * 4,
187*4882a593Smuzhiyun 		1920 * 1200 * 4
188*4882a593Smuzhiyun 	};
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	switch (test_number) {
191*4882a593Smuzhiyun 	case 1:
192*4882a593Smuzhiyun 		/* simple test, VRAM to GTT and GTT to VRAM */
193*4882a593Smuzhiyun 		radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT,
194*4882a593Smuzhiyun 				      RADEON_GEM_DOMAIN_VRAM);
195*4882a593Smuzhiyun 		radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
196*4882a593Smuzhiyun 				      RADEON_GEM_DOMAIN_GTT);
197*4882a593Smuzhiyun 		break;
198*4882a593Smuzhiyun 	case 2:
199*4882a593Smuzhiyun 		/* simple test, VRAM to VRAM */
200*4882a593Smuzhiyun 		radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
201*4882a593Smuzhiyun 				      RADEON_GEM_DOMAIN_VRAM);
202*4882a593Smuzhiyun 		break;
203*4882a593Smuzhiyun 	case 3:
204*4882a593Smuzhiyun 		/* GTT to VRAM, buffer size sweep, powers of 2 */
205*4882a593Smuzhiyun 		for (i = 1; i <= 16384; i <<= 1)
206*4882a593Smuzhiyun 			radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
207*4882a593Smuzhiyun 					      RADEON_GEM_DOMAIN_GTT,
208*4882a593Smuzhiyun 					      RADEON_GEM_DOMAIN_VRAM);
209*4882a593Smuzhiyun 		break;
210*4882a593Smuzhiyun 	case 4:
211*4882a593Smuzhiyun 		/* VRAM to GTT, buffer size sweep, powers of 2 */
212*4882a593Smuzhiyun 		for (i = 1; i <= 16384; i <<= 1)
213*4882a593Smuzhiyun 			radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
214*4882a593Smuzhiyun 					      RADEON_GEM_DOMAIN_VRAM,
215*4882a593Smuzhiyun 					      RADEON_GEM_DOMAIN_GTT);
216*4882a593Smuzhiyun 		break;
217*4882a593Smuzhiyun 	case 5:
218*4882a593Smuzhiyun 		/* VRAM to VRAM, buffer size sweep, powers of 2 */
219*4882a593Smuzhiyun 		for (i = 1; i <= 16384; i <<= 1)
220*4882a593Smuzhiyun 			radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
221*4882a593Smuzhiyun 					      RADEON_GEM_DOMAIN_VRAM,
222*4882a593Smuzhiyun 					      RADEON_GEM_DOMAIN_VRAM);
223*4882a593Smuzhiyun 		break;
224*4882a593Smuzhiyun 	case 6:
225*4882a593Smuzhiyun 		/* GTT to VRAM, buffer size sweep, common modes */
226*4882a593Smuzhiyun 		for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
227*4882a593Smuzhiyun 			radeon_benchmark_move(rdev, common_modes[i],
228*4882a593Smuzhiyun 					      RADEON_GEM_DOMAIN_GTT,
229*4882a593Smuzhiyun 					      RADEON_GEM_DOMAIN_VRAM);
230*4882a593Smuzhiyun 		break;
231*4882a593Smuzhiyun 	case 7:
232*4882a593Smuzhiyun 		/* VRAM to GTT, buffer size sweep, common modes */
233*4882a593Smuzhiyun 		for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
234*4882a593Smuzhiyun 			radeon_benchmark_move(rdev, common_modes[i],
235*4882a593Smuzhiyun 					      RADEON_GEM_DOMAIN_VRAM,
236*4882a593Smuzhiyun 					      RADEON_GEM_DOMAIN_GTT);
237*4882a593Smuzhiyun 		break;
238*4882a593Smuzhiyun 	case 8:
239*4882a593Smuzhiyun 		/* VRAM to VRAM, buffer size sweep, common modes */
240*4882a593Smuzhiyun 		for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
241*4882a593Smuzhiyun 			radeon_benchmark_move(rdev, common_modes[i],
242*4882a593Smuzhiyun 					      RADEON_GEM_DOMAIN_VRAM,
243*4882a593Smuzhiyun 					      RADEON_GEM_DOMAIN_VRAM);
244*4882a593Smuzhiyun 		break;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	default:
247*4882a593Smuzhiyun 		DRM_ERROR("Unknown benchmark\n");
248*4882a593Smuzhiyun 	}
249*4882a593Smuzhiyun }
250