1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2008 Red Hat Inc.
3*4882a593Smuzhiyun * Copyright 2009 Jerome Glisse.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
6*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
7*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
8*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
10*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in
13*4882a593Smuzhiyun * all copies or substantial portions of the Software.
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * Authors:
24*4882a593Smuzhiyun * Dave Airlie
25*4882a593Smuzhiyun * Jerome Glisse <glisse@freedesktop.org>
26*4882a593Smuzhiyun */
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #include <linux/pci.h>
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #include <drm/drm_agpsupport.h>
31*4882a593Smuzhiyun #include <drm/drm_device.h>
32*4882a593Smuzhiyun #include <drm/radeon_drm.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include "radeon.h"
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_AGP)
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun struct radeon_agpmode_quirk {
39*4882a593Smuzhiyun u32 hostbridge_vendor;
40*4882a593Smuzhiyun u32 hostbridge_device;
41*4882a593Smuzhiyun u32 chip_vendor;
42*4882a593Smuzhiyun u32 chip_device;
43*4882a593Smuzhiyun u32 subsys_vendor;
44*4882a593Smuzhiyun u32 subsys_device;
45*4882a593Smuzhiyun u32 default_mode;
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
49*4882a593Smuzhiyun /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */
50*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4},
51*4882a593Smuzhiyun /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */
52*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4},
53*4882a593Smuzhiyun /* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */
54*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964,
55*4882a593Smuzhiyun 0x148c, 0x2073, 4},
56*4882a593Smuzhiyun /* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */
57*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59,
58*4882a593Smuzhiyun PCI_VENDOR_ID_IBM, 0x052f, 1},
59*4882a593Smuzhiyun /* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */
60*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50,
61*4882a593Smuzhiyun PCI_VENDOR_ID_IBM, 0x0550, 1},
62*4882a593Smuzhiyun /* Intel 82855PM host bridge / RV250/M9 GL [Mobility FireGL 9000/Radeon 9000] needs AGPMode 1 (Thinkpad T40p) */
63*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,
64*4882a593Smuzhiyun PCI_VENDOR_ID_IBM, 0x054d, 1},
65*4882a593Smuzhiyun /* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */
66*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57,
67*4882a593Smuzhiyun PCI_VENDOR_ID_IBM, 0x0530, 1},
68*4882a593Smuzhiyun /* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */
69*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54,
70*4882a593Smuzhiyun PCI_VENDOR_ID_IBM, 0x054f, 2},
71*4882a593Smuzhiyun /* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */
72*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,
73*4882a593Smuzhiyun PCI_VENDOR_ID_SONY, 0x816b, 2},
74*4882a593Smuzhiyun /* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */
75*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,
76*4882a593Smuzhiyun PCI_VENDOR_ID_SONY, 0x8195, 8},
77*4882a593Smuzhiyun /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/
78*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59,
79*4882a593Smuzhiyun PCI_VENDOR_ID_DELL, 0x00e3, 2},
80*4882a593Smuzhiyun /* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */
81*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66,
82*4882a593Smuzhiyun PCI_VENDOR_ID_DELL, 0x0149, 1},
83*4882a593Smuzhiyun /* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */
84*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,
85*4882a593Smuzhiyun PCI_VENDOR_ID_IBM, 0x0531, 1},
86*4882a593Smuzhiyun /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */
87*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
88*4882a593Smuzhiyun 0x1025, 0x0061, 1},
89*4882a593Smuzhiyun /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */
90*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
91*4882a593Smuzhiyun 0x1025, 0x0064, 1},
92*4882a593Smuzhiyun /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */
93*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
94*4882a593Smuzhiyun PCI_VENDOR_ID_ASUSTEK, 0x1942, 1},
95*4882a593Smuzhiyun /* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */
96*4882a593Smuzhiyun { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
97*4882a593Smuzhiyun 0x10cf, 0x127f, 1},
98*4882a593Smuzhiyun /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */
99*4882a593Smuzhiyun { 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,
100*4882a593Smuzhiyun 0x1787, 0x5960, 4},
101*4882a593Smuzhiyun /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */
102*4882a593Smuzhiyun { PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960,
103*4882a593Smuzhiyun 0x17af, 0x2020, 4},
104*4882a593Smuzhiyun /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */
105*4882a593Smuzhiyun { PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153,
106*4882a593Smuzhiyun PCI_VENDOR_ID_ASUSTEK, 0x003c, 4},
107*4882a593Smuzhiyun /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */
108*4882a593Smuzhiyun { PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c,
109*4882a593Smuzhiyun PCI_VENDOR_ID_ATI, 0x013a, 2},
110*4882a593Smuzhiyun /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */
111*4882a593Smuzhiyun { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,
112*4882a593Smuzhiyun PCI_VENDOR_ID_ASUSTEK, 0x004c, 2},
113*4882a593Smuzhiyun /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */
114*4882a593Smuzhiyun { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,
115*4882a593Smuzhiyun PCI_VENDOR_ID_ASUSTEK, 0x0054, 2},
116*4882a593Smuzhiyun /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */
117*4882a593Smuzhiyun { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d,
118*4882a593Smuzhiyun 0x174b, 0x7149, 4},
119*4882a593Smuzhiyun /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */
120*4882a593Smuzhiyun { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,
121*4882a593Smuzhiyun 0x1462, 0x0380, 4},
122*4882a593Smuzhiyun /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */
123*4882a593Smuzhiyun { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964,
124*4882a593Smuzhiyun 0x148c, 0x2073, 4},
125*4882a593Smuzhiyun /* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */
126*4882a593Smuzhiyun { PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61,
127*4882a593Smuzhiyun PCI_VENDOR_ID_SONY, 0x8175, 1},
128*4882a593Smuzhiyun { 0, 0, 0, 0, 0, 0, 0 },
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun #endif
131*4882a593Smuzhiyun
radeon_agp_init(struct radeon_device * rdev)132*4882a593Smuzhiyun int radeon_agp_init(struct radeon_device *rdev)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_AGP)
135*4882a593Smuzhiyun struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list;
136*4882a593Smuzhiyun struct drm_agp_mode mode;
137*4882a593Smuzhiyun struct drm_agp_info info;
138*4882a593Smuzhiyun uint32_t agp_status;
139*4882a593Smuzhiyun int default_mode;
140*4882a593Smuzhiyun bool is_v3;
141*4882a593Smuzhiyun int ret;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun /* Acquire AGP. */
144*4882a593Smuzhiyun ret = drm_agp_acquire(rdev->ddev);
145*4882a593Smuzhiyun if (ret) {
146*4882a593Smuzhiyun DRM_ERROR("Unable to acquire AGP: %d\n", ret);
147*4882a593Smuzhiyun return ret;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun ret = drm_agp_info(rdev->ddev, &info);
151*4882a593Smuzhiyun if (ret) {
152*4882a593Smuzhiyun drm_agp_release(rdev->ddev);
153*4882a593Smuzhiyun DRM_ERROR("Unable to get AGP info: %d\n", ret);
154*4882a593Smuzhiyun return ret;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun if (rdev->ddev->agp->agp_info.aper_size < 32) {
158*4882a593Smuzhiyun drm_agp_release(rdev->ddev);
159*4882a593Smuzhiyun dev_warn(rdev->dev, "AGP aperture too small (%zuM) "
160*4882a593Smuzhiyun "need at least 32M, disabling AGP\n",
161*4882a593Smuzhiyun rdev->ddev->agp->agp_info.aper_size);
162*4882a593Smuzhiyun return -EINVAL;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun mode.mode = info.mode;
166*4882a593Smuzhiyun /* chips with the agp to pcie bridge don't have the AGP_STATUS register
167*4882a593Smuzhiyun * Just use the whatever mode the host sets up.
168*4882a593Smuzhiyun */
169*4882a593Smuzhiyun if (rdev->family <= CHIP_RV350)
170*4882a593Smuzhiyun agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode;
171*4882a593Smuzhiyun else
172*4882a593Smuzhiyun agp_status = mode.mode;
173*4882a593Smuzhiyun is_v3 = !!(agp_status & RADEON_AGPv3_MODE);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun if (is_v3) {
176*4882a593Smuzhiyun default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4;
177*4882a593Smuzhiyun } else {
178*4882a593Smuzhiyun if (agp_status & RADEON_AGP_4X_MODE) {
179*4882a593Smuzhiyun default_mode = 4;
180*4882a593Smuzhiyun } else if (agp_status & RADEON_AGP_2X_MODE) {
181*4882a593Smuzhiyun default_mode = 2;
182*4882a593Smuzhiyun } else {
183*4882a593Smuzhiyun default_mode = 1;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /* Apply AGPMode Quirks */
188*4882a593Smuzhiyun while (p && p->chip_device != 0) {
189*4882a593Smuzhiyun if (info.id_vendor == p->hostbridge_vendor &&
190*4882a593Smuzhiyun info.id_device == p->hostbridge_device &&
191*4882a593Smuzhiyun rdev->pdev->vendor == p->chip_vendor &&
192*4882a593Smuzhiyun rdev->pdev->device == p->chip_device &&
193*4882a593Smuzhiyun rdev->pdev->subsystem_vendor == p->subsys_vendor &&
194*4882a593Smuzhiyun rdev->pdev->subsystem_device == p->subsys_device) {
195*4882a593Smuzhiyun default_mode = p->default_mode;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun ++p;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun if (radeon_agpmode > 0) {
201*4882a593Smuzhiyun if ((radeon_agpmode < (is_v3 ? 4 : 1)) ||
202*4882a593Smuzhiyun (radeon_agpmode > (is_v3 ? 8 : 4)) ||
203*4882a593Smuzhiyun (radeon_agpmode & (radeon_agpmode - 1))) {
204*4882a593Smuzhiyun DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n",
205*4882a593Smuzhiyun radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4",
206*4882a593Smuzhiyun default_mode);
207*4882a593Smuzhiyun radeon_agpmode = default_mode;
208*4882a593Smuzhiyun } else {
209*4882a593Smuzhiyun DRM_INFO("AGP mode requested: %d\n", radeon_agpmode);
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun } else {
212*4882a593Smuzhiyun radeon_agpmode = default_mode;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun mode.mode &= ~RADEON_AGP_MODE_MASK;
216*4882a593Smuzhiyun if (is_v3) {
217*4882a593Smuzhiyun switch (radeon_agpmode) {
218*4882a593Smuzhiyun case 8:
219*4882a593Smuzhiyun mode.mode |= RADEON_AGPv3_8X_MODE;
220*4882a593Smuzhiyun break;
221*4882a593Smuzhiyun case 4:
222*4882a593Smuzhiyun default:
223*4882a593Smuzhiyun mode.mode |= RADEON_AGPv3_4X_MODE;
224*4882a593Smuzhiyun break;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun } else {
227*4882a593Smuzhiyun switch (radeon_agpmode) {
228*4882a593Smuzhiyun case 4:
229*4882a593Smuzhiyun mode.mode |= RADEON_AGP_4X_MODE;
230*4882a593Smuzhiyun break;
231*4882a593Smuzhiyun case 2:
232*4882a593Smuzhiyun mode.mode |= RADEON_AGP_2X_MODE;
233*4882a593Smuzhiyun break;
234*4882a593Smuzhiyun case 1:
235*4882a593Smuzhiyun default:
236*4882a593Smuzhiyun mode.mode |= RADEON_AGP_1X_MODE;
237*4882a593Smuzhiyun break;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */
242*4882a593Smuzhiyun ret = drm_agp_enable(rdev->ddev, mode);
243*4882a593Smuzhiyun if (ret) {
244*4882a593Smuzhiyun DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode);
245*4882a593Smuzhiyun drm_agp_release(rdev->ddev);
246*4882a593Smuzhiyun return ret;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base;
250*4882a593Smuzhiyun rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aper_size << 20;
251*4882a593Smuzhiyun rdev->mc.gtt_start = rdev->mc.agp_base;
252*4882a593Smuzhiyun rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1;
253*4882a593Smuzhiyun dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n",
254*4882a593Smuzhiyun rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end);
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun /* workaround some hw issues */
257*4882a593Smuzhiyun if (rdev->family < CHIP_R200) {
258*4882a593Smuzhiyun WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000);
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun return 0;
261*4882a593Smuzhiyun #else
262*4882a593Smuzhiyun return 0;
263*4882a593Smuzhiyun #endif
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
radeon_agp_resume(struct radeon_device * rdev)266*4882a593Smuzhiyun void radeon_agp_resume(struct radeon_device *rdev)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_AGP)
269*4882a593Smuzhiyun int r;
270*4882a593Smuzhiyun if (rdev->flags & RADEON_IS_AGP) {
271*4882a593Smuzhiyun r = radeon_agp_init(rdev);
272*4882a593Smuzhiyun if (r)
273*4882a593Smuzhiyun dev_warn(rdev->dev, "radeon AGP reinit failed\n");
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun #endif
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
radeon_agp_fini(struct radeon_device * rdev)278*4882a593Smuzhiyun void radeon_agp_fini(struct radeon_device *rdev)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_AGP)
281*4882a593Smuzhiyun if (rdev->ddev->agp && rdev->ddev->agp->acquired) {
282*4882a593Smuzhiyun drm_agp_release(rdev->ddev);
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun #endif
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
radeon_agp_suspend(struct radeon_device * rdev)287*4882a593Smuzhiyun void radeon_agp_suspend(struct radeon_device *rdev)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun radeon_agp_fini(rdev);
290*4882a593Smuzhiyun }
291