xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/r600_blit_shaders.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2009 Advanced Micro Devices, Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * The above copyright notice and this permission notice (including the next
12*4882a593Smuzhiyun  * paragraph) shall be included in all copies or substantial portions of the
13*4882a593Smuzhiyun  * Software.
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18*4882a593Smuzhiyun  * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
19*4882a593Smuzhiyun  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20*4882a593Smuzhiyun  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21*4882a593Smuzhiyun  * DEALINGS IN THE SOFTWARE.
22*4882a593Smuzhiyun  *
23*4882a593Smuzhiyun  * Authors:
24*4882a593Smuzhiyun  *     Alex Deucher <alexander.deucher@amd.com>
25*4882a593Smuzhiyun  */
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include <linux/bug.h>
28*4882a593Smuzhiyun #include <linux/types.h>
29*4882a593Smuzhiyun #include <linux/kernel.h>
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun /*
32*4882a593Smuzhiyun  * R6xx+ cards need to use the 3D engine to blit data which requires
33*4882a593Smuzhiyun  * quite a bit of hw state setup.  Rather than pull the whole 3D driver
34*4882a593Smuzhiyun  * (which normally generates the 3D state) into the DRM, we opt to use
35*4882a593Smuzhiyun  * statically generated state tables.  The register state and shaders
36*4882a593Smuzhiyun  * were hand generated to support blitting functionality.  See the 3D
37*4882a593Smuzhiyun  * driver or documentation for descriptions of the registers and
38*4882a593Smuzhiyun  * shader instructions.
39*4882a593Smuzhiyun  */
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun const u32 r6xx_default_state[] =
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun 	0xc0002400, /* START_3D_CMDBUF */
44*4882a593Smuzhiyun 	0x00000000,
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	0xc0012800, /* CONTEXT_CONTROL */
47*4882a593Smuzhiyun 	0x80000000,
48*4882a593Smuzhiyun 	0x80000000,
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	0xc0016800,
51*4882a593Smuzhiyun 	0x00000010,
52*4882a593Smuzhiyun 	0x00008000, /* WAIT_UNTIL */
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	0xc0016800,
55*4882a593Smuzhiyun 	0x00000542,
56*4882a593Smuzhiyun 	0x07000003, /* TA_CNTL_AUX */
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	0xc0016800,
59*4882a593Smuzhiyun 	0x000005c5,
60*4882a593Smuzhiyun 	0x00000000, /* VC_ENHANCE */
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	0xc0016800,
63*4882a593Smuzhiyun 	0x00000363,
64*4882a593Smuzhiyun 	0x00000000, /* SQ_DYN_GPR_CNTL_PS_FLUSH_REQ */
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	0xc0016800,
67*4882a593Smuzhiyun 	0x0000060c,
68*4882a593Smuzhiyun 	0x82000000, /* DB_DEBUG */
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	0xc0016800,
71*4882a593Smuzhiyun 	0x0000060e,
72*4882a593Smuzhiyun 	0x01020204, /* DB_WATERMARKS */
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	0xc0026f00,
75*4882a593Smuzhiyun 	0x00000000,
76*4882a593Smuzhiyun 	0x00000000, /* SQ_VTX_BASE_VTX_LOC */
77*4882a593Smuzhiyun 	0x00000000, /* SQ_VTX_START_INST_LOC */
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	0xc0096900,
80*4882a593Smuzhiyun 	0x0000022a,
81*4882a593Smuzhiyun 	0x00000000, /* SQ_ESGS_RING_ITEMSIZE */
82*4882a593Smuzhiyun 	0x00000000,
83*4882a593Smuzhiyun 	0x00000000,
84*4882a593Smuzhiyun 	0x00000000,
85*4882a593Smuzhiyun 	0x00000000,
86*4882a593Smuzhiyun 	0x00000000,
87*4882a593Smuzhiyun 	0x00000000,
88*4882a593Smuzhiyun 	0x00000000,
89*4882a593Smuzhiyun 	0x00000000,
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	0xc0016900,
92*4882a593Smuzhiyun 	0x00000004,
93*4882a593Smuzhiyun 	0x00000000, /* DB_DEPTH_INFO */
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	0xc0026900,
96*4882a593Smuzhiyun 	0x0000000a,
97*4882a593Smuzhiyun 	0x00000000, /* DB_STENCIL_CLEAR */
98*4882a593Smuzhiyun 	0x00000000, /* DB_DEPTH_CLEAR */
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	0xc0016900,
101*4882a593Smuzhiyun 	0x00000200,
102*4882a593Smuzhiyun 	0x00000000, /* DB_DEPTH_CONTROL */
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	0xc0026900,
105*4882a593Smuzhiyun 	0x00000343,
106*4882a593Smuzhiyun 	0x00000060, /* DB_RENDER_CONTROL */
107*4882a593Smuzhiyun 	0x00000040, /* DB_RENDER_OVERRIDE */
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	0xc0016900,
110*4882a593Smuzhiyun 	0x00000351,
111*4882a593Smuzhiyun 	0x0000aa00, /* DB_ALPHA_TO_MASK */
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	0xc00f6900,
114*4882a593Smuzhiyun 	0x00000100,
115*4882a593Smuzhiyun 	0x00000800, /* VGT_MAX_VTX_INDX */
116*4882a593Smuzhiyun 	0x00000000, /* VGT_MIN_VTX_INDX */
117*4882a593Smuzhiyun 	0x00000000, /* VGT_INDX_OFFSET */
118*4882a593Smuzhiyun 	0x00000000, /* VGT_MULTI_PRIM_IB_RESET_INDX */
119*4882a593Smuzhiyun 	0x00000000, /* SX_ALPHA_TEST_CONTROL */
120*4882a593Smuzhiyun 	0x00000000, /* CB_BLEND_RED */
121*4882a593Smuzhiyun 	0x00000000,
122*4882a593Smuzhiyun 	0x00000000,
123*4882a593Smuzhiyun 	0x00000000,
124*4882a593Smuzhiyun 	0x00000000, /* CB_FOG_RED */
125*4882a593Smuzhiyun 	0x00000000,
126*4882a593Smuzhiyun 	0x00000000,
127*4882a593Smuzhiyun 	0x00000000, /* DB_STENCILREFMASK */
128*4882a593Smuzhiyun 	0x00000000, /* DB_STENCILREFMASK_BF */
129*4882a593Smuzhiyun 	0x00000000, /* SX_ALPHA_REF */
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	0xc0046900,
132*4882a593Smuzhiyun 	0x0000030c,
133*4882a593Smuzhiyun 	0x01000000, /* CB_CLRCMP_CNTL */
134*4882a593Smuzhiyun 	0x00000000,
135*4882a593Smuzhiyun 	0x00000000,
136*4882a593Smuzhiyun 	0x00000000,
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	0xc0046900,
139*4882a593Smuzhiyun 	0x00000048,
140*4882a593Smuzhiyun 	0x3f800000, /* CB_CLEAR_RED */
141*4882a593Smuzhiyun 	0x00000000,
142*4882a593Smuzhiyun 	0x3f800000,
143*4882a593Smuzhiyun 	0x3f800000,
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	0xc0016900,
146*4882a593Smuzhiyun 	0x00000080,
147*4882a593Smuzhiyun 	0x00000000, /* PA_SC_WINDOW_OFFSET */
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	0xc00a6900,
150*4882a593Smuzhiyun 	0x00000083,
151*4882a593Smuzhiyun 	0x0000ffff, /* PA_SC_CLIP_RECT_RULE */
152*4882a593Smuzhiyun 	0x00000000, /* PA_SC_CLIPRECT_0_TL */
153*4882a593Smuzhiyun 	0x20002000,
154*4882a593Smuzhiyun 	0x00000000,
155*4882a593Smuzhiyun 	0x20002000,
156*4882a593Smuzhiyun 	0x00000000,
157*4882a593Smuzhiyun 	0x20002000,
158*4882a593Smuzhiyun 	0x00000000,
159*4882a593Smuzhiyun 	0x20002000,
160*4882a593Smuzhiyun 	0x00000000, /* PA_SC_EDGERULE */
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	0xc0406900,
163*4882a593Smuzhiyun 	0x00000094,
164*4882a593Smuzhiyun 	0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
165*4882a593Smuzhiyun 	0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
166*4882a593Smuzhiyun 	0x80000000, /* PA_SC_VPORT_SCISSOR_1_TL */
167*4882a593Smuzhiyun 	0x20002000,
168*4882a593Smuzhiyun 	0x80000000,
169*4882a593Smuzhiyun 	0x20002000,
170*4882a593Smuzhiyun 	0x80000000,
171*4882a593Smuzhiyun 	0x20002000,
172*4882a593Smuzhiyun 	0x80000000,
173*4882a593Smuzhiyun 	0x20002000,
174*4882a593Smuzhiyun 	0x80000000,
175*4882a593Smuzhiyun 	0x20002000,
176*4882a593Smuzhiyun 	0x80000000,
177*4882a593Smuzhiyun 	0x20002000,
178*4882a593Smuzhiyun 	0x80000000,
179*4882a593Smuzhiyun 	0x20002000,
180*4882a593Smuzhiyun 	0x80000000,
181*4882a593Smuzhiyun 	0x20002000,
182*4882a593Smuzhiyun 	0x80000000,
183*4882a593Smuzhiyun 	0x20002000,
184*4882a593Smuzhiyun 	0x80000000,
185*4882a593Smuzhiyun 	0x20002000,
186*4882a593Smuzhiyun 	0x80000000,
187*4882a593Smuzhiyun 	0x20002000,
188*4882a593Smuzhiyun 	0x80000000,
189*4882a593Smuzhiyun 	0x20002000,
190*4882a593Smuzhiyun 	0x80000000,
191*4882a593Smuzhiyun 	0x20002000,
192*4882a593Smuzhiyun 	0x80000000,
193*4882a593Smuzhiyun 	0x20002000,
194*4882a593Smuzhiyun 	0x80000000,
195*4882a593Smuzhiyun 	0x20002000,
196*4882a593Smuzhiyun 	0x00000000, /* PA_SC_VPORT_ZMIN_0 */
197*4882a593Smuzhiyun 	0x3f800000,
198*4882a593Smuzhiyun 	0x00000000,
199*4882a593Smuzhiyun 	0x3f800000,
200*4882a593Smuzhiyun 	0x00000000,
201*4882a593Smuzhiyun 	0x3f800000,
202*4882a593Smuzhiyun 	0x00000000,
203*4882a593Smuzhiyun 	0x3f800000,
204*4882a593Smuzhiyun 	0x00000000,
205*4882a593Smuzhiyun 	0x3f800000,
206*4882a593Smuzhiyun 	0x00000000,
207*4882a593Smuzhiyun 	0x3f800000,
208*4882a593Smuzhiyun 	0x00000000,
209*4882a593Smuzhiyun 	0x3f800000,
210*4882a593Smuzhiyun 	0x00000000,
211*4882a593Smuzhiyun 	0x3f800000,
212*4882a593Smuzhiyun 	0x00000000,
213*4882a593Smuzhiyun 	0x3f800000,
214*4882a593Smuzhiyun 	0x00000000,
215*4882a593Smuzhiyun 	0x3f800000,
216*4882a593Smuzhiyun 	0x00000000,
217*4882a593Smuzhiyun 	0x3f800000,
218*4882a593Smuzhiyun 	0x00000000,
219*4882a593Smuzhiyun 	0x3f800000,
220*4882a593Smuzhiyun 	0x00000000,
221*4882a593Smuzhiyun 	0x3f800000,
222*4882a593Smuzhiyun 	0x00000000,
223*4882a593Smuzhiyun 	0x3f800000,
224*4882a593Smuzhiyun 	0x00000000,
225*4882a593Smuzhiyun 	0x3f800000,
226*4882a593Smuzhiyun 	0x00000000,
227*4882a593Smuzhiyun 	0x3f800000,
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	0xc0026900,
230*4882a593Smuzhiyun 	0x00000292,
231*4882a593Smuzhiyun 	0x00000000, /* PA_SC_MPASS_PS_CNTL */
232*4882a593Smuzhiyun 	0x00004010, /* PA_SC_MODE_CNTL */
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	0xc0096900,
235*4882a593Smuzhiyun 	0x00000300,
236*4882a593Smuzhiyun 	0x00000000, /* PA_SC_LINE_CNTL */
237*4882a593Smuzhiyun 	0x00000000, /* PA_SC_AA_CONFIG */
238*4882a593Smuzhiyun 	0x0000002d, /* PA_SU_VTX_CNTL */
239*4882a593Smuzhiyun 	0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
240*4882a593Smuzhiyun 	0x3f800000,
241*4882a593Smuzhiyun 	0x3f800000,
242*4882a593Smuzhiyun 	0x3f800000,
243*4882a593Smuzhiyun 	0x00000000, /* PA_SC_SAMPLE_LOCS_MCTX */
244*4882a593Smuzhiyun 	0x00000000,
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	0xc0016900,
247*4882a593Smuzhiyun 	0x00000312,
248*4882a593Smuzhiyun 	0xffffffff, /* PA_SC_AA_MASK */
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	0xc0066900,
251*4882a593Smuzhiyun 	0x0000037e,
252*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
253*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POLY_OFFSET_CLAMP */
254*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POLY_OFFSET_FRONT_SCALE */
255*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POLY_OFFSET_FRONT_OFFSET */
256*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POLY_OFFSET_BACK_SCALE */
257*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POLY_OFFSET_BACK_OFFSET */
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	0xc0046900,
260*4882a593Smuzhiyun 	0x000001b6,
261*4882a593Smuzhiyun 	0x00000000, /* SPI_INPUT_Z */
262*4882a593Smuzhiyun 	0x00000000, /* SPI_FOG_CNTL */
263*4882a593Smuzhiyun 	0x00000000, /* SPI_FOG_FUNC_SCALE */
264*4882a593Smuzhiyun 	0x00000000, /* SPI_FOG_FUNC_BIAS */
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	0xc0016900,
267*4882a593Smuzhiyun 	0x00000225,
268*4882a593Smuzhiyun 	0x00000000, /* SQ_PGM_START_FS */
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	0xc0016900,
271*4882a593Smuzhiyun 	0x00000229,
272*4882a593Smuzhiyun 	0x00000000, /* SQ_PGM_RESOURCES_FS */
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	0xc0016900,
275*4882a593Smuzhiyun 	0x00000237,
276*4882a593Smuzhiyun 	0x00000000, /* SQ_PGM_CF_OFFSET_FS */
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	0xc0026900,
279*4882a593Smuzhiyun 	0x000002a8,
280*4882a593Smuzhiyun 	0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
281*4882a593Smuzhiyun 	0x00000000, /* VGT_INSTANCE_STEP_RATE_1 */
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	0xc0116900,
284*4882a593Smuzhiyun 	0x00000280,
285*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POINT_SIZE */
286*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POINT_MINMAX */
287*4882a593Smuzhiyun 	0x00000008, /* PA_SU_LINE_CNTL */
288*4882a593Smuzhiyun 	0x00000000, /* PA_SC_LINE_STIPPLE */
289*4882a593Smuzhiyun 	0x00000000, /* VGT_OUTPUT_PATH_CNTL */
290*4882a593Smuzhiyun 	0x00000000, /* VGT_HOS_CNTL */
291*4882a593Smuzhiyun 	0x00000000, /* VGT_HOS_MAX_TESS_LEVEL */
292*4882a593Smuzhiyun 	0x00000000, /* VGT_HOS_MIN_TESS_LEVEL */
293*4882a593Smuzhiyun 	0x00000000, /* VGT_HOS_REUSE_DEPTH */
294*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_PRIM_TYPE */
295*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_FIRST_DECR */
296*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_DECR */
297*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_VECT_0_CNTL */
298*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_VECT_1_CNTL */
299*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_VECT_0_FMT_CNTL */
300*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_VECT_1_FMT_CNTL */
301*4882a593Smuzhiyun 	0x00000000, /* VGT_GS_MODE */
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	0xc0016900,
304*4882a593Smuzhiyun 	0x000002a1,
305*4882a593Smuzhiyun 	0x00000000, /* VGT_PRIMITIVEID_EN */
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	0xc0016900,
308*4882a593Smuzhiyun 	0x000002a5,
309*4882a593Smuzhiyun 	0x00000000, /* VGT_MULTI_PRIM_ID_RESET_EN */
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	0xc0036900,
312*4882a593Smuzhiyun 	0x000002ac,
313*4882a593Smuzhiyun 	0x00000000, /* VGT_STRMOUT_EN */
314*4882a593Smuzhiyun 	0x00000000, /* VGT_REUSE_OFF */
315*4882a593Smuzhiyun 	0x00000000, /* VGT_VTX_CNT_EN */
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	0xc0016900,
318*4882a593Smuzhiyun 	0x000000d4,
319*4882a593Smuzhiyun 	0x00000000, /* SX_MISC */
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	0xc0016900,
322*4882a593Smuzhiyun 	0x000002c8,
323*4882a593Smuzhiyun 	0x00000000, /* VGT_STRMOUT_BUFFER_EN */
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	0xc0076900,
326*4882a593Smuzhiyun 	0x00000202,
327*4882a593Smuzhiyun 	0x00cc0000, /* CB_COLOR_CONTROL */
328*4882a593Smuzhiyun 	0x00000210, /* DB_SHADER_CNTL */
329*4882a593Smuzhiyun 	0x00010000, /* PA_CL_CLIP_CNTL */
330*4882a593Smuzhiyun 	0x00000244, /* PA_SU_SC_MODE_CNTL */
331*4882a593Smuzhiyun 	0x00000100, /* PA_CL_VTE_CNTL */
332*4882a593Smuzhiyun 	0x00000000, /* PA_CL_VS_OUT_CNTL */
333*4882a593Smuzhiyun 	0x00000000, /* PA_CL_NANINF_CNTL */
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	0xc0026900,
336*4882a593Smuzhiyun 	0x0000008e,
337*4882a593Smuzhiyun 	0x0000000f, /* CB_TARGET_MASK */
338*4882a593Smuzhiyun 	0x0000000f, /* CB_SHADER_MASK */
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	0xc0016900,
341*4882a593Smuzhiyun 	0x000001e8,
342*4882a593Smuzhiyun 	0x00000001, /* CB_SHADER_CONTROL */
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	0xc0016900,
345*4882a593Smuzhiyun 	0x00000185,
346*4882a593Smuzhiyun 	0x00000000, /* SPI_VS_OUT_ID_0 */
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	0xc0016900,
349*4882a593Smuzhiyun 	0x00000191,
350*4882a593Smuzhiyun 	0x00000b00, /* SPI_PS_INPUT_CNTL_0 */
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	0xc0056900,
353*4882a593Smuzhiyun 	0x000001b1,
354*4882a593Smuzhiyun 	0x00000000, /* SPI_VS_OUT_CONFIG */
355*4882a593Smuzhiyun 	0x00000000, /* SPI_THREAD_GROUPING */
356*4882a593Smuzhiyun 	0x00000001, /* SPI_PS_IN_CONTROL_0 */
357*4882a593Smuzhiyun 	0x00000000, /* SPI_PS_IN_CONTROL_1 */
358*4882a593Smuzhiyun 	0x00000000, /* SPI_INTERP_CONTROL_0 */
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	0xc0036e00, /* SET_SAMPLER */
361*4882a593Smuzhiyun 	0x00000000,
362*4882a593Smuzhiyun 	0x00000012,
363*4882a593Smuzhiyun 	0x00000000,
364*4882a593Smuzhiyun 	0x00000000,
365*4882a593Smuzhiyun };
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun const u32 r7xx_default_state[] =
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun 	0xc0012800, /* CONTEXT_CONTROL */
370*4882a593Smuzhiyun 	0x80000000,
371*4882a593Smuzhiyun 	0x80000000,
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	0xc0016800,
374*4882a593Smuzhiyun 	0x00000010,
375*4882a593Smuzhiyun 	0x00008000, /* WAIT_UNTIL */
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 	0xc0016800,
378*4882a593Smuzhiyun 	0x00000542,
379*4882a593Smuzhiyun 	0x07000002, /* TA_CNTL_AUX */
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	0xc0016800,
382*4882a593Smuzhiyun 	0x000005c5,
383*4882a593Smuzhiyun 	0x00000000, /* VC_ENHANCE */
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	0xc0016800,
386*4882a593Smuzhiyun 	0x00000363,
387*4882a593Smuzhiyun 	0x00004000, /* SQ_DYN_GPR_CNTL_PS_FLUSH_REQ */
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	0xc0016800,
390*4882a593Smuzhiyun 	0x0000060c,
391*4882a593Smuzhiyun 	0x00000000, /* DB_DEBUG */
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	0xc0016800,
394*4882a593Smuzhiyun 	0x0000060e,
395*4882a593Smuzhiyun 	0x00420204, /* DB_WATERMARKS */
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	0xc0026f00,
398*4882a593Smuzhiyun 	0x00000000,
399*4882a593Smuzhiyun 	0x00000000, /* SQ_VTX_BASE_VTX_LOC */
400*4882a593Smuzhiyun 	0x00000000, /* SQ_VTX_START_INST_LOC */
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	0xc0096900,
403*4882a593Smuzhiyun 	0x0000022a,
404*4882a593Smuzhiyun 	0x00000000, /* SQ_ESGS_RING_ITEMSIZE */
405*4882a593Smuzhiyun 	0x00000000,
406*4882a593Smuzhiyun 	0x00000000,
407*4882a593Smuzhiyun 	0x00000000,
408*4882a593Smuzhiyun 	0x00000000,
409*4882a593Smuzhiyun 	0x00000000,
410*4882a593Smuzhiyun 	0x00000000,
411*4882a593Smuzhiyun 	0x00000000,
412*4882a593Smuzhiyun 	0x00000000,
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	0xc0016900,
415*4882a593Smuzhiyun 	0x00000004,
416*4882a593Smuzhiyun 	0x00000000, /* DB_DEPTH_INFO */
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 	0xc0026900,
419*4882a593Smuzhiyun 	0x0000000a,
420*4882a593Smuzhiyun 	0x00000000, /* DB_STENCIL_CLEAR */
421*4882a593Smuzhiyun 	0x00000000, /* DB_DEPTH_CLEAR */
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun 	0xc0016900,
424*4882a593Smuzhiyun 	0x00000200,
425*4882a593Smuzhiyun 	0x00000000, /* DB_DEPTH_CONTROL */
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	0xc0026900,
428*4882a593Smuzhiyun 	0x00000343,
429*4882a593Smuzhiyun 	0x00000060, /* DB_RENDER_CONTROL */
430*4882a593Smuzhiyun 	0x00000000, /* DB_RENDER_OVERRIDE */
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	0xc0016900,
433*4882a593Smuzhiyun 	0x00000351,
434*4882a593Smuzhiyun 	0x0000aa00, /* DB_ALPHA_TO_MASK */
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	0xc0096900,
437*4882a593Smuzhiyun 	0x00000100,
438*4882a593Smuzhiyun 	0x00000800, /* VGT_MAX_VTX_INDX */
439*4882a593Smuzhiyun 	0x00000000, /* VGT_MIN_VTX_INDX */
440*4882a593Smuzhiyun 	0x00000000, /* VGT_INDX_OFFSET */
441*4882a593Smuzhiyun 	0x00000000, /* VGT_MULTI_PRIM_IB_RESET_INDX */
442*4882a593Smuzhiyun 	0x00000000, /* SX_ALPHA_TEST_CONTROL */
443*4882a593Smuzhiyun 	0x00000000, /* CB_BLEND_RED */
444*4882a593Smuzhiyun 	0x00000000,
445*4882a593Smuzhiyun 	0x00000000,
446*4882a593Smuzhiyun 	0x00000000,
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 	0xc0036900,
449*4882a593Smuzhiyun 	0x0000010c,
450*4882a593Smuzhiyun 	0x00000000, /* DB_STENCILREFMASK */
451*4882a593Smuzhiyun 	0x00000000, /* DB_STENCILREFMASK_BF */
452*4882a593Smuzhiyun 	0x00000000, /* SX_ALPHA_REF */
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun 	0xc0046900,
455*4882a593Smuzhiyun 	0x0000030c, /* CB_CLRCMP_CNTL */
456*4882a593Smuzhiyun 	0x01000000,
457*4882a593Smuzhiyun 	0x00000000,
458*4882a593Smuzhiyun 	0x00000000,
459*4882a593Smuzhiyun 	0x00000000,
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	0xc0016900,
462*4882a593Smuzhiyun 	0x00000080,
463*4882a593Smuzhiyun 	0x00000000, /* PA_SC_WINDOW_OFFSET */
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	0xc00a6900,
466*4882a593Smuzhiyun 	0x00000083,
467*4882a593Smuzhiyun 	0x0000ffff, /* PA_SC_CLIP_RECT_RULE */
468*4882a593Smuzhiyun 	0x00000000, /* PA_SC_CLIPRECT_0_TL */
469*4882a593Smuzhiyun 	0x20002000,
470*4882a593Smuzhiyun 	0x00000000,
471*4882a593Smuzhiyun 	0x20002000,
472*4882a593Smuzhiyun 	0x00000000,
473*4882a593Smuzhiyun 	0x20002000,
474*4882a593Smuzhiyun 	0x00000000,
475*4882a593Smuzhiyun 	0x20002000,
476*4882a593Smuzhiyun 	0xaaaaaaaa, /* PA_SC_EDGERULE */
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun 	0xc0406900,
479*4882a593Smuzhiyun 	0x00000094,
480*4882a593Smuzhiyun 	0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
481*4882a593Smuzhiyun 	0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
482*4882a593Smuzhiyun 	0x80000000, /* PA_SC_VPORT_SCISSOR_1_TL */
483*4882a593Smuzhiyun 	0x20002000,
484*4882a593Smuzhiyun 	0x80000000,
485*4882a593Smuzhiyun 	0x20002000,
486*4882a593Smuzhiyun 	0x80000000,
487*4882a593Smuzhiyun 	0x20002000,
488*4882a593Smuzhiyun 	0x80000000,
489*4882a593Smuzhiyun 	0x20002000,
490*4882a593Smuzhiyun 	0x80000000,
491*4882a593Smuzhiyun 	0x20002000,
492*4882a593Smuzhiyun 	0x80000000,
493*4882a593Smuzhiyun 	0x20002000,
494*4882a593Smuzhiyun 	0x80000000,
495*4882a593Smuzhiyun 	0x20002000,
496*4882a593Smuzhiyun 	0x80000000,
497*4882a593Smuzhiyun 	0x20002000,
498*4882a593Smuzhiyun 	0x80000000,
499*4882a593Smuzhiyun 	0x20002000,
500*4882a593Smuzhiyun 	0x80000000,
501*4882a593Smuzhiyun 	0x20002000,
502*4882a593Smuzhiyun 	0x80000000,
503*4882a593Smuzhiyun 	0x20002000,
504*4882a593Smuzhiyun 	0x80000000,
505*4882a593Smuzhiyun 	0x20002000,
506*4882a593Smuzhiyun 	0x80000000,
507*4882a593Smuzhiyun 	0x20002000,
508*4882a593Smuzhiyun 	0x80000000,
509*4882a593Smuzhiyun 	0x20002000,
510*4882a593Smuzhiyun 	0x80000000,
511*4882a593Smuzhiyun 	0x20002000,
512*4882a593Smuzhiyun 	0x00000000, /* PA_SC_VPORT_ZMIN_0 */
513*4882a593Smuzhiyun 	0x3f800000,
514*4882a593Smuzhiyun 	0x00000000,
515*4882a593Smuzhiyun 	0x3f800000,
516*4882a593Smuzhiyun 	0x00000000,
517*4882a593Smuzhiyun 	0x3f800000,
518*4882a593Smuzhiyun 	0x00000000,
519*4882a593Smuzhiyun 	0x3f800000,
520*4882a593Smuzhiyun 	0x00000000,
521*4882a593Smuzhiyun 	0x3f800000,
522*4882a593Smuzhiyun 	0x00000000,
523*4882a593Smuzhiyun 	0x3f800000,
524*4882a593Smuzhiyun 	0x00000000,
525*4882a593Smuzhiyun 	0x3f800000,
526*4882a593Smuzhiyun 	0x00000000,
527*4882a593Smuzhiyun 	0x3f800000,
528*4882a593Smuzhiyun 	0x00000000,
529*4882a593Smuzhiyun 	0x3f800000,
530*4882a593Smuzhiyun 	0x00000000,
531*4882a593Smuzhiyun 	0x3f800000,
532*4882a593Smuzhiyun 	0x00000000,
533*4882a593Smuzhiyun 	0x3f800000,
534*4882a593Smuzhiyun 	0x00000000,
535*4882a593Smuzhiyun 	0x3f800000,
536*4882a593Smuzhiyun 	0x00000000,
537*4882a593Smuzhiyun 	0x3f800000,
538*4882a593Smuzhiyun 	0x00000000,
539*4882a593Smuzhiyun 	0x3f800000,
540*4882a593Smuzhiyun 	0x00000000,
541*4882a593Smuzhiyun 	0x3f800000,
542*4882a593Smuzhiyun 	0x00000000,
543*4882a593Smuzhiyun 	0x3f800000,
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	0xc0026900,
546*4882a593Smuzhiyun 	0x00000292,
547*4882a593Smuzhiyun 	0x00000000, /* PA_SC_MPASS_PS_CNTL */
548*4882a593Smuzhiyun 	0x00514000, /* PA_SC_MODE_CNTL */
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	0xc0096900,
551*4882a593Smuzhiyun 	0x00000300,
552*4882a593Smuzhiyun 	0x00000000, /* PA_SC_LINE_CNTL */
553*4882a593Smuzhiyun 	0x00000000, /* PA_SC_AA_CONFIG */
554*4882a593Smuzhiyun 	0x0000002d, /* PA_SU_VTX_CNTL */
555*4882a593Smuzhiyun 	0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
556*4882a593Smuzhiyun 	0x3f800000,
557*4882a593Smuzhiyun 	0x3f800000,
558*4882a593Smuzhiyun 	0x3f800000,
559*4882a593Smuzhiyun 	0x00000000, /* PA_SC_SAMPLE_LOCS_MCTX */
560*4882a593Smuzhiyun 	0x00000000,
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun 	0xc0016900,
563*4882a593Smuzhiyun 	0x00000312,
564*4882a593Smuzhiyun 	0xffffffff, /* PA_SC_AA_MASK */
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 	0xc0066900,
567*4882a593Smuzhiyun 	0x0000037e,
568*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
569*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POLY_OFFSET_CLAMP */
570*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POLY_OFFSET_FRONT_SCALE */
571*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POLY_OFFSET_FRONT_OFFSET */
572*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POLY_OFFSET_BACK_SCALE */
573*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POLY_OFFSET_BACK_OFFSET */
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun 	0xc0046900,
576*4882a593Smuzhiyun 	0x000001b6,
577*4882a593Smuzhiyun 	0x00000000, /* SPI_INPUT_Z */
578*4882a593Smuzhiyun 	0x00000000, /* SPI_FOG_CNTL */
579*4882a593Smuzhiyun 	0x00000000, /* SPI_FOG_FUNC_SCALE */
580*4882a593Smuzhiyun 	0x00000000, /* SPI_FOG_FUNC_BIAS */
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun 	0xc0016900,
583*4882a593Smuzhiyun 	0x00000225,
584*4882a593Smuzhiyun 	0x00000000, /* SQ_PGM_START_FS */
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	0xc0016900,
587*4882a593Smuzhiyun 	0x00000229,
588*4882a593Smuzhiyun 	0x00000000, /* SQ_PGM_RESOURCES_FS */
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	0xc0016900,
591*4882a593Smuzhiyun 	0x00000237,
592*4882a593Smuzhiyun 	0x00000000, /* SQ_PGM_CF_OFFSET_FS */
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	0xc0026900,
595*4882a593Smuzhiyun 	0x000002a8,
596*4882a593Smuzhiyun 	0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
597*4882a593Smuzhiyun 	0x00000000, /* VGT_INSTANCE_STEP_RATE_1 */
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun 	0xc0116900,
600*4882a593Smuzhiyun 	0x00000280,
601*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POINT_SIZE */
602*4882a593Smuzhiyun 	0x00000000, /* PA_SU_POINT_MINMAX */
603*4882a593Smuzhiyun 	0x00000008, /* PA_SU_LINE_CNTL */
604*4882a593Smuzhiyun 	0x00000000, /* PA_SC_LINE_STIPPLE */
605*4882a593Smuzhiyun 	0x00000000, /* VGT_OUTPUT_PATH_CNTL */
606*4882a593Smuzhiyun 	0x00000000, /* VGT_HOS_CNTL */
607*4882a593Smuzhiyun 	0x00000000, /* VGT_HOS_MAX_TESS_LEVEL */
608*4882a593Smuzhiyun 	0x00000000, /* VGT_HOS_MIN_TESS_LEVEL */
609*4882a593Smuzhiyun 	0x00000000, /* VGT_HOS_REUSE_DEPTH */
610*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_PRIM_TYPE */
611*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_FIRST_DECR */
612*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_DECR */
613*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_VECT_0_CNTL */
614*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_VECT_1_CNTL */
615*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_VECT_0_FMT_CNTL */
616*4882a593Smuzhiyun 	0x00000000, /* VGT_GROUP_VECT_1_FMT_CNTL */
617*4882a593Smuzhiyun 	0x00000000, /* VGT_GS_MODE */
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun 	0xc0016900,
620*4882a593Smuzhiyun 	0x000002a1,
621*4882a593Smuzhiyun 	0x00000000, /* VGT_PRIMITIVEID_EN */
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 	0xc0016900,
624*4882a593Smuzhiyun 	0x000002a5,
625*4882a593Smuzhiyun 	0x00000000, /* VGT_MULTI_PRIM_ID_RESET_EN */
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	0xc0036900,
628*4882a593Smuzhiyun 	0x000002ac,
629*4882a593Smuzhiyun 	0x00000000, /* VGT_STRMOUT_EN */
630*4882a593Smuzhiyun 	0x00000000, /* VGT_REUSE_OFF */
631*4882a593Smuzhiyun 	0x00000000, /* VGT_VTX_CNT_EN */
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 	0xc0016900,
634*4882a593Smuzhiyun 	0x000000d4,
635*4882a593Smuzhiyun 	0x00000000, /* SX_MISC */
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 	0xc0016900,
638*4882a593Smuzhiyun 	0x000002c8,
639*4882a593Smuzhiyun 	0x00000000, /* VGT_STRMOUT_BUFFER_EN */
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun 	0xc0076900,
642*4882a593Smuzhiyun 	0x00000202,
643*4882a593Smuzhiyun 	0x00cc0000, /* CB_COLOR_CONTROL */
644*4882a593Smuzhiyun 	0x00000210, /* DB_SHADER_CNTL */
645*4882a593Smuzhiyun 	0x00010000, /* PA_CL_CLIP_CNTL */
646*4882a593Smuzhiyun 	0x00000244, /* PA_SU_SC_MODE_CNTL */
647*4882a593Smuzhiyun 	0x00000100, /* PA_CL_VTE_CNTL */
648*4882a593Smuzhiyun 	0x00000000, /* PA_CL_VS_OUT_CNTL */
649*4882a593Smuzhiyun 	0x00000000, /* PA_CL_NANINF_CNTL */
650*4882a593Smuzhiyun 
651*4882a593Smuzhiyun 	0xc0026900,
652*4882a593Smuzhiyun 	0x0000008e,
653*4882a593Smuzhiyun 	0x0000000f, /* CB_TARGET_MASK */
654*4882a593Smuzhiyun 	0x0000000f, /* CB_SHADER_MASK */
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	0xc0016900,
657*4882a593Smuzhiyun 	0x000001e8,
658*4882a593Smuzhiyun 	0x00000001, /* CB_SHADER_CONTROL */
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun 	0xc0016900,
661*4882a593Smuzhiyun 	0x00000185,
662*4882a593Smuzhiyun 	0x00000000, /* SPI_VS_OUT_ID_0 */
663*4882a593Smuzhiyun 
664*4882a593Smuzhiyun 	0xc0016900,
665*4882a593Smuzhiyun 	0x00000191,
666*4882a593Smuzhiyun 	0x00000b00, /* SPI_PS_INPUT_CNTL_0 */
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 	0xc0056900,
669*4882a593Smuzhiyun 	0x000001b1,
670*4882a593Smuzhiyun 	0x00000000, /* SPI_VS_OUT_CONFIG */
671*4882a593Smuzhiyun 	0x00000001, /* SPI_THREAD_GROUPING */
672*4882a593Smuzhiyun 	0x00000001, /* SPI_PS_IN_CONTROL_0 */
673*4882a593Smuzhiyun 	0x00000000, /* SPI_PS_IN_CONTROL_1 */
674*4882a593Smuzhiyun 	0x00000000, /* SPI_INTERP_CONTROL_0 */
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun 	0xc0036e00, /* SET_SAMPLER */
677*4882a593Smuzhiyun 	0x00000000,
678*4882a593Smuzhiyun 	0x00000012,
679*4882a593Smuzhiyun 	0x00000000,
680*4882a593Smuzhiyun 	0x00000000,
681*4882a593Smuzhiyun };
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun /* same for r6xx/r7xx */
684*4882a593Smuzhiyun const u32 r6xx_vs[] =
685*4882a593Smuzhiyun {
686*4882a593Smuzhiyun 	0x00000004,
687*4882a593Smuzhiyun 	0x81000000,
688*4882a593Smuzhiyun 	0x0000203c,
689*4882a593Smuzhiyun 	0x94000b08,
690*4882a593Smuzhiyun 	0x00004000,
691*4882a593Smuzhiyun 	0x14200b1a,
692*4882a593Smuzhiyun 	0x00000000,
693*4882a593Smuzhiyun 	0x00000000,
694*4882a593Smuzhiyun 	0x3c000000,
695*4882a593Smuzhiyun 	0x68cd1000,
696*4882a593Smuzhiyun #ifdef __BIG_ENDIAN
697*4882a593Smuzhiyun 	0x000a0000,
698*4882a593Smuzhiyun #else
699*4882a593Smuzhiyun 	0x00080000,
700*4882a593Smuzhiyun #endif
701*4882a593Smuzhiyun 	0x00000000,
702*4882a593Smuzhiyun };
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun const u32 r6xx_ps[] =
705*4882a593Smuzhiyun {
706*4882a593Smuzhiyun 	0x00000002,
707*4882a593Smuzhiyun 	0x80800000,
708*4882a593Smuzhiyun 	0x00000000,
709*4882a593Smuzhiyun 	0x94200688,
710*4882a593Smuzhiyun 	0x00000010,
711*4882a593Smuzhiyun 	0x000d1000,
712*4882a593Smuzhiyun 	0xb0800000,
713*4882a593Smuzhiyun 	0x00000000,
714*4882a593Smuzhiyun };
715*4882a593Smuzhiyun 
716*4882a593Smuzhiyun const u32 r6xx_ps_size = ARRAY_SIZE(r6xx_ps);
717*4882a593Smuzhiyun const u32 r6xx_vs_size = ARRAY_SIZE(r6xx_vs);
718*4882a593Smuzhiyun const u32 r6xx_default_size = ARRAY_SIZE(r6xx_default_state);
719*4882a593Smuzhiyun const u32 r7xx_default_size = ARRAY_SIZE(r7xx_default_state);
720