1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2008 Advanced Micro Devices, Inc. 3*4882a593Smuzhiyun * Copyright 2008 Red Hat Inc. 4*4882a593Smuzhiyun * Copyright 2009 Jerome Glisse. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a 7*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"), 8*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation 9*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the 11*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions: 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in 14*4882a593Smuzhiyun * all copies or substantial portions of the Software. 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 23*4882a593Smuzhiyun * 24*4882a593Smuzhiyun * Authors: Dave Airlie 25*4882a593Smuzhiyun * Alex Deucher 26*4882a593Smuzhiyun * Jerome Glisse 27*4882a593Smuzhiyun */ 28*4882a593Smuzhiyun #ifndef __R300D_H__ 29*4882a593Smuzhiyun #define __R300D_H__ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define CP_PACKET0 0x00000000 32*4882a593Smuzhiyun #define PACKET0_BASE_INDEX_SHIFT 0 33*4882a593Smuzhiyun #define PACKET0_BASE_INDEX_MASK (0x1ffff << 0) 34*4882a593Smuzhiyun #define PACKET0_COUNT_SHIFT 16 35*4882a593Smuzhiyun #define PACKET0_COUNT_MASK (0x3fff << 16) 36*4882a593Smuzhiyun #define CP_PACKET1 0x40000000 37*4882a593Smuzhiyun #define CP_PACKET2 0x80000000 38*4882a593Smuzhiyun #define PACKET2_PAD_SHIFT 0 39*4882a593Smuzhiyun #define PACKET2_PAD_MASK (0x3fffffff << 0) 40*4882a593Smuzhiyun #define CP_PACKET3 0xC0000000 41*4882a593Smuzhiyun #define PACKET3_IT_OPCODE_SHIFT 8 42*4882a593Smuzhiyun #define PACKET3_IT_OPCODE_MASK (0xff << 8) 43*4882a593Smuzhiyun #define PACKET3_COUNT_SHIFT 16 44*4882a593Smuzhiyun #define PACKET3_COUNT_MASK (0x3fff << 16) 45*4882a593Smuzhiyun /* PACKET3 op code */ 46*4882a593Smuzhiyun #define PACKET3_NOP 0x10 47*4882a593Smuzhiyun #define PACKET3_3D_DRAW_VBUF 0x28 48*4882a593Smuzhiyun #define PACKET3_3D_DRAW_IMMD 0x29 49*4882a593Smuzhiyun #define PACKET3_3D_DRAW_INDX 0x2A 50*4882a593Smuzhiyun #define PACKET3_3D_LOAD_VBPNTR 0x2F 51*4882a593Smuzhiyun #define PACKET3_3D_CLEAR_ZMASK 0x32 52*4882a593Smuzhiyun #define PACKET3_INDX_BUFFER 0x33 53*4882a593Smuzhiyun #define PACKET3_3D_DRAW_VBUF_2 0x34 54*4882a593Smuzhiyun #define PACKET3_3D_DRAW_IMMD_2 0x35 55*4882a593Smuzhiyun #define PACKET3_3D_DRAW_INDX_2 0x36 56*4882a593Smuzhiyun #define PACKET3_3D_CLEAR_HIZ 0x37 57*4882a593Smuzhiyun #define PACKET3_3D_CLEAR_CMASK 0x38 58*4882a593Smuzhiyun #define PACKET3_BITBLT_MULTI 0x9B 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define PACKET0(reg, n) (CP_PACKET0 | \ 61*4882a593Smuzhiyun REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) | \ 62*4882a593Smuzhiyun REG_SET(PACKET0_COUNT, (n))) 63*4882a593Smuzhiyun #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) 64*4882a593Smuzhiyun #define PACKET3(op, n) (CP_PACKET3 | \ 65*4882a593Smuzhiyun REG_SET(PACKET3_IT_OPCODE, (op)) | \ 66*4882a593Smuzhiyun REG_SET(PACKET3_COUNT, (n))) 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* Registers */ 69*4882a593Smuzhiyun #define R_000148_MC_FB_LOCATION 0x000148 70*4882a593Smuzhiyun #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) 71*4882a593Smuzhiyun #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) 72*4882a593Smuzhiyun #define C_000148_MC_FB_START 0xFFFF0000 73*4882a593Smuzhiyun #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) 74*4882a593Smuzhiyun #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) 75*4882a593Smuzhiyun #define C_000148_MC_FB_TOP 0x0000FFFF 76*4882a593Smuzhiyun #define R_00014C_MC_AGP_LOCATION 0x00014C 77*4882a593Smuzhiyun #define S_00014C_MC_AGP_START(x) (((x) & 0xFFFF) << 0) 78*4882a593Smuzhiyun #define G_00014C_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) 79*4882a593Smuzhiyun #define C_00014C_MC_AGP_START 0xFFFF0000 80*4882a593Smuzhiyun #define S_00014C_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) 81*4882a593Smuzhiyun #define G_00014C_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) 82*4882a593Smuzhiyun #define C_00014C_MC_AGP_TOP 0x0000FFFF 83*4882a593Smuzhiyun #define R_00015C_AGP_BASE_2 0x00015C 84*4882a593Smuzhiyun #define S_00015C_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) 85*4882a593Smuzhiyun #define G_00015C_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) 86*4882a593Smuzhiyun #define C_00015C_AGP_BASE_ADDR_2 0xFFFFFFF0 87*4882a593Smuzhiyun #define R_000170_AGP_BASE 0x000170 88*4882a593Smuzhiyun #define S_000170_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) 89*4882a593Smuzhiyun #define G_000170_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) 90*4882a593Smuzhiyun #define C_000170_AGP_BASE_ADDR 0x00000000 91*4882a593Smuzhiyun #define R_0007C0_CP_STAT 0x0007C0 92*4882a593Smuzhiyun #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) 93*4882a593Smuzhiyun #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) 94*4882a593Smuzhiyun #define C_0007C0_MRU_BUSY 0xFFFFFFFE 95*4882a593Smuzhiyun #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) 96*4882a593Smuzhiyun #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) 97*4882a593Smuzhiyun #define C_0007C0_MWU_BUSY 0xFFFFFFFD 98*4882a593Smuzhiyun #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) 99*4882a593Smuzhiyun #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) 100*4882a593Smuzhiyun #define C_0007C0_RSIU_BUSY 0xFFFFFFFB 101*4882a593Smuzhiyun #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) 102*4882a593Smuzhiyun #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) 103*4882a593Smuzhiyun #define C_0007C0_RCIU_BUSY 0xFFFFFFF7 104*4882a593Smuzhiyun #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) 105*4882a593Smuzhiyun #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) 106*4882a593Smuzhiyun #define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF 107*4882a593Smuzhiyun #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) 108*4882a593Smuzhiyun #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) 109*4882a593Smuzhiyun #define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF 110*4882a593Smuzhiyun #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) 111*4882a593Smuzhiyun #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) 112*4882a593Smuzhiyun #define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF 113*4882a593Smuzhiyun #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) 114*4882a593Smuzhiyun #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) 115*4882a593Smuzhiyun #define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF 116*4882a593Smuzhiyun #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) 117*4882a593Smuzhiyun #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) 118*4882a593Smuzhiyun #define C_0007C0_CSI_BUSY 0xFFFFDFFF 119*4882a593Smuzhiyun #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) 120*4882a593Smuzhiyun #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) 121*4882a593Smuzhiyun #define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF 122*4882a593Smuzhiyun #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) 123*4882a593Smuzhiyun #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) 124*4882a593Smuzhiyun #define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF 125*4882a593Smuzhiyun #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) 126*4882a593Smuzhiyun #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) 127*4882a593Smuzhiyun #define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF 128*4882a593Smuzhiyun #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) 129*4882a593Smuzhiyun #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) 130*4882a593Smuzhiyun #define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF 131*4882a593Smuzhiyun #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) 132*4882a593Smuzhiyun #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) 133*4882a593Smuzhiyun #define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF 134*4882a593Smuzhiyun #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) 135*4882a593Smuzhiyun #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) 136*4882a593Smuzhiyun #define C_0007C0_CP_BUSY 0x7FFFFFFF 137*4882a593Smuzhiyun #define R_000E40_RBBM_STATUS 0x000E40 138*4882a593Smuzhiyun #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) 139*4882a593Smuzhiyun #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) 140*4882a593Smuzhiyun #define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80 141*4882a593Smuzhiyun #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) 142*4882a593Smuzhiyun #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) 143*4882a593Smuzhiyun #define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF 144*4882a593Smuzhiyun #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) 145*4882a593Smuzhiyun #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) 146*4882a593Smuzhiyun #define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF 147*4882a593Smuzhiyun #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) 148*4882a593Smuzhiyun #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) 149*4882a593Smuzhiyun #define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF 150*4882a593Smuzhiyun #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) 151*4882a593Smuzhiyun #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) 152*4882a593Smuzhiyun #define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF 153*4882a593Smuzhiyun #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) 154*4882a593Smuzhiyun #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) 155*4882a593Smuzhiyun #define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF 156*4882a593Smuzhiyun #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) 157*4882a593Smuzhiyun #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) 158*4882a593Smuzhiyun #define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF 159*4882a593Smuzhiyun #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) 160*4882a593Smuzhiyun #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) 161*4882a593Smuzhiyun #define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF 162*4882a593Smuzhiyun #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) 163*4882a593Smuzhiyun #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) 164*4882a593Smuzhiyun #define C_000E40_ENG_EV_BUSY 0xFFFF7FFF 165*4882a593Smuzhiyun #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) 166*4882a593Smuzhiyun #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) 167*4882a593Smuzhiyun #define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF 168*4882a593Smuzhiyun #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) 169*4882a593Smuzhiyun #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) 170*4882a593Smuzhiyun #define C_000E40_E2_BUSY 0xFFFDFFFF 171*4882a593Smuzhiyun #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) 172*4882a593Smuzhiyun #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) 173*4882a593Smuzhiyun #define C_000E40_RB2D_BUSY 0xFFFBFFFF 174*4882a593Smuzhiyun #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) 175*4882a593Smuzhiyun #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) 176*4882a593Smuzhiyun #define C_000E40_RB3D_BUSY 0xFFF7FFFF 177*4882a593Smuzhiyun #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) 178*4882a593Smuzhiyun #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) 179*4882a593Smuzhiyun #define C_000E40_VAP_BUSY 0xFFEFFFFF 180*4882a593Smuzhiyun #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) 181*4882a593Smuzhiyun #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) 182*4882a593Smuzhiyun #define C_000E40_RE_BUSY 0xFFDFFFFF 183*4882a593Smuzhiyun #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) 184*4882a593Smuzhiyun #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) 185*4882a593Smuzhiyun #define C_000E40_TAM_BUSY 0xFFBFFFFF 186*4882a593Smuzhiyun #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) 187*4882a593Smuzhiyun #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) 188*4882a593Smuzhiyun #define C_000E40_TDM_BUSY 0xFF7FFFFF 189*4882a593Smuzhiyun #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) 190*4882a593Smuzhiyun #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) 191*4882a593Smuzhiyun #define C_000E40_PB_BUSY 0xFEFFFFFF 192*4882a593Smuzhiyun #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) 193*4882a593Smuzhiyun #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) 194*4882a593Smuzhiyun #define C_000E40_TIM_BUSY 0xFDFFFFFF 195*4882a593Smuzhiyun #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) 196*4882a593Smuzhiyun #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) 197*4882a593Smuzhiyun #define C_000E40_GA_BUSY 0xFBFFFFFF 198*4882a593Smuzhiyun #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) 199*4882a593Smuzhiyun #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) 200*4882a593Smuzhiyun #define C_000E40_CBA2D_BUSY 0xF7FFFFFF 201*4882a593Smuzhiyun #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) 202*4882a593Smuzhiyun #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) 203*4882a593Smuzhiyun #define C_000E40_GUI_ACTIVE 0x7FFFFFFF 204*4882a593Smuzhiyun #define R_0000F0_RBBM_SOFT_RESET 0x0000F0 205*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) 206*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) 207*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_CP 0xFFFFFFFE 208*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) 209*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) 210*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_HI 0xFFFFFFFD 211*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2) 212*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1) 213*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_VAP 0xFFFFFFFB 214*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) 215*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) 216*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_RE 0xFFFFFFF7 217*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) 218*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) 219*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_PP 0xFFFFFFEF 220*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_E2(x) (((x) & 0x1) << 5) 221*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_E2(x) (((x) >> 5) & 0x1) 222*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_E2 0xFFFFFFDF 223*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_RB(x) (((x) & 0x1) << 6) 224*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_RB(x) (((x) >> 6) & 0x1) 225*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_RB 0xFFFFFFBF 226*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_HDP(x) (((x) & 0x1) << 7) 227*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_HDP(x) (((x) >> 7) & 0x1) 228*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_HDP 0xFFFFFF7F 229*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_MC(x) (((x) & 0x1) << 8) 230*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_MC(x) (((x) >> 8) & 0x1) 231*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_MC 0xFFFFFEFF 232*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_AIC(x) (((x) & 0x1) << 9) 233*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_AIC(x) (((x) >> 9) & 0x1) 234*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_AIC 0xFFFFFDFF 235*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_VIP(x) (((x) & 0x1) << 10) 236*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_VIP(x) (((x) >> 10) & 0x1) 237*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_VIP 0xFFFFFBFF 238*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_DISP(x) (((x) & 0x1) << 11) 239*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_DISP(x) (((x) >> 11) & 0x1) 240*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_DISP 0xFFFFF7FF 241*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_CG(x) (((x) & 0x1) << 12) 242*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_CG(x) (((x) >> 12) & 0x1) 243*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_CG 0xFFFFEFFF 244*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_GA(x) (((x) & 0x1) << 13) 245*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_GA(x) (((x) >> 13) & 0x1) 246*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_GA 0xFFFFDFFF 247*4882a593Smuzhiyun #define S_0000F0_SOFT_RESET_IDCT(x) (((x) & 0x1) << 14) 248*4882a593Smuzhiyun #define G_0000F0_SOFT_RESET_IDCT(x) (((x) >> 14) & 0x1) 249*4882a593Smuzhiyun #define C_0000F0_SOFT_RESET_IDCT 0xFFFFBFFF 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun #define R_00000D_SCLK_CNTL 0x00000D 252*4882a593Smuzhiyun #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0) 253*4882a593Smuzhiyun #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7) 254*4882a593Smuzhiyun #define C_00000D_SCLK_SRC_SEL 0xFFFFFFF8 255*4882a593Smuzhiyun #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3) 256*4882a593Smuzhiyun #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1) 257*4882a593Smuzhiyun #define C_00000D_CP_MAX_DYN_STOP_LAT 0xFFFFFFF7 258*4882a593Smuzhiyun #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4) 259*4882a593Smuzhiyun #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1) 260*4882a593Smuzhiyun #define C_00000D_HDP_MAX_DYN_STOP_LAT 0xFFFFFFEF 261*4882a593Smuzhiyun #define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5) 262*4882a593Smuzhiyun #define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1) 263*4882a593Smuzhiyun #define C_00000D_TV_MAX_DYN_STOP_LAT 0xFFFFFFDF 264*4882a593Smuzhiyun #define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6) 265*4882a593Smuzhiyun #define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1) 266*4882a593Smuzhiyun #define C_00000D_E2_MAX_DYN_STOP_LAT 0xFFFFFFBF 267*4882a593Smuzhiyun #define S_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 7) 268*4882a593Smuzhiyun #define G_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) >> 7) & 0x1) 269*4882a593Smuzhiyun #define C_00000D_SE_MAX_DYN_STOP_LAT 0xFFFFFF7F 270*4882a593Smuzhiyun #define S_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 8) 271*4882a593Smuzhiyun #define G_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 8) & 0x1) 272*4882a593Smuzhiyun #define C_00000D_IDCT_MAX_DYN_STOP_LAT 0xFFFFFEFF 273*4882a593Smuzhiyun #define S_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 9) 274*4882a593Smuzhiyun #define G_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) >> 9) & 0x1) 275*4882a593Smuzhiyun #define C_00000D_VIP_MAX_DYN_STOP_LAT 0xFFFFFDFF 276*4882a593Smuzhiyun #define S_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 10) 277*4882a593Smuzhiyun #define G_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) >> 10) & 0x1) 278*4882a593Smuzhiyun #define C_00000D_RE_MAX_DYN_STOP_LAT 0xFFFFFBFF 279*4882a593Smuzhiyun #define S_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 11) 280*4882a593Smuzhiyun #define G_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) >> 11) & 0x1) 281*4882a593Smuzhiyun #define C_00000D_PB_MAX_DYN_STOP_LAT 0xFFFFF7FF 282*4882a593Smuzhiyun #define S_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 12) 283*4882a593Smuzhiyun #define G_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) >> 12) & 0x1) 284*4882a593Smuzhiyun #define C_00000D_TAM_MAX_DYN_STOP_LAT 0xFFFFEFFF 285*4882a593Smuzhiyun #define S_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 13) 286*4882a593Smuzhiyun #define G_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) >> 13) & 0x1) 287*4882a593Smuzhiyun #define C_00000D_TDM_MAX_DYN_STOP_LAT 0xFFFFDFFF 288*4882a593Smuzhiyun #define S_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 14) 289*4882a593Smuzhiyun #define G_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) >> 14) & 0x1) 290*4882a593Smuzhiyun #define C_00000D_RB_MAX_DYN_STOP_LAT 0xFFFFBFFF 291*4882a593Smuzhiyun #define S_00000D_FORCE_DISP2(x) (((x) & 0x1) << 15) 292*4882a593Smuzhiyun #define G_00000D_FORCE_DISP2(x) (((x) >> 15) & 0x1) 293*4882a593Smuzhiyun #define C_00000D_FORCE_DISP2 0xFFFF7FFF 294*4882a593Smuzhiyun #define S_00000D_FORCE_CP(x) (((x) & 0x1) << 16) 295*4882a593Smuzhiyun #define G_00000D_FORCE_CP(x) (((x) >> 16) & 0x1) 296*4882a593Smuzhiyun #define C_00000D_FORCE_CP 0xFFFEFFFF 297*4882a593Smuzhiyun #define S_00000D_FORCE_HDP(x) (((x) & 0x1) << 17) 298*4882a593Smuzhiyun #define G_00000D_FORCE_HDP(x) (((x) >> 17) & 0x1) 299*4882a593Smuzhiyun #define C_00000D_FORCE_HDP 0xFFFDFFFF 300*4882a593Smuzhiyun #define S_00000D_FORCE_DISP1(x) (((x) & 0x1) << 18) 301*4882a593Smuzhiyun #define G_00000D_FORCE_DISP1(x) (((x) >> 18) & 0x1) 302*4882a593Smuzhiyun #define C_00000D_FORCE_DISP1 0xFFFBFFFF 303*4882a593Smuzhiyun #define S_00000D_FORCE_TOP(x) (((x) & 0x1) << 19) 304*4882a593Smuzhiyun #define G_00000D_FORCE_TOP(x) (((x) >> 19) & 0x1) 305*4882a593Smuzhiyun #define C_00000D_FORCE_TOP 0xFFF7FFFF 306*4882a593Smuzhiyun #define S_00000D_FORCE_E2(x) (((x) & 0x1) << 20) 307*4882a593Smuzhiyun #define G_00000D_FORCE_E2(x) (((x) >> 20) & 0x1) 308*4882a593Smuzhiyun #define C_00000D_FORCE_E2 0xFFEFFFFF 309*4882a593Smuzhiyun #define S_00000D_FORCE_SE(x) (((x) & 0x1) << 21) 310*4882a593Smuzhiyun #define G_00000D_FORCE_SE(x) (((x) >> 21) & 0x1) 311*4882a593Smuzhiyun #define C_00000D_FORCE_SE 0xFFDFFFFF 312*4882a593Smuzhiyun #define S_00000D_FORCE_IDCT(x) (((x) & 0x1) << 22) 313*4882a593Smuzhiyun #define G_00000D_FORCE_IDCT(x) (((x) >> 22) & 0x1) 314*4882a593Smuzhiyun #define C_00000D_FORCE_IDCT 0xFFBFFFFF 315*4882a593Smuzhiyun #define S_00000D_FORCE_VIP(x) (((x) & 0x1) << 23) 316*4882a593Smuzhiyun #define G_00000D_FORCE_VIP(x) (((x) >> 23) & 0x1) 317*4882a593Smuzhiyun #define C_00000D_FORCE_VIP 0xFF7FFFFF 318*4882a593Smuzhiyun #define S_00000D_FORCE_RE(x) (((x) & 0x1) << 24) 319*4882a593Smuzhiyun #define G_00000D_FORCE_RE(x) (((x) >> 24) & 0x1) 320*4882a593Smuzhiyun #define C_00000D_FORCE_RE 0xFEFFFFFF 321*4882a593Smuzhiyun #define S_00000D_FORCE_PB(x) (((x) & 0x1) << 25) 322*4882a593Smuzhiyun #define G_00000D_FORCE_PB(x) (((x) >> 25) & 0x1) 323*4882a593Smuzhiyun #define C_00000D_FORCE_PB 0xFDFFFFFF 324*4882a593Smuzhiyun #define S_00000D_FORCE_TAM(x) (((x) & 0x1) << 26) 325*4882a593Smuzhiyun #define G_00000D_FORCE_TAM(x) (((x) >> 26) & 0x1) 326*4882a593Smuzhiyun #define C_00000D_FORCE_TAM 0xFBFFFFFF 327*4882a593Smuzhiyun #define S_00000D_FORCE_TDM(x) (((x) & 0x1) << 27) 328*4882a593Smuzhiyun #define G_00000D_FORCE_TDM(x) (((x) >> 27) & 0x1) 329*4882a593Smuzhiyun #define C_00000D_FORCE_TDM 0xF7FFFFFF 330*4882a593Smuzhiyun #define S_00000D_FORCE_RB(x) (((x) & 0x1) << 28) 331*4882a593Smuzhiyun #define G_00000D_FORCE_RB(x) (((x) >> 28) & 0x1) 332*4882a593Smuzhiyun #define C_00000D_FORCE_RB 0xEFFFFFFF 333*4882a593Smuzhiyun #define S_00000D_FORCE_TV_SCLK(x) (((x) & 0x1) << 29) 334*4882a593Smuzhiyun #define G_00000D_FORCE_TV_SCLK(x) (((x) >> 29) & 0x1) 335*4882a593Smuzhiyun #define C_00000D_FORCE_TV_SCLK 0xDFFFFFFF 336*4882a593Smuzhiyun #define S_00000D_FORCE_SUBPIC(x) (((x) & 0x1) << 30) 337*4882a593Smuzhiyun #define G_00000D_FORCE_SUBPIC(x) (((x) >> 30) & 0x1) 338*4882a593Smuzhiyun #define C_00000D_FORCE_SUBPIC 0xBFFFFFFF 339*4882a593Smuzhiyun #define S_00000D_FORCE_OV0(x) (((x) & 0x1) << 31) 340*4882a593Smuzhiyun #define G_00000D_FORCE_OV0(x) (((x) >> 31) & 0x1) 341*4882a593Smuzhiyun #define C_00000D_FORCE_OV0 0x7FFFFFFF 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun #endif 344