1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2009 Advanced Micro Devices, Inc. 3*4882a593Smuzhiyun * Copyright 2009 Red Hat Inc. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a 6*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"), 7*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation 8*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the 10*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions: 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in 13*4882a593Smuzhiyun * all copies or substantial portions of the Software. 14*4882a593Smuzhiyun * 15*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * Authors: Dave Airlie 24*4882a593Smuzhiyun * Alex Deucher 25*4882a593Smuzhiyun * Jerome Glisse 26*4882a593Smuzhiyun */ 27*4882a593Smuzhiyun #ifndef AVIVOD_H 28*4882a593Smuzhiyun #define AVIVOD_H 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define D1CRTC_CONTROL 0x6080 32*4882a593Smuzhiyun #define CRTC_EN (1 << 0) 33*4882a593Smuzhiyun #define D1CRTC_STATUS 0x609c 34*4882a593Smuzhiyun #define D1CRTC_UPDATE_LOCK 0x60E8 35*4882a593Smuzhiyun #define D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 36*4882a593Smuzhiyun #define D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define D2CRTC_CONTROL 0x6880 39*4882a593Smuzhiyun #define D2CRTC_STATUS 0x689c 40*4882a593Smuzhiyun #define D2CRTC_UPDATE_LOCK 0x68E8 41*4882a593Smuzhiyun #define D2GRPH_PRIMARY_SURFACE_ADDRESS 0x6910 42*4882a593Smuzhiyun #define D2GRPH_SECONDARY_SURFACE_ADDRESS 0x6918 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define D1VGA_CONTROL 0x0330 45*4882a593Smuzhiyun #define DVGA_CONTROL_MODE_ENABLE (1 << 0) 46*4882a593Smuzhiyun #define DVGA_CONTROL_TIMING_SELECT (1 << 8) 47*4882a593Smuzhiyun #define DVGA_CONTROL_SYNC_POLARITY_SELECT (1 << 9) 48*4882a593Smuzhiyun #define DVGA_CONTROL_OVERSCAN_TIMING_SELECT (1 << 10) 49*4882a593Smuzhiyun #define DVGA_CONTROL_OVERSCAN_COLOR_EN (1 << 16) 50*4882a593Smuzhiyun #define DVGA_CONTROL_ROTATE (1 << 24) 51*4882a593Smuzhiyun #define D2VGA_CONTROL 0x0338 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define VGA_HDP_CONTROL 0x328 54*4882a593Smuzhiyun #define VGA_MEM_PAGE_SELECT_EN (1 << 0) 55*4882a593Smuzhiyun #define VGA_MEMORY_DISABLE (1 << 4) 56*4882a593Smuzhiyun #define VGA_RBBM_LOCK_DISABLE (1 << 8) 57*4882a593Smuzhiyun #define VGA_SOFT_RESET (1 << 16) 58*4882a593Smuzhiyun #define VGA_MEMORY_BASE_ADDRESS 0x0310 59*4882a593Smuzhiyun #define VGA_RENDER_CONTROL 0x0300 60*4882a593Smuzhiyun #define VGA_VSTATUS_CNTL_MASK 0x00030000 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #endif 63