1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2011 Advanced Micro Devices, Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun *
22*4882a593Smuzhiyun * Authors: Alex Deucher
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include <drm/radeon_drm.h>
27*4882a593Smuzhiyun #include "radeon.h"
28*4882a593Smuzhiyun #include "atom.h"
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define TARGET_HW_I2C_CLOCK 50
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /* these are a limitation of ProcessI2cChannelTransaction not the hw */
33*4882a593Smuzhiyun #define ATOM_MAX_HW_I2C_WRITE 3
34*4882a593Smuzhiyun #define ATOM_MAX_HW_I2C_READ 255
35*4882a593Smuzhiyun
radeon_process_i2c_ch(struct radeon_i2c_chan * chan,u8 slave_addr,u8 flags,u8 * buf,int num)36*4882a593Smuzhiyun static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
37*4882a593Smuzhiyun u8 slave_addr, u8 flags,
38*4882a593Smuzhiyun u8 *buf, int num)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun struct drm_device *dev = chan->dev;
41*4882a593Smuzhiyun struct radeon_device *rdev = dev->dev_private;
42*4882a593Smuzhiyun PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
43*4882a593Smuzhiyun int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
44*4882a593Smuzhiyun unsigned char *base;
45*4882a593Smuzhiyun u16 out = cpu_to_le16(0);
46*4882a593Smuzhiyun int r = 0;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun memset(&args, 0, sizeof(args));
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun mutex_lock(&chan->mutex);
51*4882a593Smuzhiyun mutex_lock(&rdev->mode_info.atom_context->scratch_mutex);
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun base = (unsigned char *)rdev->mode_info.atom_context->scratch;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun if (flags & HW_I2C_WRITE) {
56*4882a593Smuzhiyun if (num > ATOM_MAX_HW_I2C_WRITE) {
57*4882a593Smuzhiyun DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
58*4882a593Smuzhiyun r = -EINVAL;
59*4882a593Smuzhiyun goto done;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun if (buf == NULL)
62*4882a593Smuzhiyun args.ucRegIndex = 0;
63*4882a593Smuzhiyun else
64*4882a593Smuzhiyun args.ucRegIndex = buf[0];
65*4882a593Smuzhiyun if (num)
66*4882a593Smuzhiyun num--;
67*4882a593Smuzhiyun if (num)
68*4882a593Smuzhiyun memcpy(&out, &buf[1], num);
69*4882a593Smuzhiyun args.lpI2CDataOut = cpu_to_le16(out);
70*4882a593Smuzhiyun } else {
71*4882a593Smuzhiyun args.ucRegIndex = 0;
72*4882a593Smuzhiyun args.lpI2CDataOut = 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun args.ucFlag = flags;
76*4882a593Smuzhiyun args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
77*4882a593Smuzhiyun args.ucTransBytes = num;
78*4882a593Smuzhiyun args.ucSlaveAddr = slave_addr << 1;
79*4882a593Smuzhiyun args.ucLineNumber = chan->rec.i2c_id;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun atom_execute_table_scratch_unlocked(rdev->mode_info.atom_context, index, (uint32_t *)&args);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /* error */
84*4882a593Smuzhiyun if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
85*4882a593Smuzhiyun DRM_DEBUG_KMS("hw_i2c error\n");
86*4882a593Smuzhiyun r = -EIO;
87*4882a593Smuzhiyun goto done;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun if (!(flags & HW_I2C_WRITE))
91*4882a593Smuzhiyun radeon_atom_copy_swap(buf, base, num, false);
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun done:
94*4882a593Smuzhiyun mutex_unlock(&rdev->mode_info.atom_context->scratch_mutex);
95*4882a593Smuzhiyun mutex_unlock(&chan->mutex);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun return r;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
radeon_atom_hw_i2c_xfer(struct i2c_adapter * i2c_adap,struct i2c_msg * msgs,int num)100*4882a593Smuzhiyun int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
101*4882a593Smuzhiyun struct i2c_msg *msgs, int num)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
104*4882a593Smuzhiyun struct i2c_msg *p;
105*4882a593Smuzhiyun int i, remaining, current_count, buffer_offset, max_bytes, ret;
106*4882a593Smuzhiyun u8 flags;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /* check for bus probe */
109*4882a593Smuzhiyun p = &msgs[0];
110*4882a593Smuzhiyun if ((num == 1) && (p->len == 0)) {
111*4882a593Smuzhiyun ret = radeon_process_i2c_ch(i2c,
112*4882a593Smuzhiyun p->addr, HW_I2C_WRITE,
113*4882a593Smuzhiyun NULL, 0);
114*4882a593Smuzhiyun if (ret)
115*4882a593Smuzhiyun return ret;
116*4882a593Smuzhiyun else
117*4882a593Smuzhiyun return num;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun for (i = 0; i < num; i++) {
121*4882a593Smuzhiyun p = &msgs[i];
122*4882a593Smuzhiyun remaining = p->len;
123*4882a593Smuzhiyun buffer_offset = 0;
124*4882a593Smuzhiyun /* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
125*4882a593Smuzhiyun if (p->flags & I2C_M_RD) {
126*4882a593Smuzhiyun max_bytes = ATOM_MAX_HW_I2C_READ;
127*4882a593Smuzhiyun flags = HW_I2C_READ;
128*4882a593Smuzhiyun } else {
129*4882a593Smuzhiyun max_bytes = ATOM_MAX_HW_I2C_WRITE;
130*4882a593Smuzhiyun flags = HW_I2C_WRITE;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun while (remaining) {
133*4882a593Smuzhiyun if (remaining > max_bytes)
134*4882a593Smuzhiyun current_count = max_bytes;
135*4882a593Smuzhiyun else
136*4882a593Smuzhiyun current_count = remaining;
137*4882a593Smuzhiyun ret = radeon_process_i2c_ch(i2c,
138*4882a593Smuzhiyun p->addr, flags,
139*4882a593Smuzhiyun &p->buf[buffer_offset], current_count);
140*4882a593Smuzhiyun if (ret)
141*4882a593Smuzhiyun return ret;
142*4882a593Smuzhiyun remaining -= current_count;
143*4882a593Smuzhiyun buffer_offset += current_count;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun return num;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
radeon_atom_hw_i2c_func(struct i2c_adapter * adap)150*4882a593Smuzhiyun u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
155