1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2013 Red Hat Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun *
22*4882a593Smuzhiyun * Authors: Dave Airlie
23*4882a593Smuzhiyun * Alon Levy
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #ifndef QXL_DRV_H
27*4882a593Smuzhiyun #define QXL_DRV_H
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /*
30*4882a593Smuzhiyun * Definitions taken from spice-protocol, plus kernel driver specific bits.
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #include <linux/dma-fence.h>
34*4882a593Smuzhiyun #include <linux/firmware.h>
35*4882a593Smuzhiyun #include <linux/platform_device.h>
36*4882a593Smuzhiyun #include <linux/workqueue.h>
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #include <drm/drm_crtc.h>
39*4882a593Smuzhiyun #include <drm/drm_encoder.h>
40*4882a593Smuzhiyun #include <drm/drm_fb_helper.h>
41*4882a593Smuzhiyun #include <drm/drm_gem_ttm_helper.h>
42*4882a593Smuzhiyun #include <drm/drm_ioctl.h>
43*4882a593Smuzhiyun #include <drm/drm_gem.h>
44*4882a593Smuzhiyun #include <drm/qxl_drm.h>
45*4882a593Smuzhiyun #include <drm/ttm/ttm_bo_api.h>
46*4882a593Smuzhiyun #include <drm/ttm/ttm_bo_driver.h>
47*4882a593Smuzhiyun #include <drm/ttm/ttm_execbuf_util.h>
48*4882a593Smuzhiyun #include <drm/ttm/ttm_module.h>
49*4882a593Smuzhiyun #include <drm/ttm/ttm_placement.h>
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #include "qxl_dev.h"
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #define DRIVER_AUTHOR "Dave Airlie"
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #define DRIVER_NAME "qxl"
56*4882a593Smuzhiyun #define DRIVER_DESC "RH QXL"
57*4882a593Smuzhiyun #define DRIVER_DATE "20120117"
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun #define DRIVER_MAJOR 0
60*4882a593Smuzhiyun #define DRIVER_MINOR 1
61*4882a593Smuzhiyun #define DRIVER_PATCHLEVEL 0
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun #define QXL_DEBUGFS_MAX_COMPONENTS 32
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun extern int qxl_num_crtc;
66*4882a593Smuzhiyun extern int qxl_max_ioctls;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun #define QXL_INTERRUPT_MASK (\
69*4882a593Smuzhiyun QXL_INTERRUPT_DISPLAY |\
70*4882a593Smuzhiyun QXL_INTERRUPT_CURSOR |\
71*4882a593Smuzhiyun QXL_INTERRUPT_IO_CMD |\
72*4882a593Smuzhiyun QXL_INTERRUPT_CLIENT_MONITORS_CONFIG)
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun struct qxl_bo {
75*4882a593Smuzhiyun struct ttm_buffer_object tbo;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /* Protected by gem.mutex */
78*4882a593Smuzhiyun struct list_head list;
79*4882a593Smuzhiyun /* Protected by tbo.reserved */
80*4882a593Smuzhiyun struct ttm_place placements[3];
81*4882a593Smuzhiyun struct ttm_placement placement;
82*4882a593Smuzhiyun struct ttm_bo_kmap_obj kmap;
83*4882a593Smuzhiyun unsigned int pin_count;
84*4882a593Smuzhiyun void *kptr;
85*4882a593Smuzhiyun unsigned int map_count;
86*4882a593Smuzhiyun int type;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /* Constant after initialization */
89*4882a593Smuzhiyun unsigned int is_primary:1; /* is this now a primary surface */
90*4882a593Smuzhiyun unsigned int is_dumb:1;
91*4882a593Smuzhiyun struct qxl_bo *shadow;
92*4882a593Smuzhiyun unsigned int hw_surf_alloc:1;
93*4882a593Smuzhiyun struct qxl_surface surf;
94*4882a593Smuzhiyun uint32_t surface_id;
95*4882a593Smuzhiyun struct qxl_release *surf_create;
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun #define gem_to_qxl_bo(gobj) container_of((gobj), struct qxl_bo, tbo.base)
98*4882a593Smuzhiyun #define to_qxl_bo(tobj) container_of((tobj), struct qxl_bo, tbo)
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun struct qxl_gem {
101*4882a593Smuzhiyun struct mutex mutex;
102*4882a593Smuzhiyun struct list_head objects;
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun struct qxl_bo_list {
106*4882a593Smuzhiyun struct ttm_validate_buffer tv;
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun struct qxl_crtc {
110*4882a593Smuzhiyun struct drm_crtc base;
111*4882a593Smuzhiyun int index;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun struct qxl_bo *cursor_bo;
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun struct qxl_output {
117*4882a593Smuzhiyun int index;
118*4882a593Smuzhiyun struct drm_connector base;
119*4882a593Smuzhiyun struct drm_encoder enc;
120*4882a593Smuzhiyun };
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun #define to_qxl_crtc(x) container_of(x, struct qxl_crtc, base)
123*4882a593Smuzhiyun #define drm_connector_to_qxl_output(x) container_of(x, struct qxl_output, base)
124*4882a593Smuzhiyun #define drm_encoder_to_qxl_output(x) container_of(x, struct qxl_output, enc)
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun struct qxl_mman {
127*4882a593Smuzhiyun struct ttm_bo_device bdev;
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun struct qxl_memslot {
131*4882a593Smuzhiyun int index;
132*4882a593Smuzhiyun const char *name;
133*4882a593Smuzhiyun uint8_t generation;
134*4882a593Smuzhiyun uint64_t start_phys_addr;
135*4882a593Smuzhiyun uint64_t size;
136*4882a593Smuzhiyun uint64_t high_bits;
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun enum {
140*4882a593Smuzhiyun QXL_RELEASE_DRAWABLE,
141*4882a593Smuzhiyun QXL_RELEASE_SURFACE_CMD,
142*4882a593Smuzhiyun QXL_RELEASE_CURSOR_CMD,
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /* drm_ prefix to differentiate from qxl_release_info in
146*4882a593Smuzhiyun * spice-protocol/qxl_dev.h */
147*4882a593Smuzhiyun #define QXL_MAX_RES 96
148*4882a593Smuzhiyun struct qxl_release {
149*4882a593Smuzhiyun struct dma_fence base;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun int id;
152*4882a593Smuzhiyun int type;
153*4882a593Smuzhiyun struct qxl_bo *release_bo;
154*4882a593Smuzhiyun uint32_t release_offset;
155*4882a593Smuzhiyun uint32_t surface_release_id;
156*4882a593Smuzhiyun struct ww_acquire_ctx ticket;
157*4882a593Smuzhiyun struct list_head bos;
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun struct qxl_drm_chunk {
161*4882a593Smuzhiyun struct list_head head;
162*4882a593Smuzhiyun struct qxl_bo *bo;
163*4882a593Smuzhiyun };
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun struct qxl_drm_image {
166*4882a593Smuzhiyun struct qxl_bo *bo;
167*4882a593Smuzhiyun struct list_head chunk_list;
168*4882a593Smuzhiyun };
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun struct qxl_fb_image {
171*4882a593Smuzhiyun struct qxl_device *qdev;
172*4882a593Smuzhiyun uint32_t pseudo_palette[16];
173*4882a593Smuzhiyun struct fb_image fb_image;
174*4882a593Smuzhiyun uint32_t visual;
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun struct qxl_draw_fill {
178*4882a593Smuzhiyun struct qxl_device *qdev;
179*4882a593Smuzhiyun struct qxl_rect rect;
180*4882a593Smuzhiyun uint32_t color;
181*4882a593Smuzhiyun uint16_t rop;
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun /*
185*4882a593Smuzhiyun * Debugfs
186*4882a593Smuzhiyun */
187*4882a593Smuzhiyun struct qxl_debugfs {
188*4882a593Smuzhiyun struct drm_info_list *files;
189*4882a593Smuzhiyun unsigned int num_files;
190*4882a593Smuzhiyun };
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun int qxl_debugfs_fence_init(struct qxl_device *rdev);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun struct qxl_device {
195*4882a593Smuzhiyun struct drm_device ddev;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun resource_size_t vram_base, vram_size;
198*4882a593Smuzhiyun resource_size_t surfaceram_base, surfaceram_size;
199*4882a593Smuzhiyun resource_size_t rom_base, rom_size;
200*4882a593Smuzhiyun struct qxl_rom *rom;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun struct qxl_mode *modes;
203*4882a593Smuzhiyun struct qxl_bo *monitors_config_bo;
204*4882a593Smuzhiyun struct qxl_monitors_config *monitors_config;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun /* last received client_monitors_config */
207*4882a593Smuzhiyun struct qxl_monitors_config *client_monitors_config;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun int io_base;
210*4882a593Smuzhiyun void *ram;
211*4882a593Smuzhiyun struct qxl_mman mman;
212*4882a593Smuzhiyun struct qxl_gem gem;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun void *ram_physical;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun struct qxl_ring *release_ring;
217*4882a593Smuzhiyun struct qxl_ring *command_ring;
218*4882a593Smuzhiyun struct qxl_ring *cursor_ring;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun struct qxl_ram_header *ram_header;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun struct qxl_bo *primary_bo;
223*4882a593Smuzhiyun struct qxl_bo *dumb_shadow_bo;
224*4882a593Smuzhiyun struct qxl_head *dumb_heads;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun struct qxl_memslot main_slot;
227*4882a593Smuzhiyun struct qxl_memslot surfaces_slot;
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun spinlock_t release_lock;
230*4882a593Smuzhiyun struct idr release_idr;
231*4882a593Smuzhiyun uint32_t release_seqno;
232*4882a593Smuzhiyun spinlock_t release_idr_lock;
233*4882a593Smuzhiyun struct mutex async_io_mutex;
234*4882a593Smuzhiyun unsigned int last_sent_io_cmd;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun /* interrupt handling */
237*4882a593Smuzhiyun atomic_t irq_received;
238*4882a593Smuzhiyun atomic_t irq_received_display;
239*4882a593Smuzhiyun atomic_t irq_received_cursor;
240*4882a593Smuzhiyun atomic_t irq_received_io_cmd;
241*4882a593Smuzhiyun unsigned int irq_received_error;
242*4882a593Smuzhiyun wait_queue_head_t display_event;
243*4882a593Smuzhiyun wait_queue_head_t cursor_event;
244*4882a593Smuzhiyun wait_queue_head_t io_cmd_event;
245*4882a593Smuzhiyun struct work_struct client_monitors_config_work;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun /* debugfs */
248*4882a593Smuzhiyun struct qxl_debugfs debugfs[QXL_DEBUGFS_MAX_COMPONENTS];
249*4882a593Smuzhiyun unsigned int debugfs_count;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun struct mutex update_area_mutex;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun struct idr surf_id_idr;
254*4882a593Smuzhiyun spinlock_t surf_id_idr_lock;
255*4882a593Smuzhiyun int last_alloced_surf_id;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun struct mutex surf_evict_mutex;
258*4882a593Smuzhiyun struct io_mapping *vram_mapping;
259*4882a593Smuzhiyun struct io_mapping *surface_mapping;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun /* */
262*4882a593Smuzhiyun struct mutex release_mutex;
263*4882a593Smuzhiyun struct qxl_bo *current_release_bo[3];
264*4882a593Smuzhiyun int current_release_bo_offset[3];
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun struct work_struct gc_work;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun struct drm_property *hotplug_mode_update_property;
269*4882a593Smuzhiyun int monitors_config_width;
270*4882a593Smuzhiyun int monitors_config_height;
271*4882a593Smuzhiyun };
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun #define to_qxl(dev) container_of(dev, struct qxl_device, ddev)
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun extern const struct drm_ioctl_desc qxl_ioctls[];
276*4882a593Smuzhiyun extern int qxl_max_ioctl;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun int qxl_device_init(struct qxl_device *qdev, struct pci_dev *pdev);
279*4882a593Smuzhiyun void qxl_device_fini(struct qxl_device *qdev);
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun int qxl_modeset_init(struct qxl_device *qdev);
282*4882a593Smuzhiyun void qxl_modeset_fini(struct qxl_device *qdev);
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun int qxl_bo_init(struct qxl_device *qdev);
285*4882a593Smuzhiyun void qxl_bo_fini(struct qxl_device *qdev);
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun void qxl_reinit_memslots(struct qxl_device *qdev);
288*4882a593Smuzhiyun int qxl_surf_evict(struct qxl_device *qdev);
289*4882a593Smuzhiyun int qxl_vram_evict(struct qxl_device *qdev);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun struct qxl_ring *qxl_ring_create(struct qxl_ring_header *header,
292*4882a593Smuzhiyun int element_size,
293*4882a593Smuzhiyun int n_elements,
294*4882a593Smuzhiyun int prod_notify,
295*4882a593Smuzhiyun bool set_prod_notify,
296*4882a593Smuzhiyun wait_queue_head_t *push_event);
297*4882a593Smuzhiyun void qxl_ring_free(struct qxl_ring *ring);
298*4882a593Smuzhiyun void qxl_ring_init_hdr(struct qxl_ring *ring);
299*4882a593Smuzhiyun int qxl_check_idle(struct qxl_ring *ring);
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun static inline uint64_t
qxl_bo_physical_address(struct qxl_device * qdev,struct qxl_bo * bo,unsigned long offset)302*4882a593Smuzhiyun qxl_bo_physical_address(struct qxl_device *qdev, struct qxl_bo *bo,
303*4882a593Smuzhiyun unsigned long offset)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun struct qxl_memslot *slot =
306*4882a593Smuzhiyun (bo->tbo.mem.mem_type == TTM_PL_VRAM)
307*4882a593Smuzhiyun ? &qdev->main_slot : &qdev->surfaces_slot;
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun /* TODO - need to hold one of the locks to read bo->tbo.mem.start */
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun return slot->high_bits | ((bo->tbo.mem.start << PAGE_SHIFT) + offset);
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun /* qxl_display.c */
315*4882a593Smuzhiyun void qxl_display_read_client_monitors_config(struct qxl_device *qdev);
316*4882a593Smuzhiyun int qxl_create_monitors_object(struct qxl_device *qdev);
317*4882a593Smuzhiyun int qxl_destroy_monitors_object(struct qxl_device *qdev);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun /* qxl_gem.c */
320*4882a593Smuzhiyun void qxl_gem_init(struct qxl_device *qdev);
321*4882a593Smuzhiyun void qxl_gem_fini(struct qxl_device *qdev);
322*4882a593Smuzhiyun int qxl_gem_object_create(struct qxl_device *qdev, int size,
323*4882a593Smuzhiyun int alignment, int initial_domain,
324*4882a593Smuzhiyun bool discardable, bool kernel,
325*4882a593Smuzhiyun struct qxl_surface *surf,
326*4882a593Smuzhiyun struct drm_gem_object **obj);
327*4882a593Smuzhiyun int qxl_gem_object_create_with_handle(struct qxl_device *qdev,
328*4882a593Smuzhiyun struct drm_file *file_priv,
329*4882a593Smuzhiyun u32 domain,
330*4882a593Smuzhiyun size_t size,
331*4882a593Smuzhiyun struct qxl_surface *surf,
332*4882a593Smuzhiyun struct qxl_bo **qobj,
333*4882a593Smuzhiyun uint32_t *handle);
334*4882a593Smuzhiyun void qxl_gem_object_free(struct drm_gem_object *gobj);
335*4882a593Smuzhiyun int qxl_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv);
336*4882a593Smuzhiyun void qxl_gem_object_close(struct drm_gem_object *obj,
337*4882a593Smuzhiyun struct drm_file *file_priv);
338*4882a593Smuzhiyun void qxl_bo_force_delete(struct qxl_device *qdev);
339*4882a593Smuzhiyun int qxl_bo_kmap(struct qxl_bo *bo, void **ptr);
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun /* qxl_dumb.c */
342*4882a593Smuzhiyun int qxl_mode_dumb_create(struct drm_file *file_priv,
343*4882a593Smuzhiyun struct drm_device *dev,
344*4882a593Smuzhiyun struct drm_mode_create_dumb *args);
345*4882a593Smuzhiyun int qxl_mode_dumb_mmap(struct drm_file *filp,
346*4882a593Smuzhiyun struct drm_device *dev,
347*4882a593Smuzhiyun uint32_t handle, uint64_t *offset_p);
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun /* qxl ttm */
350*4882a593Smuzhiyun int qxl_ttm_init(struct qxl_device *qdev);
351*4882a593Smuzhiyun void qxl_ttm_fini(struct qxl_device *qdev);
352*4882a593Smuzhiyun int qxl_ttm_io_mem_reserve(struct ttm_bo_device *bdev,
353*4882a593Smuzhiyun struct ttm_resource *mem);
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun /* qxl image */
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun int qxl_image_init(struct qxl_device *qdev,
358*4882a593Smuzhiyun struct qxl_release *release,
359*4882a593Smuzhiyun struct qxl_drm_image *dimage,
360*4882a593Smuzhiyun const uint8_t *data,
361*4882a593Smuzhiyun int x, int y, int width, int height,
362*4882a593Smuzhiyun int depth, int stride);
363*4882a593Smuzhiyun int
364*4882a593Smuzhiyun qxl_image_alloc_objects(struct qxl_device *qdev,
365*4882a593Smuzhiyun struct qxl_release *release,
366*4882a593Smuzhiyun struct qxl_drm_image **image_ptr,
367*4882a593Smuzhiyun int height, int stride);
368*4882a593Smuzhiyun void qxl_image_free_objects(struct qxl_device *qdev, struct qxl_drm_image *dimage);
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun void qxl_update_screen(struct qxl_device *qxl);
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun /* qxl io operations (qxl_cmd.c) */
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun void qxl_io_create_primary(struct qxl_device *qdev,
375*4882a593Smuzhiyun struct qxl_bo *bo);
376*4882a593Smuzhiyun void qxl_io_destroy_primary(struct qxl_device *qdev);
377*4882a593Smuzhiyun void qxl_io_memslot_add(struct qxl_device *qdev, uint8_t id);
378*4882a593Smuzhiyun void qxl_io_notify_oom(struct qxl_device *qdev);
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun int qxl_io_update_area(struct qxl_device *qdev, struct qxl_bo *surf,
381*4882a593Smuzhiyun const struct qxl_rect *area);
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun void qxl_io_reset(struct qxl_device *qdev);
384*4882a593Smuzhiyun void qxl_io_monitors_config(struct qxl_device *qdev);
385*4882a593Smuzhiyun int qxl_ring_push(struct qxl_ring *ring, const void *new_elt, bool interruptible);
386*4882a593Smuzhiyun void qxl_io_flush_release(struct qxl_device *qdev);
387*4882a593Smuzhiyun void qxl_io_flush_surfaces(struct qxl_device *qdev);
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun union qxl_release_info *qxl_release_map(struct qxl_device *qdev,
390*4882a593Smuzhiyun struct qxl_release *release);
391*4882a593Smuzhiyun void qxl_release_unmap(struct qxl_device *qdev,
392*4882a593Smuzhiyun struct qxl_release *release,
393*4882a593Smuzhiyun union qxl_release_info *info);
394*4882a593Smuzhiyun int qxl_release_list_add(struct qxl_release *release, struct qxl_bo *bo);
395*4882a593Smuzhiyun int qxl_release_reserve_list(struct qxl_release *release, bool no_intr);
396*4882a593Smuzhiyun void qxl_release_backoff_reserve_list(struct qxl_release *release);
397*4882a593Smuzhiyun void qxl_release_fence_buffer_objects(struct qxl_release *release);
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun int qxl_alloc_surface_release_reserved(struct qxl_device *qdev,
400*4882a593Smuzhiyun enum qxl_surface_cmd_type surface_cmd_type,
401*4882a593Smuzhiyun struct qxl_release *create_rel,
402*4882a593Smuzhiyun struct qxl_release **release);
403*4882a593Smuzhiyun int qxl_alloc_release_reserved(struct qxl_device *qdev, unsigned long size,
404*4882a593Smuzhiyun int type, struct qxl_release **release,
405*4882a593Smuzhiyun struct qxl_bo **rbo);
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun int
408*4882a593Smuzhiyun qxl_push_command_ring_release(struct qxl_device *qdev, struct qxl_release *release,
409*4882a593Smuzhiyun uint32_t type, bool interruptible);
410*4882a593Smuzhiyun int
411*4882a593Smuzhiyun qxl_push_cursor_ring_release(struct qxl_device *qdev, struct qxl_release *release,
412*4882a593Smuzhiyun uint32_t type, bool interruptible);
413*4882a593Smuzhiyun int qxl_alloc_bo_reserved(struct qxl_device *qdev,
414*4882a593Smuzhiyun struct qxl_release *release,
415*4882a593Smuzhiyun unsigned long size,
416*4882a593Smuzhiyun struct qxl_bo **_bo);
417*4882a593Smuzhiyun /* qxl drawing commands */
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun void qxl_draw_dirty_fb(struct qxl_device *qdev,
420*4882a593Smuzhiyun struct drm_framebuffer *fb,
421*4882a593Smuzhiyun struct qxl_bo *bo,
422*4882a593Smuzhiyun unsigned int flags, unsigned int color,
423*4882a593Smuzhiyun struct drm_clip_rect *clips,
424*4882a593Smuzhiyun unsigned int num_clips, int inc,
425*4882a593Smuzhiyun uint32_t dumb_shadow_offset);
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun void qxl_release_free(struct qxl_device *qdev,
428*4882a593Smuzhiyun struct qxl_release *release);
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun /* used by qxl_debugfs_release */
431*4882a593Smuzhiyun struct qxl_release *qxl_release_from_id_locked(struct qxl_device *qdev,
432*4882a593Smuzhiyun uint64_t id);
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun bool qxl_queue_garbage_collect(struct qxl_device *qdev, bool flush);
435*4882a593Smuzhiyun int qxl_garbage_collect(struct qxl_device *qdev);
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun /* debugfs */
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun void qxl_debugfs_init(struct drm_minor *minor);
440*4882a593Smuzhiyun void qxl_ttm_debugfs_init(struct qxl_device *qdev);
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun /* qxl_prime.c */
443*4882a593Smuzhiyun int qxl_gem_prime_pin(struct drm_gem_object *obj);
444*4882a593Smuzhiyun void qxl_gem_prime_unpin(struct drm_gem_object *obj);
445*4882a593Smuzhiyun struct sg_table *qxl_gem_prime_get_sg_table(struct drm_gem_object *obj);
446*4882a593Smuzhiyun struct drm_gem_object *qxl_gem_prime_import_sg_table(
447*4882a593Smuzhiyun struct drm_device *dev, struct dma_buf_attachment *attach,
448*4882a593Smuzhiyun struct sg_table *sgt);
449*4882a593Smuzhiyun void *qxl_gem_prime_vmap(struct drm_gem_object *obj);
450*4882a593Smuzhiyun void qxl_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
451*4882a593Smuzhiyun int qxl_gem_prime_mmap(struct drm_gem_object *obj,
452*4882a593Smuzhiyun struct vm_area_struct *vma);
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun /* qxl_irq.c */
455*4882a593Smuzhiyun int qxl_irq_init(struct qxl_device *qdev);
456*4882a593Smuzhiyun irqreturn_t qxl_irq_handler(int irq, void *arg);
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun void qxl_debugfs_add_files(struct qxl_device *qdev,
459*4882a593Smuzhiyun struct drm_info_list *files,
460*4882a593Smuzhiyun unsigned int nfiles);
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun int qxl_surface_id_alloc(struct qxl_device *qdev,
463*4882a593Smuzhiyun struct qxl_bo *surf);
464*4882a593Smuzhiyun void qxl_surface_id_dealloc(struct qxl_device *qdev,
465*4882a593Smuzhiyun uint32_t surface_id);
466*4882a593Smuzhiyun int qxl_hw_surface_alloc(struct qxl_device *qdev,
467*4882a593Smuzhiyun struct qxl_bo *surf);
468*4882a593Smuzhiyun int qxl_hw_surface_dealloc(struct qxl_device *qdev,
469*4882a593Smuzhiyun struct qxl_bo *surf);
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun int qxl_bo_check_id(struct qxl_device *qdev, struct qxl_bo *bo);
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun struct qxl_drv_surface *
474*4882a593Smuzhiyun qxl_surface_lookup(struct drm_device *dev, int surface_id);
475*4882a593Smuzhiyun void qxl_surface_evict(struct qxl_device *qdev, struct qxl_bo *surf, bool freeing);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun #endif
478