1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /* (C) COPYRIGHT 2014-2018 ARM Limited. All rights reserved. */
3*4882a593Smuzhiyun /* Copyright 2019 Linaro, Ltd., Rob Herring <robh@kernel.org> */
4*4882a593Smuzhiyun #ifndef __PANFROST_FEATURES_H__
5*4882a593Smuzhiyun #define __PANFROST_FEATURES_H__
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/bitops.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include "panfrost_device.h"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun enum panfrost_hw_feature {
12*4882a593Smuzhiyun HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
13*4882a593Smuzhiyun HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
14*4882a593Smuzhiyun HW_FEATURE_XAFFINITY,
15*4882a593Smuzhiyun HW_FEATURE_OUT_OF_ORDER_EXEC,
16*4882a593Smuzhiyun HW_FEATURE_MRT,
17*4882a593Smuzhiyun HW_FEATURE_BRNDOUT_CC,
18*4882a593Smuzhiyun HW_FEATURE_INTERPIPE_REG_ALIASING,
19*4882a593Smuzhiyun HW_FEATURE_LD_ST_TILEBUFFER,
20*4882a593Smuzhiyun HW_FEATURE_MSAA_16X,
21*4882a593Smuzhiyun HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
22*4882a593Smuzhiyun HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
23*4882a593Smuzhiyun HW_FEATURE_OPTIMIZED_COVERAGE_MASK,
24*4882a593Smuzhiyun HW_FEATURE_T7XX_PAIRING_RULES,
25*4882a593Smuzhiyun HW_FEATURE_LD_ST_LEA_TEX,
26*4882a593Smuzhiyun HW_FEATURE_LINEAR_FILTER_FLOAT,
27*4882a593Smuzhiyun HW_FEATURE_WORKGROUP_ROUND_MULTIPLE_OF_4,
28*4882a593Smuzhiyun HW_FEATURE_IMAGES_IN_FRAGMENT_SHADERS,
29*4882a593Smuzhiyun HW_FEATURE_TEST4_DATUM_MODE,
30*4882a593Smuzhiyun HW_FEATURE_NEXT_INSTRUCTION_TYPE,
31*4882a593Smuzhiyun HW_FEATURE_BRNDOUT_KILL,
32*4882a593Smuzhiyun HW_FEATURE_WARPING,
33*4882a593Smuzhiyun HW_FEATURE_V4,
34*4882a593Smuzhiyun HW_FEATURE_FLUSH_REDUCTION,
35*4882a593Smuzhiyun HW_FEATURE_PROTECTED_MODE,
36*4882a593Smuzhiyun HW_FEATURE_COHERENCY_REG,
37*4882a593Smuzhiyun HW_FEATURE_PROTECTED_DEBUG_MODE,
38*4882a593Smuzhiyun HW_FEATURE_AARCH64_MMU,
39*4882a593Smuzhiyun HW_FEATURE_TLS_HASHING,
40*4882a593Smuzhiyun HW_FEATURE_THREAD_GROUP_SPLIT,
41*4882a593Smuzhiyun HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG,
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define hw_features_t600 (\
45*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \
46*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \
47*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
48*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_V4))
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun #define hw_features_t620 (\
51*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \
52*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \
53*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \
54*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
55*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_V4))
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun #define hw_features_t720 (\
58*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \
59*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \
60*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \
61*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_OPTIMIZED_COVERAGE_MASK) | \
62*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \
63*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
64*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_WORKGROUP_ROUND_MULTIPLE_OF_4) | \
65*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_WARPING) | \
66*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_V4))
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun #define hw_features_t760 (\
70*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
71*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
72*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_XAFFINITY) | \
73*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \
74*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \
75*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \
76*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \
77*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \
78*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \
79*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MRT) | \
80*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MSAA_16X) | \
81*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \
82*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \
83*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \
84*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT))
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun // T860
87*4882a593Smuzhiyun #define hw_features_t860 (\
88*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
89*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
90*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_XAFFINITY) | \
91*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \
92*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \
93*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \
94*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \
95*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \
96*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \
97*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \
98*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MRT) | \
99*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MSAA_16X) | \
100*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \
101*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \
102*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \
103*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \
104*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT))
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun #define hw_features_t880 hw_features_t860
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun #define hw_features_t830 (\
109*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
110*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
111*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_XAFFINITY) | \
112*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_WARPING) | \
113*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \
114*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \
115*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \
116*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \
117*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \
118*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \
119*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \
120*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \
121*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MRT) | \
122*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \
123*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \
124*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \
125*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \
126*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT))
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun #define hw_features_t820 (\
129*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
130*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
131*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_XAFFINITY) | \
132*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_WARPING) | \
133*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \
134*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \
135*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \
136*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \
137*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \
138*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \
139*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \
140*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \
141*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MRT) | \
142*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \
143*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \
144*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \
145*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \
146*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT))
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun #define hw_features_g71 (\
149*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
150*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
151*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_XAFFINITY) | \
152*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_WARPING) | \
153*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \
154*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \
155*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \
156*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \
157*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \
158*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \
159*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \
160*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \
161*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MRT) | \
162*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MSAA_16X) | \
163*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \
164*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \
165*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \
166*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \
167*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
168*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
169*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
170*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_COHERENCY_REG))
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun #define hw_features_g72 (\
173*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
174*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
175*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_XAFFINITY) | \
176*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_WARPING) | \
177*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \
178*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \
179*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \
180*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \
181*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \
182*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \
183*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \
184*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \
185*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MRT) | \
186*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MSAA_16X) | \
187*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \
188*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \
189*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \
190*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \
191*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
192*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
193*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
194*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
195*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_COHERENCY_REG))
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun #define hw_features_g51 (\
198*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
199*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
200*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_XAFFINITY) | \
201*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_WARPING) | \
202*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \
203*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \
204*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \
205*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \
206*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \
207*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \
208*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \
209*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \
210*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MRT) | \
211*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MSAA_16X) | \
212*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \
213*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \
214*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \
215*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \
216*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
217*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
218*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
219*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
220*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_COHERENCY_REG))
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun #define hw_features_g52 (\
223*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
224*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
225*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_XAFFINITY) | \
226*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_WARPING) | \
227*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \
228*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \
229*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \
230*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \
231*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \
232*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \
233*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \
234*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \
235*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MRT) | \
236*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MSAA_16X) | \
237*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \
238*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \
239*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \
240*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \
241*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
242*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
243*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
244*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
245*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_COHERENCY_REG))
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun #define hw_features_g76 (\
248*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
249*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
250*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_XAFFINITY) | \
251*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_WARPING) | \
252*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \
253*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \
254*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \
255*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \
256*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \
257*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \
258*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \
259*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \
260*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MRT) | \
261*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MSAA_16X) | \
262*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \
263*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \
264*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \
265*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \
266*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
267*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
268*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
269*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
270*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_COHERENCY_REG) | \
271*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_AARCH64_MMU) | \
272*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_TLS_HASHING) | \
273*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG))
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun #define hw_features_g31 (\
276*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
277*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
278*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_XAFFINITY) | \
279*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_WARPING) | \
280*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \
281*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \
282*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \
283*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \
284*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \
285*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \
286*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \
287*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \
288*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MRT) | \
289*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_MSAA_16X) | \
290*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \
291*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \
292*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \
293*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \
294*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
295*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
296*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
297*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
298*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_COHERENCY_REG) | \
299*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_AARCH64_MMU) | \
300*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_TLS_HASHING) | \
301*4882a593Smuzhiyun BIT_ULL(HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG))
302*4882a593Smuzhiyun
panfrost_has_hw_feature(struct panfrost_device * pfdev,enum panfrost_hw_feature feat)303*4882a593Smuzhiyun static inline bool panfrost_has_hw_feature(struct panfrost_device *pfdev,
304*4882a593Smuzhiyun enum panfrost_hw_feature feat)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun return test_bit(feat, pfdev->features.hw_features);
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun #endif
310