1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2017 NXP Semiconductors.
4*4882a593Smuzhiyun * Author: Marco Franchi <marco.franchi@nxp.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Based on Panel Simple driver by Thierry Reding <treding@nvidia.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <video/display_timing.h>
16*4882a593Smuzhiyun #include <video/videomode.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <drm/drm_crtc.h>
19*4882a593Smuzhiyun #include <drm/drm_device.h>
20*4882a593Smuzhiyun #include <drm/drm_panel.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun struct seiko_panel_desc {
23*4882a593Smuzhiyun const struct drm_display_mode *modes;
24*4882a593Smuzhiyun unsigned int num_modes;
25*4882a593Smuzhiyun const struct display_timing *timings;
26*4882a593Smuzhiyun unsigned int num_timings;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun unsigned int bpc;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /**
31*4882a593Smuzhiyun * @width: width (in millimeters) of the panel's active display area
32*4882a593Smuzhiyun * @height: height (in millimeters) of the panel's active display area
33*4882a593Smuzhiyun */
34*4882a593Smuzhiyun struct {
35*4882a593Smuzhiyun unsigned int width;
36*4882a593Smuzhiyun unsigned int height;
37*4882a593Smuzhiyun } size;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun u32 bus_format;
40*4882a593Smuzhiyun u32 bus_flags;
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun struct seiko_panel {
44*4882a593Smuzhiyun struct drm_panel base;
45*4882a593Smuzhiyun bool prepared;
46*4882a593Smuzhiyun bool enabled;
47*4882a593Smuzhiyun const struct seiko_panel_desc *desc;
48*4882a593Smuzhiyun struct regulator *dvdd;
49*4882a593Smuzhiyun struct regulator *avdd;
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
to_seiko_panel(struct drm_panel * panel)52*4882a593Smuzhiyun static inline struct seiko_panel *to_seiko_panel(struct drm_panel *panel)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun return container_of(panel, struct seiko_panel, base);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
seiko_panel_get_fixed_modes(struct seiko_panel * panel,struct drm_connector * connector)57*4882a593Smuzhiyun static int seiko_panel_get_fixed_modes(struct seiko_panel *panel,
58*4882a593Smuzhiyun struct drm_connector *connector)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun struct drm_display_mode *mode;
61*4882a593Smuzhiyun unsigned int i, num = 0;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun if (!panel->desc)
64*4882a593Smuzhiyun return 0;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun for (i = 0; i < panel->desc->num_timings; i++) {
67*4882a593Smuzhiyun const struct display_timing *dt = &panel->desc->timings[i];
68*4882a593Smuzhiyun struct videomode vm;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun videomode_from_timing(dt, &vm);
71*4882a593Smuzhiyun mode = drm_mode_create(connector->dev);
72*4882a593Smuzhiyun if (!mode) {
73*4882a593Smuzhiyun dev_err(panel->base.dev, "failed to add mode %ux%u\n",
74*4882a593Smuzhiyun dt->hactive.typ, dt->vactive.typ);
75*4882a593Smuzhiyun continue;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun drm_display_mode_from_videomode(&vm, mode);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun mode->type |= DRM_MODE_TYPE_DRIVER;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun if (panel->desc->num_timings == 1)
83*4882a593Smuzhiyun mode->type |= DRM_MODE_TYPE_PREFERRED;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun drm_mode_probed_add(connector, mode);
86*4882a593Smuzhiyun num++;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun for (i = 0; i < panel->desc->num_modes; i++) {
90*4882a593Smuzhiyun const struct drm_display_mode *m = &panel->desc->modes[i];
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun mode = drm_mode_duplicate(connector->dev, m);
93*4882a593Smuzhiyun if (!mode) {
94*4882a593Smuzhiyun dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n",
95*4882a593Smuzhiyun m->hdisplay, m->vdisplay,
96*4882a593Smuzhiyun drm_mode_vrefresh(m));
97*4882a593Smuzhiyun continue;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun mode->type |= DRM_MODE_TYPE_DRIVER;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun if (panel->desc->num_modes == 1)
103*4882a593Smuzhiyun mode->type |= DRM_MODE_TYPE_PREFERRED;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun drm_mode_set_name(mode);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun drm_mode_probed_add(connector, mode);
108*4882a593Smuzhiyun num++;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun connector->display_info.bpc = panel->desc->bpc;
112*4882a593Smuzhiyun connector->display_info.width_mm = panel->desc->size.width;
113*4882a593Smuzhiyun connector->display_info.height_mm = panel->desc->size.height;
114*4882a593Smuzhiyun if (panel->desc->bus_format)
115*4882a593Smuzhiyun drm_display_info_set_bus_formats(&connector->display_info,
116*4882a593Smuzhiyun &panel->desc->bus_format, 1);
117*4882a593Smuzhiyun connector->display_info.bus_flags = panel->desc->bus_flags;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun return num;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
seiko_panel_disable(struct drm_panel * panel)122*4882a593Smuzhiyun static int seiko_panel_disable(struct drm_panel *panel)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun struct seiko_panel *p = to_seiko_panel(panel);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun if (!p->enabled)
127*4882a593Smuzhiyun return 0;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun p->enabled = false;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun return 0;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
seiko_panel_unprepare(struct drm_panel * panel)134*4882a593Smuzhiyun static int seiko_panel_unprepare(struct drm_panel *panel)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun struct seiko_panel *p = to_seiko_panel(panel);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun if (!p->prepared)
139*4882a593Smuzhiyun return 0;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun regulator_disable(p->avdd);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun /* Add a 100ms delay as per the panel datasheet */
144*4882a593Smuzhiyun msleep(100);
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun regulator_disable(p->dvdd);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun p->prepared = false;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun return 0;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
seiko_panel_prepare(struct drm_panel * panel)153*4882a593Smuzhiyun static int seiko_panel_prepare(struct drm_panel *panel)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun struct seiko_panel *p = to_seiko_panel(panel);
156*4882a593Smuzhiyun int err;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun if (p->prepared)
159*4882a593Smuzhiyun return 0;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun err = regulator_enable(p->dvdd);
162*4882a593Smuzhiyun if (err < 0) {
163*4882a593Smuzhiyun dev_err(panel->dev, "failed to enable dvdd: %d\n", err);
164*4882a593Smuzhiyun return err;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun /* Add a 100ms delay as per the panel datasheet */
168*4882a593Smuzhiyun msleep(100);
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun err = regulator_enable(p->avdd);
171*4882a593Smuzhiyun if (err < 0) {
172*4882a593Smuzhiyun dev_err(panel->dev, "failed to enable avdd: %d\n", err);
173*4882a593Smuzhiyun goto disable_dvdd;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun p->prepared = true;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun return 0;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun disable_dvdd:
181*4882a593Smuzhiyun regulator_disable(p->dvdd);
182*4882a593Smuzhiyun return err;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
seiko_panel_enable(struct drm_panel * panel)185*4882a593Smuzhiyun static int seiko_panel_enable(struct drm_panel *panel)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun struct seiko_panel *p = to_seiko_panel(panel);
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun if (p->enabled)
190*4882a593Smuzhiyun return 0;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun p->enabled = true;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun return 0;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
seiko_panel_get_modes(struct drm_panel * panel,struct drm_connector * connector)197*4882a593Smuzhiyun static int seiko_panel_get_modes(struct drm_panel *panel,
198*4882a593Smuzhiyun struct drm_connector *connector)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun struct seiko_panel *p = to_seiko_panel(panel);
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun /* add hard-coded panel modes */
203*4882a593Smuzhiyun return seiko_panel_get_fixed_modes(p, connector);
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
seiko_panel_get_timings(struct drm_panel * panel,unsigned int num_timings,struct display_timing * timings)206*4882a593Smuzhiyun static int seiko_panel_get_timings(struct drm_panel *panel,
207*4882a593Smuzhiyun unsigned int num_timings,
208*4882a593Smuzhiyun struct display_timing *timings)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun struct seiko_panel *p = to_seiko_panel(panel);
211*4882a593Smuzhiyun unsigned int i;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun if (p->desc->num_timings < num_timings)
214*4882a593Smuzhiyun num_timings = p->desc->num_timings;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun if (timings)
217*4882a593Smuzhiyun for (i = 0; i < num_timings; i++)
218*4882a593Smuzhiyun timings[i] = p->desc->timings[i];
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun return p->desc->num_timings;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun static const struct drm_panel_funcs seiko_panel_funcs = {
224*4882a593Smuzhiyun .disable = seiko_panel_disable,
225*4882a593Smuzhiyun .unprepare = seiko_panel_unprepare,
226*4882a593Smuzhiyun .prepare = seiko_panel_prepare,
227*4882a593Smuzhiyun .enable = seiko_panel_enable,
228*4882a593Smuzhiyun .get_modes = seiko_panel_get_modes,
229*4882a593Smuzhiyun .get_timings = seiko_panel_get_timings,
230*4882a593Smuzhiyun };
231*4882a593Smuzhiyun
seiko_panel_probe(struct device * dev,const struct seiko_panel_desc * desc)232*4882a593Smuzhiyun static int seiko_panel_probe(struct device *dev,
233*4882a593Smuzhiyun const struct seiko_panel_desc *desc)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun struct seiko_panel *panel;
236*4882a593Smuzhiyun int err;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
239*4882a593Smuzhiyun if (!panel)
240*4882a593Smuzhiyun return -ENOMEM;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun panel->enabled = false;
243*4882a593Smuzhiyun panel->prepared = false;
244*4882a593Smuzhiyun panel->desc = desc;
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun panel->dvdd = devm_regulator_get(dev, "dvdd");
247*4882a593Smuzhiyun if (IS_ERR(panel->dvdd))
248*4882a593Smuzhiyun return PTR_ERR(panel->dvdd);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun panel->avdd = devm_regulator_get(dev, "avdd");
251*4882a593Smuzhiyun if (IS_ERR(panel->avdd))
252*4882a593Smuzhiyun return PTR_ERR(panel->avdd);
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun drm_panel_init(&panel->base, dev, &seiko_panel_funcs,
255*4882a593Smuzhiyun DRM_MODE_CONNECTOR_DPI);
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun err = drm_panel_of_backlight(&panel->base);
258*4882a593Smuzhiyun if (err)
259*4882a593Smuzhiyun return err;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun drm_panel_add(&panel->base);
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun dev_set_drvdata(dev, panel);
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun return 0;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
seiko_panel_remove(struct platform_device * pdev)268*4882a593Smuzhiyun static int seiko_panel_remove(struct platform_device *pdev)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun struct seiko_panel *panel = dev_get_drvdata(&pdev->dev);
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun drm_panel_remove(&panel->base);
273*4882a593Smuzhiyun drm_panel_disable(&panel->base);
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun return 0;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
seiko_panel_shutdown(struct platform_device * pdev)278*4882a593Smuzhiyun static void seiko_panel_shutdown(struct platform_device *pdev)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun struct seiko_panel *panel = dev_get_drvdata(&pdev->dev);
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun drm_panel_disable(&panel->base);
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun static const struct display_timing seiko_43wvf1g_timing = {
286*4882a593Smuzhiyun .pixelclock = { 33500000, 33500000, 33500000 },
287*4882a593Smuzhiyun .hactive = { 800, 800, 800 },
288*4882a593Smuzhiyun .hfront_porch = { 164, 164, 164 },
289*4882a593Smuzhiyun .hback_porch = { 89, 89, 89 },
290*4882a593Smuzhiyun .hsync_len = { 10, 10, 10 },
291*4882a593Smuzhiyun .vactive = { 480, 480, 480 },
292*4882a593Smuzhiyun .vfront_porch = { 10, 10, 10 },
293*4882a593Smuzhiyun .vback_porch = { 23, 23, 23 },
294*4882a593Smuzhiyun .vsync_len = { 10, 10, 10 },
295*4882a593Smuzhiyun .flags = DISPLAY_FLAGS_DE_LOW,
296*4882a593Smuzhiyun };
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun static const struct seiko_panel_desc seiko_43wvf1g = {
299*4882a593Smuzhiyun .timings = &seiko_43wvf1g_timing,
300*4882a593Smuzhiyun .num_timings = 1,
301*4882a593Smuzhiyun .bpc = 8,
302*4882a593Smuzhiyun .size = {
303*4882a593Smuzhiyun .width = 93,
304*4882a593Smuzhiyun .height = 57,
305*4882a593Smuzhiyun },
306*4882a593Smuzhiyun .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
307*4882a593Smuzhiyun .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
308*4882a593Smuzhiyun };
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun static const struct of_device_id platform_of_match[] = {
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun .compatible = "sii,43wvf1g",
313*4882a593Smuzhiyun .data = &seiko_43wvf1g,
314*4882a593Smuzhiyun }, {
315*4882a593Smuzhiyun /* sentinel */
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun };
318*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, platform_of_match);
319*4882a593Smuzhiyun
seiko_panel_platform_probe(struct platform_device * pdev)320*4882a593Smuzhiyun static int seiko_panel_platform_probe(struct platform_device *pdev)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun const struct of_device_id *id;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun id = of_match_node(platform_of_match, pdev->dev.of_node);
325*4882a593Smuzhiyun if (!id)
326*4882a593Smuzhiyun return -ENODEV;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun return seiko_panel_probe(&pdev->dev, id->data);
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun static struct platform_driver seiko_panel_platform_driver = {
332*4882a593Smuzhiyun .driver = {
333*4882a593Smuzhiyun .name = "seiko_panel",
334*4882a593Smuzhiyun .of_match_table = platform_of_match,
335*4882a593Smuzhiyun },
336*4882a593Smuzhiyun .probe = seiko_panel_platform_probe,
337*4882a593Smuzhiyun .remove = seiko_panel_remove,
338*4882a593Smuzhiyun .shutdown = seiko_panel_shutdown,
339*4882a593Smuzhiyun };
340*4882a593Smuzhiyun module_platform_driver(seiko_panel_platform_driver);
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun MODULE_AUTHOR("Marco Franchi <marco.franchi@nxp.com>");
343*4882a593Smuzhiyun MODULE_DESCRIPTION("Seiko 43WVF1G panel driver");
344*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
345