1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * ld9040 AMOLED LCD drm_panel driver.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2014 Samsung Electronics Co., Ltd
6*4882a593Smuzhiyun * Derived from drivers/video/backlight/ld9040.c
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Andrzej Hajda <a.hajda@samsung.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/of.h>
15*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
16*4882a593Smuzhiyun #include <linux/spi/spi.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <video/mipi_display.h>
19*4882a593Smuzhiyun #include <video/of_videomode.h>
20*4882a593Smuzhiyun #include <video/videomode.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include <drm/drm_modes.h>
23*4882a593Smuzhiyun #include <drm/drm_panel.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /* Manufacturer Command Set */
26*4882a593Smuzhiyun #define MCS_MANPWR 0xb0
27*4882a593Smuzhiyun #define MCS_ELVSS_ON 0xb1
28*4882a593Smuzhiyun #define MCS_USER_SETTING 0xf0
29*4882a593Smuzhiyun #define MCS_DISPCTL 0xf2
30*4882a593Smuzhiyun #define MCS_POWER_CTRL 0xf4
31*4882a593Smuzhiyun #define MCS_GTCON 0xf7
32*4882a593Smuzhiyun #define MCS_PANEL_CONDITION 0xf8
33*4882a593Smuzhiyun #define MCS_GAMMA_SET1 0xf9
34*4882a593Smuzhiyun #define MCS_GAMMA_CTRL 0xfb
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /* array of gamma tables for gamma value 2.2 */
37*4882a593Smuzhiyun static u8 const ld9040_gammas[25][22] = {
38*4882a593Smuzhiyun { 0xf9, 0x00, 0x13, 0xb2, 0xba, 0xd2, 0x00, 0x30, 0x00, 0xaf, 0xc0,
39*4882a593Smuzhiyun 0xb8, 0xcd, 0x00, 0x3d, 0x00, 0xa8, 0xb8, 0xb7, 0xcd, 0x00, 0x44 },
40*4882a593Smuzhiyun { 0xf9, 0x00, 0x13, 0xb9, 0xb9, 0xd0, 0x00, 0x3c, 0x00, 0xaf, 0xbf,
41*4882a593Smuzhiyun 0xb6, 0xcb, 0x00, 0x4b, 0x00, 0xa8, 0xb9, 0xb5, 0xcc, 0x00, 0x52 },
42*4882a593Smuzhiyun { 0xf9, 0x00, 0x13, 0xba, 0xb9, 0xcd, 0x00, 0x41, 0x00, 0xb0, 0xbe,
43*4882a593Smuzhiyun 0xb5, 0xc9, 0x00, 0x51, 0x00, 0xa9, 0xb9, 0xb5, 0xca, 0x00, 0x57 },
44*4882a593Smuzhiyun { 0xf9, 0x00, 0x13, 0xb9, 0xb8, 0xcd, 0x00, 0x46, 0x00, 0xb1, 0xbc,
45*4882a593Smuzhiyun 0xb5, 0xc8, 0x00, 0x56, 0x00, 0xaa, 0xb8, 0xb4, 0xc9, 0x00, 0x5d },
46*4882a593Smuzhiyun { 0xf9, 0x00, 0x13, 0xba, 0xb8, 0xcb, 0x00, 0x4b, 0x00, 0xb3, 0xbc,
47*4882a593Smuzhiyun 0xb4, 0xc7, 0x00, 0x5c, 0x00, 0xac, 0xb8, 0xb4, 0xc8, 0x00, 0x62 },
48*4882a593Smuzhiyun { 0xf9, 0x00, 0x13, 0xbb, 0xb7, 0xca, 0x00, 0x4f, 0x00, 0xb4, 0xbb,
49*4882a593Smuzhiyun 0xb3, 0xc7, 0x00, 0x60, 0x00, 0xad, 0xb8, 0xb4, 0xc7, 0x00, 0x67 },
50*4882a593Smuzhiyun { 0xf9, 0x00, 0x47, 0xba, 0xb6, 0xca, 0x00, 0x53, 0x00, 0xb5, 0xbb,
51*4882a593Smuzhiyun 0xb3, 0xc6, 0x00, 0x65, 0x00, 0xae, 0xb8, 0xb3, 0xc7, 0x00, 0x6c },
52*4882a593Smuzhiyun { 0xf9, 0x00, 0x71, 0xbb, 0xb5, 0xc8, 0x00, 0x57, 0x00, 0xb5, 0xbb,
53*4882a593Smuzhiyun 0xb0, 0xc5, 0x00, 0x6a, 0x00, 0xae, 0xb9, 0xb1, 0xc6, 0x00, 0x70 },
54*4882a593Smuzhiyun { 0xf9, 0x00, 0x7b, 0xbb, 0xb4, 0xc8, 0x00, 0x5b, 0x00, 0xb5, 0xba,
55*4882a593Smuzhiyun 0xb1, 0xc4, 0x00, 0x6e, 0x00, 0xae, 0xb9, 0xb0, 0xc5, 0x00, 0x75 },
56*4882a593Smuzhiyun { 0xf9, 0x00, 0x82, 0xba, 0xb4, 0xc7, 0x00, 0x5f, 0x00, 0xb5, 0xba,
57*4882a593Smuzhiyun 0xb0, 0xc3, 0x00, 0x72, 0x00, 0xae, 0xb8, 0xb0, 0xc3, 0x00, 0x7a },
58*4882a593Smuzhiyun { 0xf9, 0x00, 0x89, 0xba, 0xb3, 0xc8, 0x00, 0x62, 0x00, 0xb6, 0xba,
59*4882a593Smuzhiyun 0xaf, 0xc3, 0x00, 0x76, 0x00, 0xaf, 0xb7, 0xae, 0xc4, 0x00, 0x7e },
60*4882a593Smuzhiyun { 0xf9, 0x00, 0x8b, 0xb9, 0xb3, 0xc7, 0x00, 0x65, 0x00, 0xb7, 0xb8,
61*4882a593Smuzhiyun 0xaf, 0xc3, 0x00, 0x7a, 0x00, 0x80, 0xb6, 0xae, 0xc4, 0x00, 0x81 },
62*4882a593Smuzhiyun { 0xf9, 0x00, 0x93, 0xba, 0xb3, 0xc5, 0x00, 0x69, 0x00, 0xb8, 0xb9,
63*4882a593Smuzhiyun 0xae, 0xc1, 0x00, 0x7f, 0x00, 0xb0, 0xb6, 0xae, 0xc3, 0x00, 0x85 },
64*4882a593Smuzhiyun { 0xf9, 0x00, 0x97, 0xba, 0xb2, 0xc5, 0x00, 0x6c, 0x00, 0xb8, 0xb8,
65*4882a593Smuzhiyun 0xae, 0xc1, 0x00, 0x82, 0x00, 0xb0, 0xb6, 0xae, 0xc2, 0x00, 0x89 },
66*4882a593Smuzhiyun { 0xf9, 0x00, 0x9a, 0xba, 0xb1, 0xc4, 0x00, 0x6f, 0x00, 0xb8, 0xb8,
67*4882a593Smuzhiyun 0xad, 0xc0, 0x00, 0x86, 0x00, 0xb0, 0xb7, 0xad, 0xc0, 0x00, 0x8d },
68*4882a593Smuzhiyun { 0xf9, 0x00, 0x9c, 0xb9, 0xb0, 0xc4, 0x00, 0x72, 0x00, 0xb8, 0xb8,
69*4882a593Smuzhiyun 0xac, 0xbf, 0x00, 0x8a, 0x00, 0xb0, 0xb6, 0xac, 0xc0, 0x00, 0x91 },
70*4882a593Smuzhiyun { 0xf9, 0x00, 0x9e, 0xba, 0xb0, 0xc2, 0x00, 0x75, 0x00, 0xb9, 0xb8,
71*4882a593Smuzhiyun 0xab, 0xbe, 0x00, 0x8e, 0x00, 0xb0, 0xb6, 0xac, 0xbf, 0x00, 0x94 },
72*4882a593Smuzhiyun { 0xf9, 0x00, 0xa0, 0xb9, 0xaf, 0xc3, 0x00, 0x77, 0x00, 0xb9, 0xb7,
73*4882a593Smuzhiyun 0xab, 0xbe, 0x00, 0x90, 0x00, 0xb0, 0xb6, 0xab, 0xbf, 0x00, 0x97 },
74*4882a593Smuzhiyun { 0xf9, 0x00, 0xa2, 0xb9, 0xaf, 0xc2, 0x00, 0x7a, 0x00, 0xb9, 0xb7,
75*4882a593Smuzhiyun 0xaa, 0xbd, 0x00, 0x94, 0x00, 0xb0, 0xb5, 0xab, 0xbf, 0x00, 0x9a },
76*4882a593Smuzhiyun { 0xf9, 0x00, 0xa4, 0xb9, 0xaf, 0xc1, 0x00, 0x7d, 0x00, 0xb9, 0xb6,
77*4882a593Smuzhiyun 0xaa, 0xbb, 0x00, 0x97, 0x00, 0xb1, 0xb5, 0xaa, 0xbf, 0x00, 0x9d },
78*4882a593Smuzhiyun { 0xf9, 0x00, 0xa4, 0xb8, 0xb0, 0xbf, 0x00, 0x80, 0x00, 0xb8, 0xb6,
79*4882a593Smuzhiyun 0xaa, 0xbc, 0x00, 0x9a, 0x00, 0xb0, 0xb5, 0xab, 0xbd, 0x00, 0xa0 },
80*4882a593Smuzhiyun { 0xf9, 0x00, 0xa8, 0xb8, 0xae, 0xbe, 0x00, 0x84, 0x00, 0xb9, 0xb7,
81*4882a593Smuzhiyun 0xa8, 0xbc, 0x00, 0x9d, 0x00, 0xb2, 0xb5, 0xaa, 0xbc, 0x00, 0xa4 },
82*4882a593Smuzhiyun { 0xf9, 0x00, 0xa9, 0xb6, 0xad, 0xbf, 0x00, 0x86, 0x00, 0xb8, 0xb5,
83*4882a593Smuzhiyun 0xa8, 0xbc, 0x00, 0xa0, 0x00, 0xb3, 0xb3, 0xa9, 0xbc, 0x00, 0xa7 },
84*4882a593Smuzhiyun { 0xf9, 0x00, 0xa9, 0xb7, 0xae, 0xbd, 0x00, 0x89, 0x00, 0xb7, 0xb6,
85*4882a593Smuzhiyun 0xa8, 0xba, 0x00, 0xa4, 0x00, 0xb1, 0xb4, 0xaa, 0xbb, 0x00, 0xaa },
86*4882a593Smuzhiyun { 0xf9, 0x00, 0xa7, 0xb4, 0xae, 0xbf, 0x00, 0x91, 0x00, 0xb2, 0xb4,
87*4882a593Smuzhiyun 0xaa, 0xbb, 0x00, 0xac, 0x00, 0xb3, 0xb1, 0xaa, 0xbc, 0x00, 0xb3 },
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun struct ld9040 {
91*4882a593Smuzhiyun struct device *dev;
92*4882a593Smuzhiyun struct drm_panel panel;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun struct regulator_bulk_data supplies[2];
95*4882a593Smuzhiyun struct gpio_desc *reset_gpio;
96*4882a593Smuzhiyun u32 power_on_delay;
97*4882a593Smuzhiyun u32 reset_delay;
98*4882a593Smuzhiyun struct videomode vm;
99*4882a593Smuzhiyun u32 width_mm;
100*4882a593Smuzhiyun u32 height_mm;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun int brightness;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /* This field is tested by functions directly accessing bus before
105*4882a593Smuzhiyun * transfer, transfer is skipped if it is set. In case of transfer
106*4882a593Smuzhiyun * failure or unexpected response the field is set to error value.
107*4882a593Smuzhiyun * Such construct allows to eliminate many checks in higher level
108*4882a593Smuzhiyun * functions.
109*4882a593Smuzhiyun */
110*4882a593Smuzhiyun int error;
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun
panel_to_ld9040(struct drm_panel * panel)113*4882a593Smuzhiyun static inline struct ld9040 *panel_to_ld9040(struct drm_panel *panel)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun return container_of(panel, struct ld9040, panel);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
ld9040_clear_error(struct ld9040 * ctx)118*4882a593Smuzhiyun static int ld9040_clear_error(struct ld9040 *ctx)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun int ret = ctx->error;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun ctx->error = 0;
123*4882a593Smuzhiyun return ret;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
ld9040_spi_write_word(struct ld9040 * ctx,u16 data)126*4882a593Smuzhiyun static int ld9040_spi_write_word(struct ld9040 *ctx, u16 data)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(ctx->dev);
129*4882a593Smuzhiyun struct spi_transfer xfer = {
130*4882a593Smuzhiyun .len = 2,
131*4882a593Smuzhiyun .tx_buf = &data,
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun struct spi_message msg;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun spi_message_init(&msg);
136*4882a593Smuzhiyun spi_message_add_tail(&xfer, &msg);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun return spi_sync(spi, &msg);
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
ld9040_dcs_write(struct ld9040 * ctx,const u8 * data,size_t len)141*4882a593Smuzhiyun static void ld9040_dcs_write(struct ld9040 *ctx, const u8 *data, size_t len)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun int ret = 0;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun if (ctx->error < 0 || len == 0)
146*4882a593Smuzhiyun return;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun dev_dbg(ctx->dev, "writing dcs seq: %*ph\n", (int)len, data);
149*4882a593Smuzhiyun ret = ld9040_spi_write_word(ctx, *data);
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun while (!ret && --len) {
152*4882a593Smuzhiyun ++data;
153*4882a593Smuzhiyun ret = ld9040_spi_write_word(ctx, *data | 0x100);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun if (ret) {
157*4882a593Smuzhiyun dev_err(ctx->dev, "error %d writing dcs seq: %*ph\n", ret,
158*4882a593Smuzhiyun (int)len, data);
159*4882a593Smuzhiyun ctx->error = ret;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun usleep_range(300, 310);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun #define ld9040_dcs_write_seq_static(ctx, seq...) \
166*4882a593Smuzhiyun ({\
167*4882a593Smuzhiyun static const u8 d[] = { seq };\
168*4882a593Smuzhiyun ld9040_dcs_write(ctx, d, ARRAY_SIZE(d));\
169*4882a593Smuzhiyun })
170*4882a593Smuzhiyun
ld9040_brightness_set(struct ld9040 * ctx)171*4882a593Smuzhiyun static void ld9040_brightness_set(struct ld9040 *ctx)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun ld9040_dcs_write(ctx, ld9040_gammas[ctx->brightness],
174*4882a593Smuzhiyun ARRAY_SIZE(ld9040_gammas[ctx->brightness]));
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun ld9040_dcs_write_seq_static(ctx, MCS_GAMMA_CTRL, 0x02, 0x5a);
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
ld9040_init(struct ld9040 * ctx)179*4882a593Smuzhiyun static void ld9040_init(struct ld9040 *ctx)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun ld9040_dcs_write_seq_static(ctx, MCS_USER_SETTING, 0x5a, 0x5a);
182*4882a593Smuzhiyun ld9040_dcs_write_seq_static(ctx, MCS_PANEL_CONDITION,
183*4882a593Smuzhiyun 0x05, 0x65, 0x96, 0x71, 0x7d, 0x19, 0x3b, 0x0d,
184*4882a593Smuzhiyun 0x19, 0x7e, 0x0d, 0xe2, 0x00, 0x00, 0x7e, 0x7d,
185*4882a593Smuzhiyun 0x07, 0x07, 0x20, 0x20, 0x20, 0x02, 0x02);
186*4882a593Smuzhiyun ld9040_dcs_write_seq_static(ctx, MCS_DISPCTL,
187*4882a593Smuzhiyun 0x02, 0x08, 0x08, 0x10, 0x10);
188*4882a593Smuzhiyun ld9040_dcs_write_seq_static(ctx, MCS_MANPWR, 0x04);
189*4882a593Smuzhiyun ld9040_dcs_write_seq_static(ctx, MCS_POWER_CTRL,
190*4882a593Smuzhiyun 0x0a, 0x87, 0x25, 0x6a, 0x44, 0x02, 0x88);
191*4882a593Smuzhiyun ld9040_dcs_write_seq_static(ctx, MCS_ELVSS_ON, 0x0d, 0x00, 0x16);
192*4882a593Smuzhiyun ld9040_dcs_write_seq_static(ctx, MCS_GTCON, 0x09, 0x00, 0x00);
193*4882a593Smuzhiyun ld9040_brightness_set(ctx);
194*4882a593Smuzhiyun ld9040_dcs_write_seq_static(ctx, MIPI_DCS_EXIT_SLEEP_MODE);
195*4882a593Smuzhiyun ld9040_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_ON);
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
ld9040_power_on(struct ld9040 * ctx)198*4882a593Smuzhiyun static int ld9040_power_on(struct ld9040 *ctx)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun int ret;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
203*4882a593Smuzhiyun if (ret < 0)
204*4882a593Smuzhiyun return ret;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun msleep(ctx->power_on_delay);
207*4882a593Smuzhiyun gpiod_set_value(ctx->reset_gpio, 0);
208*4882a593Smuzhiyun msleep(ctx->reset_delay);
209*4882a593Smuzhiyun gpiod_set_value(ctx->reset_gpio, 1);
210*4882a593Smuzhiyun msleep(ctx->reset_delay);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun return 0;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun
ld9040_power_off(struct ld9040 * ctx)215*4882a593Smuzhiyun static int ld9040_power_off(struct ld9040 *ctx)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
ld9040_disable(struct drm_panel * panel)220*4882a593Smuzhiyun static int ld9040_disable(struct drm_panel *panel)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun return 0;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
ld9040_unprepare(struct drm_panel * panel)225*4882a593Smuzhiyun static int ld9040_unprepare(struct drm_panel *panel)
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun struct ld9040 *ctx = panel_to_ld9040(panel);
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun msleep(120);
230*4882a593Smuzhiyun ld9040_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_OFF);
231*4882a593Smuzhiyun ld9040_dcs_write_seq_static(ctx, MIPI_DCS_ENTER_SLEEP_MODE);
232*4882a593Smuzhiyun msleep(40);
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun ld9040_clear_error(ctx);
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun return ld9040_power_off(ctx);
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun
ld9040_prepare(struct drm_panel * panel)239*4882a593Smuzhiyun static int ld9040_prepare(struct drm_panel *panel)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun struct ld9040 *ctx = panel_to_ld9040(panel);
242*4882a593Smuzhiyun int ret;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun ret = ld9040_power_on(ctx);
245*4882a593Smuzhiyun if (ret < 0)
246*4882a593Smuzhiyun return ret;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun ld9040_init(ctx);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun ret = ld9040_clear_error(ctx);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun if (ret < 0)
253*4882a593Smuzhiyun ld9040_unprepare(panel);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun return ret;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
ld9040_enable(struct drm_panel * panel)258*4882a593Smuzhiyun static int ld9040_enable(struct drm_panel *panel)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun return 0;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
ld9040_get_modes(struct drm_panel * panel,struct drm_connector * connector)263*4882a593Smuzhiyun static int ld9040_get_modes(struct drm_panel *panel,
264*4882a593Smuzhiyun struct drm_connector *connector)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun struct ld9040 *ctx = panel_to_ld9040(panel);
267*4882a593Smuzhiyun struct drm_display_mode *mode;
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun mode = drm_mode_create(connector->dev);
270*4882a593Smuzhiyun if (!mode) {
271*4882a593Smuzhiyun dev_err(panel->dev, "failed to create a new display mode\n");
272*4882a593Smuzhiyun return 0;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun drm_display_mode_from_videomode(&ctx->vm, mode);
276*4882a593Smuzhiyun mode->width_mm = ctx->width_mm;
277*4882a593Smuzhiyun mode->height_mm = ctx->height_mm;
278*4882a593Smuzhiyun connector->display_info.width_mm = mode->width_mm;
279*4882a593Smuzhiyun connector->display_info.height_mm = mode->height_mm;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
282*4882a593Smuzhiyun drm_mode_probed_add(connector, mode);
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun return 1;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun static const struct drm_panel_funcs ld9040_drm_funcs = {
288*4882a593Smuzhiyun .disable = ld9040_disable,
289*4882a593Smuzhiyun .unprepare = ld9040_unprepare,
290*4882a593Smuzhiyun .prepare = ld9040_prepare,
291*4882a593Smuzhiyun .enable = ld9040_enable,
292*4882a593Smuzhiyun .get_modes = ld9040_get_modes,
293*4882a593Smuzhiyun };
294*4882a593Smuzhiyun
ld9040_parse_dt(struct ld9040 * ctx)295*4882a593Smuzhiyun static int ld9040_parse_dt(struct ld9040 *ctx)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun struct device *dev = ctx->dev;
298*4882a593Smuzhiyun struct device_node *np = dev->of_node;
299*4882a593Smuzhiyun int ret;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun ret = of_get_videomode(np, &ctx->vm, 0);
302*4882a593Smuzhiyun if (ret < 0)
303*4882a593Smuzhiyun return ret;
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun of_property_read_u32(np, "power-on-delay", &ctx->power_on_delay);
306*4882a593Smuzhiyun of_property_read_u32(np, "reset-delay", &ctx->reset_delay);
307*4882a593Smuzhiyun of_property_read_u32(np, "panel-width-mm", &ctx->width_mm);
308*4882a593Smuzhiyun of_property_read_u32(np, "panel-height-mm", &ctx->height_mm);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun return 0;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
ld9040_probe(struct spi_device * spi)313*4882a593Smuzhiyun static int ld9040_probe(struct spi_device *spi)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun struct device *dev = &spi->dev;
316*4882a593Smuzhiyun struct ld9040 *ctx;
317*4882a593Smuzhiyun int ret;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun ctx = devm_kzalloc(dev, sizeof(struct ld9040), GFP_KERNEL);
320*4882a593Smuzhiyun if (!ctx)
321*4882a593Smuzhiyun return -ENOMEM;
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun spi_set_drvdata(spi, ctx);
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun ctx->dev = dev;
326*4882a593Smuzhiyun ctx->brightness = ARRAY_SIZE(ld9040_gammas) - 1;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun ret = ld9040_parse_dt(ctx);
329*4882a593Smuzhiyun if (ret < 0)
330*4882a593Smuzhiyun return ret;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun ctx->supplies[0].supply = "vdd3";
333*4882a593Smuzhiyun ctx->supplies[1].supply = "vci";
334*4882a593Smuzhiyun ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
335*4882a593Smuzhiyun ctx->supplies);
336*4882a593Smuzhiyun if (ret < 0)
337*4882a593Smuzhiyun return ret;
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
340*4882a593Smuzhiyun if (IS_ERR(ctx->reset_gpio)) {
341*4882a593Smuzhiyun dev_err(dev, "cannot get reset-gpios %ld\n",
342*4882a593Smuzhiyun PTR_ERR(ctx->reset_gpio));
343*4882a593Smuzhiyun return PTR_ERR(ctx->reset_gpio);
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun spi->bits_per_word = 9;
347*4882a593Smuzhiyun ret = spi_setup(spi);
348*4882a593Smuzhiyun if (ret < 0) {
349*4882a593Smuzhiyun dev_err(dev, "spi setup failed.\n");
350*4882a593Smuzhiyun return ret;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun drm_panel_init(&ctx->panel, dev, &ld9040_drm_funcs,
354*4882a593Smuzhiyun DRM_MODE_CONNECTOR_DPI);
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun drm_panel_add(&ctx->panel);
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun return 0;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun
ld9040_remove(struct spi_device * spi)361*4882a593Smuzhiyun static int ld9040_remove(struct spi_device *spi)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun struct ld9040 *ctx = spi_get_drvdata(spi);
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun ld9040_power_off(ctx);
366*4882a593Smuzhiyun drm_panel_remove(&ctx->panel);
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun return 0;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun static const struct of_device_id ld9040_of_match[] = {
372*4882a593Smuzhiyun { .compatible = "samsung,ld9040" },
373*4882a593Smuzhiyun { }
374*4882a593Smuzhiyun };
375*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ld9040_of_match);
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun static const struct spi_device_id ld9040_ids[] = {
378*4882a593Smuzhiyun { "ld9040", },
379*4882a593Smuzhiyun { /* sentinel */ }
380*4882a593Smuzhiyun };
381*4882a593Smuzhiyun MODULE_DEVICE_TABLE(spi, ld9040_ids);
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun static struct spi_driver ld9040_driver = {
384*4882a593Smuzhiyun .probe = ld9040_probe,
385*4882a593Smuzhiyun .remove = ld9040_remove,
386*4882a593Smuzhiyun .driver = {
387*4882a593Smuzhiyun .name = "panel-samsung-ld9040",
388*4882a593Smuzhiyun .of_match_table = ld9040_of_match,
389*4882a593Smuzhiyun },
390*4882a593Smuzhiyun };
391*4882a593Smuzhiyun module_spi_driver(ld9040_driver);
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun MODULE_AUTHOR("Andrzej Hajda <a.hajda@samsung.com>");
394*4882a593Smuzhiyun MODULE_DESCRIPTION("ld9040 LCD Driver");
395*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
396