xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/panel/panel-raydium-rm67191.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Raydium RM67191 MIPI-DSI panel driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2019 NXP
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/backlight.h>
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/of.h>
13*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <video/mipi_display.h>
16*4882a593Smuzhiyun #include <video/of_videomode.h>
17*4882a593Smuzhiyun #include <video/videomode.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <drm/drm_crtc.h>
20*4882a593Smuzhiyun #include <drm/drm_mipi_dsi.h>
21*4882a593Smuzhiyun #include <drm/drm_panel.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /* Panel specific color-format bits */
24*4882a593Smuzhiyun #define COL_FMT_16BPP 0x55
25*4882a593Smuzhiyun #define COL_FMT_18BPP 0x66
26*4882a593Smuzhiyun #define COL_FMT_24BPP 0x77
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun /* Write Manufacture Command Set Control */
29*4882a593Smuzhiyun #define WRMAUCCTR 0xFE
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun /* Manufacturer Command Set pages (CMD2) */
32*4882a593Smuzhiyun struct cmd_set_entry {
33*4882a593Smuzhiyun 	u8 cmd;
34*4882a593Smuzhiyun 	u8 param;
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /*
38*4882a593Smuzhiyun  * There is no description in the Reference Manual about these commands.
39*4882a593Smuzhiyun  * We received them from vendor, so just use them as is.
40*4882a593Smuzhiyun  */
41*4882a593Smuzhiyun static const struct cmd_set_entry manufacturer_cmd_set[] = {
42*4882a593Smuzhiyun 	{0xFE, 0x0B},
43*4882a593Smuzhiyun 	{0x28, 0x40},
44*4882a593Smuzhiyun 	{0x29, 0x4F},
45*4882a593Smuzhiyun 	{0xFE, 0x0E},
46*4882a593Smuzhiyun 	{0x4B, 0x00},
47*4882a593Smuzhiyun 	{0x4C, 0x0F},
48*4882a593Smuzhiyun 	{0x4D, 0x20},
49*4882a593Smuzhiyun 	{0x4E, 0x40},
50*4882a593Smuzhiyun 	{0x4F, 0x60},
51*4882a593Smuzhiyun 	{0x50, 0xA0},
52*4882a593Smuzhiyun 	{0x51, 0xC0},
53*4882a593Smuzhiyun 	{0x52, 0xE0},
54*4882a593Smuzhiyun 	{0x53, 0xFF},
55*4882a593Smuzhiyun 	{0xFE, 0x0D},
56*4882a593Smuzhiyun 	{0x18, 0x08},
57*4882a593Smuzhiyun 	{0x42, 0x00},
58*4882a593Smuzhiyun 	{0x08, 0x41},
59*4882a593Smuzhiyun 	{0x46, 0x02},
60*4882a593Smuzhiyun 	{0x72, 0x09},
61*4882a593Smuzhiyun 	{0xFE, 0x0A},
62*4882a593Smuzhiyun 	{0x24, 0x17},
63*4882a593Smuzhiyun 	{0x04, 0x07},
64*4882a593Smuzhiyun 	{0x1A, 0x0C},
65*4882a593Smuzhiyun 	{0x0F, 0x44},
66*4882a593Smuzhiyun 	{0xFE, 0x04},
67*4882a593Smuzhiyun 	{0x00, 0x0C},
68*4882a593Smuzhiyun 	{0x05, 0x08},
69*4882a593Smuzhiyun 	{0x06, 0x08},
70*4882a593Smuzhiyun 	{0x08, 0x08},
71*4882a593Smuzhiyun 	{0x09, 0x08},
72*4882a593Smuzhiyun 	{0x0A, 0xE6},
73*4882a593Smuzhiyun 	{0x0B, 0x8C},
74*4882a593Smuzhiyun 	{0x1A, 0x12},
75*4882a593Smuzhiyun 	{0x1E, 0xE0},
76*4882a593Smuzhiyun 	{0x29, 0x93},
77*4882a593Smuzhiyun 	{0x2A, 0x93},
78*4882a593Smuzhiyun 	{0x2F, 0x02},
79*4882a593Smuzhiyun 	{0x31, 0x02},
80*4882a593Smuzhiyun 	{0x33, 0x05},
81*4882a593Smuzhiyun 	{0x37, 0x2D},
82*4882a593Smuzhiyun 	{0x38, 0x2D},
83*4882a593Smuzhiyun 	{0x3A, 0x1E},
84*4882a593Smuzhiyun 	{0x3B, 0x1E},
85*4882a593Smuzhiyun 	{0x3D, 0x27},
86*4882a593Smuzhiyun 	{0x3F, 0x80},
87*4882a593Smuzhiyun 	{0x40, 0x40},
88*4882a593Smuzhiyun 	{0x41, 0xE0},
89*4882a593Smuzhiyun 	{0x4F, 0x2F},
90*4882a593Smuzhiyun 	{0x50, 0x1E},
91*4882a593Smuzhiyun 	{0xFE, 0x06},
92*4882a593Smuzhiyun 	{0x00, 0xCC},
93*4882a593Smuzhiyun 	{0x05, 0x05},
94*4882a593Smuzhiyun 	{0x07, 0xA2},
95*4882a593Smuzhiyun 	{0x08, 0xCC},
96*4882a593Smuzhiyun 	{0x0D, 0x03},
97*4882a593Smuzhiyun 	{0x0F, 0xA2},
98*4882a593Smuzhiyun 	{0x32, 0xCC},
99*4882a593Smuzhiyun 	{0x37, 0x05},
100*4882a593Smuzhiyun 	{0x39, 0x83},
101*4882a593Smuzhiyun 	{0x3A, 0xCC},
102*4882a593Smuzhiyun 	{0x41, 0x04},
103*4882a593Smuzhiyun 	{0x43, 0x83},
104*4882a593Smuzhiyun 	{0x44, 0xCC},
105*4882a593Smuzhiyun 	{0x49, 0x05},
106*4882a593Smuzhiyun 	{0x4B, 0xA2},
107*4882a593Smuzhiyun 	{0x4C, 0xCC},
108*4882a593Smuzhiyun 	{0x51, 0x03},
109*4882a593Smuzhiyun 	{0x53, 0xA2},
110*4882a593Smuzhiyun 	{0x75, 0xCC},
111*4882a593Smuzhiyun 	{0x7A, 0x03},
112*4882a593Smuzhiyun 	{0x7C, 0x83},
113*4882a593Smuzhiyun 	{0x7D, 0xCC},
114*4882a593Smuzhiyun 	{0x82, 0x02},
115*4882a593Smuzhiyun 	{0x84, 0x83},
116*4882a593Smuzhiyun 	{0x85, 0xEC},
117*4882a593Smuzhiyun 	{0x86, 0x0F},
118*4882a593Smuzhiyun 	{0x87, 0xFF},
119*4882a593Smuzhiyun 	{0x88, 0x00},
120*4882a593Smuzhiyun 	{0x8A, 0x02},
121*4882a593Smuzhiyun 	{0x8C, 0xA2},
122*4882a593Smuzhiyun 	{0x8D, 0xEA},
123*4882a593Smuzhiyun 	{0x8E, 0x01},
124*4882a593Smuzhiyun 	{0x8F, 0xE8},
125*4882a593Smuzhiyun 	{0xFE, 0x06},
126*4882a593Smuzhiyun 	{0x90, 0x0A},
127*4882a593Smuzhiyun 	{0x92, 0x06},
128*4882a593Smuzhiyun 	{0x93, 0xA0},
129*4882a593Smuzhiyun 	{0x94, 0xA8},
130*4882a593Smuzhiyun 	{0x95, 0xEC},
131*4882a593Smuzhiyun 	{0x96, 0x0F},
132*4882a593Smuzhiyun 	{0x97, 0xFF},
133*4882a593Smuzhiyun 	{0x98, 0x00},
134*4882a593Smuzhiyun 	{0x9A, 0x02},
135*4882a593Smuzhiyun 	{0x9C, 0xA2},
136*4882a593Smuzhiyun 	{0xAC, 0x04},
137*4882a593Smuzhiyun 	{0xFE, 0x06},
138*4882a593Smuzhiyun 	{0xB1, 0x12},
139*4882a593Smuzhiyun 	{0xB2, 0x17},
140*4882a593Smuzhiyun 	{0xB3, 0x17},
141*4882a593Smuzhiyun 	{0xB4, 0x17},
142*4882a593Smuzhiyun 	{0xB5, 0x17},
143*4882a593Smuzhiyun 	{0xB6, 0x11},
144*4882a593Smuzhiyun 	{0xB7, 0x08},
145*4882a593Smuzhiyun 	{0xB8, 0x09},
146*4882a593Smuzhiyun 	{0xB9, 0x06},
147*4882a593Smuzhiyun 	{0xBA, 0x07},
148*4882a593Smuzhiyun 	{0xBB, 0x17},
149*4882a593Smuzhiyun 	{0xBC, 0x17},
150*4882a593Smuzhiyun 	{0xBD, 0x17},
151*4882a593Smuzhiyun 	{0xBE, 0x17},
152*4882a593Smuzhiyun 	{0xBF, 0x17},
153*4882a593Smuzhiyun 	{0xC0, 0x17},
154*4882a593Smuzhiyun 	{0xC1, 0x17},
155*4882a593Smuzhiyun 	{0xC2, 0x17},
156*4882a593Smuzhiyun 	{0xC3, 0x17},
157*4882a593Smuzhiyun 	{0xC4, 0x0F},
158*4882a593Smuzhiyun 	{0xC5, 0x0E},
159*4882a593Smuzhiyun 	{0xC6, 0x00},
160*4882a593Smuzhiyun 	{0xC7, 0x01},
161*4882a593Smuzhiyun 	{0xC8, 0x10},
162*4882a593Smuzhiyun 	{0xFE, 0x06},
163*4882a593Smuzhiyun 	{0x95, 0xEC},
164*4882a593Smuzhiyun 	{0x8D, 0xEE},
165*4882a593Smuzhiyun 	{0x44, 0xEC},
166*4882a593Smuzhiyun 	{0x4C, 0xEC},
167*4882a593Smuzhiyun 	{0x32, 0xEC},
168*4882a593Smuzhiyun 	{0x3A, 0xEC},
169*4882a593Smuzhiyun 	{0x7D, 0xEC},
170*4882a593Smuzhiyun 	{0x75, 0xEC},
171*4882a593Smuzhiyun 	{0x00, 0xEC},
172*4882a593Smuzhiyun 	{0x08, 0xEC},
173*4882a593Smuzhiyun 	{0x85, 0xEC},
174*4882a593Smuzhiyun 	{0xA6, 0x21},
175*4882a593Smuzhiyun 	{0xA7, 0x05},
176*4882a593Smuzhiyun 	{0xA9, 0x06},
177*4882a593Smuzhiyun 	{0x82, 0x06},
178*4882a593Smuzhiyun 	{0x41, 0x06},
179*4882a593Smuzhiyun 	{0x7A, 0x07},
180*4882a593Smuzhiyun 	{0x37, 0x07},
181*4882a593Smuzhiyun 	{0x05, 0x06},
182*4882a593Smuzhiyun 	{0x49, 0x06},
183*4882a593Smuzhiyun 	{0x0D, 0x04},
184*4882a593Smuzhiyun 	{0x51, 0x04},
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun static const u32 rad_bus_formats[] = {
188*4882a593Smuzhiyun 	MEDIA_BUS_FMT_RGB888_1X24,
189*4882a593Smuzhiyun 	MEDIA_BUS_FMT_RGB666_1X18,
190*4882a593Smuzhiyun 	MEDIA_BUS_FMT_RGB565_1X16,
191*4882a593Smuzhiyun };
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun static const u32 rad_bus_flags = DRM_BUS_FLAG_DE_LOW |
194*4882a593Smuzhiyun 				 DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun struct rad_panel {
197*4882a593Smuzhiyun 	struct drm_panel panel;
198*4882a593Smuzhiyun 	struct mipi_dsi_device *dsi;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	struct gpio_desc *reset;
201*4882a593Smuzhiyun 	struct backlight_device *backlight;
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	struct regulator_bulk_data *supplies;
204*4882a593Smuzhiyun 	unsigned int num_supplies;
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	bool prepared;
207*4882a593Smuzhiyun 	bool enabled;
208*4882a593Smuzhiyun };
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun static const struct drm_display_mode default_mode = {
211*4882a593Smuzhiyun 	.clock = 132000,
212*4882a593Smuzhiyun 	.hdisplay = 1080,
213*4882a593Smuzhiyun 	.hsync_start = 1080 + 20,
214*4882a593Smuzhiyun 	.hsync_end = 1080 + 20 + 2,
215*4882a593Smuzhiyun 	.htotal = 1080 + 20 + 2 + 34,
216*4882a593Smuzhiyun 	.vdisplay = 1920,
217*4882a593Smuzhiyun 	.vsync_start = 1920 + 10,
218*4882a593Smuzhiyun 	.vsync_end = 1920 + 10 + 2,
219*4882a593Smuzhiyun 	.vtotal = 1920 + 10 + 2 + 4,
220*4882a593Smuzhiyun 	.width_mm = 68,
221*4882a593Smuzhiyun 	.height_mm = 121,
222*4882a593Smuzhiyun 	.flags = DRM_MODE_FLAG_NHSYNC |
223*4882a593Smuzhiyun 		 DRM_MODE_FLAG_NVSYNC,
224*4882a593Smuzhiyun };
225*4882a593Smuzhiyun 
to_rad_panel(struct drm_panel * panel)226*4882a593Smuzhiyun static inline struct rad_panel *to_rad_panel(struct drm_panel *panel)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun 	return container_of(panel, struct rad_panel, panel);
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun 
rad_panel_push_cmd_list(struct mipi_dsi_device * dsi)231*4882a593Smuzhiyun static int rad_panel_push_cmd_list(struct mipi_dsi_device *dsi)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun 	size_t i;
234*4882a593Smuzhiyun 	size_t count = ARRAY_SIZE(manufacturer_cmd_set);
235*4882a593Smuzhiyun 	int ret = 0;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	for (i = 0; i < count; i++) {
238*4882a593Smuzhiyun 		const struct cmd_set_entry *entry = &manufacturer_cmd_set[i];
239*4882a593Smuzhiyun 		u8 buffer[2] = { entry->cmd, entry->param };
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 		ret = mipi_dsi_generic_write(dsi, &buffer, sizeof(buffer));
242*4882a593Smuzhiyun 		if (ret < 0)
243*4882a593Smuzhiyun 			return ret;
244*4882a593Smuzhiyun 	}
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	return ret;
247*4882a593Smuzhiyun };
248*4882a593Smuzhiyun 
color_format_from_dsi_format(enum mipi_dsi_pixel_format format)249*4882a593Smuzhiyun static int color_format_from_dsi_format(enum mipi_dsi_pixel_format format)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun 	switch (format) {
252*4882a593Smuzhiyun 	case MIPI_DSI_FMT_RGB565:
253*4882a593Smuzhiyun 		return COL_FMT_16BPP;
254*4882a593Smuzhiyun 	case MIPI_DSI_FMT_RGB666:
255*4882a593Smuzhiyun 	case MIPI_DSI_FMT_RGB666_PACKED:
256*4882a593Smuzhiyun 		return COL_FMT_18BPP;
257*4882a593Smuzhiyun 	case MIPI_DSI_FMT_RGB888:
258*4882a593Smuzhiyun 		return COL_FMT_24BPP;
259*4882a593Smuzhiyun 	default:
260*4882a593Smuzhiyun 		return COL_FMT_24BPP; /* for backward compatibility */
261*4882a593Smuzhiyun 	}
262*4882a593Smuzhiyun };
263*4882a593Smuzhiyun 
rad_panel_prepare(struct drm_panel * panel)264*4882a593Smuzhiyun static int rad_panel_prepare(struct drm_panel *panel)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun 	struct rad_panel *rad = to_rad_panel(panel);
267*4882a593Smuzhiyun 	int ret;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	if (rad->prepared)
270*4882a593Smuzhiyun 		return 0;
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	ret = regulator_bulk_enable(rad->num_supplies, rad->supplies);
273*4882a593Smuzhiyun 	if (ret)
274*4882a593Smuzhiyun 		return ret;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	if (rad->reset) {
277*4882a593Smuzhiyun 		gpiod_set_value_cansleep(rad->reset, 1);
278*4882a593Smuzhiyun 		usleep_range(3000, 5000);
279*4882a593Smuzhiyun 		gpiod_set_value_cansleep(rad->reset, 0);
280*4882a593Smuzhiyun 		usleep_range(18000, 20000);
281*4882a593Smuzhiyun 	}
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	rad->prepared = true;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	return 0;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun 
rad_panel_unprepare(struct drm_panel * panel)288*4882a593Smuzhiyun static int rad_panel_unprepare(struct drm_panel *panel)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun 	struct rad_panel *rad = to_rad_panel(panel);
291*4882a593Smuzhiyun 	int ret;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	if (!rad->prepared)
294*4882a593Smuzhiyun 		return 0;
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	/*
297*4882a593Smuzhiyun 	 * Right after asserting the reset, we need to release it, so that the
298*4882a593Smuzhiyun 	 * touch driver can have an active connection with the touch controller
299*4882a593Smuzhiyun 	 * even after the display is turned off.
300*4882a593Smuzhiyun 	 */
301*4882a593Smuzhiyun 	if (rad->reset) {
302*4882a593Smuzhiyun 		gpiod_set_value_cansleep(rad->reset, 1);
303*4882a593Smuzhiyun 		usleep_range(15000, 17000);
304*4882a593Smuzhiyun 		gpiod_set_value_cansleep(rad->reset, 0);
305*4882a593Smuzhiyun 	}
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	ret = regulator_bulk_disable(rad->num_supplies, rad->supplies);
308*4882a593Smuzhiyun 	if (ret)
309*4882a593Smuzhiyun 		return ret;
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	rad->prepared = false;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	return 0;
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun 
rad_panel_enable(struct drm_panel * panel)316*4882a593Smuzhiyun static int rad_panel_enable(struct drm_panel *panel)
317*4882a593Smuzhiyun {
318*4882a593Smuzhiyun 	struct rad_panel *rad = to_rad_panel(panel);
319*4882a593Smuzhiyun 	struct mipi_dsi_device *dsi = rad->dsi;
320*4882a593Smuzhiyun 	struct device *dev = &dsi->dev;
321*4882a593Smuzhiyun 	int color_format = color_format_from_dsi_format(dsi->format);
322*4882a593Smuzhiyun 	int ret;
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	if (rad->enabled)
325*4882a593Smuzhiyun 		return 0;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	dsi->mode_flags |= MIPI_DSI_MODE_LPM;
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 	ret = rad_panel_push_cmd_list(dsi);
330*4882a593Smuzhiyun 	if (ret < 0) {
331*4882a593Smuzhiyun 		dev_err(dev, "Failed to send MCS (%d)\n", ret);
332*4882a593Smuzhiyun 		goto fail;
333*4882a593Smuzhiyun 	}
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	/* Select User Command Set table (CMD1) */
336*4882a593Smuzhiyun 	ret = mipi_dsi_generic_write(dsi, (u8[]){ WRMAUCCTR, 0x00 }, 2);
337*4882a593Smuzhiyun 	if (ret < 0)
338*4882a593Smuzhiyun 		goto fail;
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	/* Software reset */
341*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_soft_reset(dsi);
342*4882a593Smuzhiyun 	if (ret < 0) {
343*4882a593Smuzhiyun 		dev_err(dev, "Failed to do Software Reset (%d)\n", ret);
344*4882a593Smuzhiyun 		goto fail;
345*4882a593Smuzhiyun 	}
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 	usleep_range(15000, 17000);
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	/* Set DSI mode */
350*4882a593Smuzhiyun 	ret = mipi_dsi_generic_write(dsi, (u8[]){ 0xC2, 0x0B }, 2);
351*4882a593Smuzhiyun 	if (ret < 0) {
352*4882a593Smuzhiyun 		dev_err(dev, "Failed to set DSI mode (%d)\n", ret);
353*4882a593Smuzhiyun 		goto fail;
354*4882a593Smuzhiyun 	}
355*4882a593Smuzhiyun 	/* Set tear ON */
356*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
357*4882a593Smuzhiyun 	if (ret < 0) {
358*4882a593Smuzhiyun 		dev_err(dev, "Failed to set tear ON (%d)\n", ret);
359*4882a593Smuzhiyun 		goto fail;
360*4882a593Smuzhiyun 	}
361*4882a593Smuzhiyun 	/* Set tear scanline */
362*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_set_tear_scanline(dsi, 0x380);
363*4882a593Smuzhiyun 	if (ret < 0) {
364*4882a593Smuzhiyun 		dev_err(dev, "Failed to set tear scanline (%d)\n", ret);
365*4882a593Smuzhiyun 		goto fail;
366*4882a593Smuzhiyun 	}
367*4882a593Smuzhiyun 	/* Set pixel format */
368*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_set_pixel_format(dsi, color_format);
369*4882a593Smuzhiyun 	dev_dbg(dev, "Interface color format set to 0x%x\n", color_format);
370*4882a593Smuzhiyun 	if (ret < 0) {
371*4882a593Smuzhiyun 		dev_err(dev, "Failed to set pixel format (%d)\n", ret);
372*4882a593Smuzhiyun 		goto fail;
373*4882a593Smuzhiyun 	}
374*4882a593Smuzhiyun 	/* Exit sleep mode */
375*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
376*4882a593Smuzhiyun 	if (ret < 0) {
377*4882a593Smuzhiyun 		dev_err(dev, "Failed to exit sleep mode (%d)\n", ret);
378*4882a593Smuzhiyun 		goto fail;
379*4882a593Smuzhiyun 	}
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	usleep_range(5000, 7000);
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_set_display_on(dsi);
384*4882a593Smuzhiyun 	if (ret < 0) {
385*4882a593Smuzhiyun 		dev_err(dev, "Failed to set display ON (%d)\n", ret);
386*4882a593Smuzhiyun 		goto fail;
387*4882a593Smuzhiyun 	}
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	backlight_enable(rad->backlight);
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	rad->enabled = true;
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	return 0;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun fail:
396*4882a593Smuzhiyun 	gpiod_set_value_cansleep(rad->reset, 1);
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	return ret;
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun 
rad_panel_disable(struct drm_panel * panel)401*4882a593Smuzhiyun static int rad_panel_disable(struct drm_panel *panel)
402*4882a593Smuzhiyun {
403*4882a593Smuzhiyun 	struct rad_panel *rad = to_rad_panel(panel);
404*4882a593Smuzhiyun 	struct mipi_dsi_device *dsi = rad->dsi;
405*4882a593Smuzhiyun 	struct device *dev = &dsi->dev;
406*4882a593Smuzhiyun 	int ret;
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 	if (!rad->enabled)
409*4882a593Smuzhiyun 		return 0;
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 	dsi->mode_flags |= MIPI_DSI_MODE_LPM;
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun 	backlight_disable(rad->backlight);
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	usleep_range(10000, 12000);
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_set_display_off(dsi);
418*4882a593Smuzhiyun 	if (ret < 0) {
419*4882a593Smuzhiyun 		dev_err(dev, "Failed to set display OFF (%d)\n", ret);
420*4882a593Smuzhiyun 		return ret;
421*4882a593Smuzhiyun 	}
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun 	usleep_range(5000, 10000);
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
426*4882a593Smuzhiyun 	if (ret < 0) {
427*4882a593Smuzhiyun 		dev_err(dev, "Failed to enter sleep mode (%d)\n", ret);
428*4882a593Smuzhiyun 		return ret;
429*4882a593Smuzhiyun 	}
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun 	rad->enabled = false;
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 	return 0;
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun 
rad_panel_get_modes(struct drm_panel * panel,struct drm_connector * connector)436*4882a593Smuzhiyun static int rad_panel_get_modes(struct drm_panel *panel,
437*4882a593Smuzhiyun 			       struct drm_connector *connector)
438*4882a593Smuzhiyun {
439*4882a593Smuzhiyun 	struct drm_display_mode *mode;
440*4882a593Smuzhiyun 
441*4882a593Smuzhiyun 	mode = drm_mode_duplicate(connector->dev, &default_mode);
442*4882a593Smuzhiyun 	if (!mode) {
443*4882a593Smuzhiyun 		dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
444*4882a593Smuzhiyun 			default_mode.hdisplay, default_mode.vdisplay,
445*4882a593Smuzhiyun 			drm_mode_vrefresh(&default_mode));
446*4882a593Smuzhiyun 		return -ENOMEM;
447*4882a593Smuzhiyun 	}
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	drm_mode_set_name(mode);
450*4882a593Smuzhiyun 	mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
451*4882a593Smuzhiyun 	drm_mode_probed_add(connector, mode);
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun 	connector->display_info.width_mm = mode->width_mm;
454*4882a593Smuzhiyun 	connector->display_info.height_mm = mode->height_mm;
455*4882a593Smuzhiyun 	connector->display_info.bus_flags = rad_bus_flags;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	drm_display_info_set_bus_formats(&connector->display_info,
458*4882a593Smuzhiyun 					 rad_bus_formats,
459*4882a593Smuzhiyun 					 ARRAY_SIZE(rad_bus_formats));
460*4882a593Smuzhiyun 	return 1;
461*4882a593Smuzhiyun }
462*4882a593Smuzhiyun 
rad_bl_get_brightness(struct backlight_device * bl)463*4882a593Smuzhiyun static int rad_bl_get_brightness(struct backlight_device *bl)
464*4882a593Smuzhiyun {
465*4882a593Smuzhiyun 	struct mipi_dsi_device *dsi = bl_get_data(bl);
466*4882a593Smuzhiyun 	struct rad_panel *rad = mipi_dsi_get_drvdata(dsi);
467*4882a593Smuzhiyun 	u16 brightness;
468*4882a593Smuzhiyun 	int ret;
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 	if (!rad->prepared)
471*4882a593Smuzhiyun 		return 0;
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 	dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_get_display_brightness(dsi, &brightness);
476*4882a593Smuzhiyun 	if (ret < 0)
477*4882a593Smuzhiyun 		return ret;
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	bl->props.brightness = brightness;
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun 	return brightness & 0xff;
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun 
rad_bl_update_status(struct backlight_device * bl)484*4882a593Smuzhiyun static int rad_bl_update_status(struct backlight_device *bl)
485*4882a593Smuzhiyun {
486*4882a593Smuzhiyun 	struct mipi_dsi_device *dsi = bl_get_data(bl);
487*4882a593Smuzhiyun 	struct rad_panel *rad = mipi_dsi_get_drvdata(dsi);
488*4882a593Smuzhiyun 	int ret = 0;
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	if (!rad->prepared)
491*4882a593Smuzhiyun 		return 0;
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_set_display_brightness(dsi, bl->props.brightness);
496*4882a593Smuzhiyun 	if (ret < 0)
497*4882a593Smuzhiyun 		return ret;
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	return 0;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun static const struct backlight_ops rad_bl_ops = {
503*4882a593Smuzhiyun 	.update_status = rad_bl_update_status,
504*4882a593Smuzhiyun 	.get_brightness = rad_bl_get_brightness,
505*4882a593Smuzhiyun };
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun static const struct drm_panel_funcs rad_panel_funcs = {
508*4882a593Smuzhiyun 	.prepare = rad_panel_prepare,
509*4882a593Smuzhiyun 	.unprepare = rad_panel_unprepare,
510*4882a593Smuzhiyun 	.enable = rad_panel_enable,
511*4882a593Smuzhiyun 	.disable = rad_panel_disable,
512*4882a593Smuzhiyun 	.get_modes = rad_panel_get_modes,
513*4882a593Smuzhiyun };
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun static const char * const rad_supply_names[] = {
516*4882a593Smuzhiyun 	"v3p3",
517*4882a593Smuzhiyun 	"v1p8",
518*4882a593Smuzhiyun };
519*4882a593Smuzhiyun 
rad_init_regulators(struct rad_panel * rad)520*4882a593Smuzhiyun static int rad_init_regulators(struct rad_panel *rad)
521*4882a593Smuzhiyun {
522*4882a593Smuzhiyun 	struct device *dev = &rad->dsi->dev;
523*4882a593Smuzhiyun 	int i;
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	rad->num_supplies = ARRAY_SIZE(rad_supply_names);
526*4882a593Smuzhiyun 	rad->supplies = devm_kcalloc(dev, rad->num_supplies,
527*4882a593Smuzhiyun 				     sizeof(*rad->supplies), GFP_KERNEL);
528*4882a593Smuzhiyun 	if (!rad->supplies)
529*4882a593Smuzhiyun 		return -ENOMEM;
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	for (i = 0; i < rad->num_supplies; i++)
532*4882a593Smuzhiyun 		rad->supplies[i].supply = rad_supply_names[i];
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun 	return devm_regulator_bulk_get(dev, rad->num_supplies, rad->supplies);
535*4882a593Smuzhiyun };
536*4882a593Smuzhiyun 
rad_panel_probe(struct mipi_dsi_device * dsi)537*4882a593Smuzhiyun static int rad_panel_probe(struct mipi_dsi_device *dsi)
538*4882a593Smuzhiyun {
539*4882a593Smuzhiyun 	struct device *dev = &dsi->dev;
540*4882a593Smuzhiyun 	struct device_node *np = dev->of_node;
541*4882a593Smuzhiyun 	struct rad_panel *panel;
542*4882a593Smuzhiyun 	struct backlight_properties bl_props;
543*4882a593Smuzhiyun 	int ret;
544*4882a593Smuzhiyun 	u32 video_mode;
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	panel = devm_kzalloc(&dsi->dev, sizeof(*panel), GFP_KERNEL);
547*4882a593Smuzhiyun 	if (!panel)
548*4882a593Smuzhiyun 		return -ENOMEM;
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	mipi_dsi_set_drvdata(dsi, panel);
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun 	panel->dsi = dsi;
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun 	dsi->format = MIPI_DSI_FMT_RGB888;
555*4882a593Smuzhiyun 	dsi->mode_flags =  MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO;
556*4882a593Smuzhiyun 
557*4882a593Smuzhiyun 	ret = of_property_read_u32(np, "video-mode", &video_mode);
558*4882a593Smuzhiyun 	if (!ret) {
559*4882a593Smuzhiyun 		switch (video_mode) {
560*4882a593Smuzhiyun 		case 0:
561*4882a593Smuzhiyun 			/* burst mode */
562*4882a593Smuzhiyun 			dsi->mode_flags |= MIPI_DSI_MODE_VIDEO_BURST;
563*4882a593Smuzhiyun 			break;
564*4882a593Smuzhiyun 		case 1:
565*4882a593Smuzhiyun 			/* non-burst mode with sync event */
566*4882a593Smuzhiyun 			break;
567*4882a593Smuzhiyun 		case 2:
568*4882a593Smuzhiyun 			/* non-burst mode with sync pulse */
569*4882a593Smuzhiyun 			dsi->mode_flags |= MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
570*4882a593Smuzhiyun 			break;
571*4882a593Smuzhiyun 		default:
572*4882a593Smuzhiyun 			dev_warn(dev, "invalid video mode %d\n", video_mode);
573*4882a593Smuzhiyun 			break;
574*4882a593Smuzhiyun 		}
575*4882a593Smuzhiyun 	}
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 	ret = of_property_read_u32(np, "dsi-lanes", &dsi->lanes);
578*4882a593Smuzhiyun 	if (ret) {
579*4882a593Smuzhiyun 		dev_err(dev, "Failed to get dsi-lanes property (%d)\n", ret);
580*4882a593Smuzhiyun 		return ret;
581*4882a593Smuzhiyun 	}
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 	panel->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
584*4882a593Smuzhiyun 	if (IS_ERR(panel->reset))
585*4882a593Smuzhiyun 		return PTR_ERR(panel->reset);
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 	memset(&bl_props, 0, sizeof(bl_props));
588*4882a593Smuzhiyun 	bl_props.type = BACKLIGHT_RAW;
589*4882a593Smuzhiyun 	bl_props.brightness = 255;
590*4882a593Smuzhiyun 	bl_props.max_brightness = 255;
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun 	panel->backlight = devm_backlight_device_register(dev, dev_name(dev),
593*4882a593Smuzhiyun 							  dev, dsi, &rad_bl_ops,
594*4882a593Smuzhiyun 							  &bl_props);
595*4882a593Smuzhiyun 	if (IS_ERR(panel->backlight)) {
596*4882a593Smuzhiyun 		ret = PTR_ERR(panel->backlight);
597*4882a593Smuzhiyun 		dev_err(dev, "Failed to register backlight (%d)\n", ret);
598*4882a593Smuzhiyun 		return ret;
599*4882a593Smuzhiyun 	}
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun 	ret = rad_init_regulators(panel);
602*4882a593Smuzhiyun 	if (ret)
603*4882a593Smuzhiyun 		return ret;
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun 	drm_panel_init(&panel->panel, dev, &rad_panel_funcs,
606*4882a593Smuzhiyun 		       DRM_MODE_CONNECTOR_DSI);
607*4882a593Smuzhiyun 	dev_set_drvdata(dev, panel);
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun 	drm_panel_add(&panel->panel);
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	ret = mipi_dsi_attach(dsi);
612*4882a593Smuzhiyun 	if (ret)
613*4882a593Smuzhiyun 		drm_panel_remove(&panel->panel);
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun 	return ret;
616*4882a593Smuzhiyun }
617*4882a593Smuzhiyun 
rad_panel_remove(struct mipi_dsi_device * dsi)618*4882a593Smuzhiyun static int rad_panel_remove(struct mipi_dsi_device *dsi)
619*4882a593Smuzhiyun {
620*4882a593Smuzhiyun 	struct rad_panel *rad = mipi_dsi_get_drvdata(dsi);
621*4882a593Smuzhiyun 	struct device *dev = &dsi->dev;
622*4882a593Smuzhiyun 	int ret;
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun 	ret = mipi_dsi_detach(dsi);
625*4882a593Smuzhiyun 	if (ret)
626*4882a593Smuzhiyun 		dev_err(dev, "Failed to detach from host (%d)\n", ret);
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun 	drm_panel_remove(&rad->panel);
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	return 0;
631*4882a593Smuzhiyun }
632*4882a593Smuzhiyun 
rad_panel_shutdown(struct mipi_dsi_device * dsi)633*4882a593Smuzhiyun static void rad_panel_shutdown(struct mipi_dsi_device *dsi)
634*4882a593Smuzhiyun {
635*4882a593Smuzhiyun 	struct rad_panel *rad = mipi_dsi_get_drvdata(dsi);
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 	rad_panel_disable(&rad->panel);
638*4882a593Smuzhiyun 	rad_panel_unprepare(&rad->panel);
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun static const struct of_device_id rad_of_match[] = {
642*4882a593Smuzhiyun 	{ .compatible = "raydium,rm67191", },
643*4882a593Smuzhiyun 	{ /* sentinel */ }
644*4882a593Smuzhiyun };
645*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, rad_of_match);
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun static struct mipi_dsi_driver rad_panel_driver = {
648*4882a593Smuzhiyun 	.driver = {
649*4882a593Smuzhiyun 		.name = "panel-raydium-rm67191",
650*4882a593Smuzhiyun 		.of_match_table = rad_of_match,
651*4882a593Smuzhiyun 	},
652*4882a593Smuzhiyun 	.probe = rad_panel_probe,
653*4882a593Smuzhiyun 	.remove = rad_panel_remove,
654*4882a593Smuzhiyun 	.shutdown = rad_panel_shutdown,
655*4882a593Smuzhiyun };
656*4882a593Smuzhiyun module_mipi_dsi_driver(rad_panel_driver);
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun MODULE_AUTHOR("Robert Chiras <robert.chiras@nxp.com>");
659*4882a593Smuzhiyun MODULE_DESCRIPTION("DRM Driver for Raydium RM67191 MIPI DSI panel");
660*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
661