1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Maxim MAX96752F GMSL2 Deserializer
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2022 Rockchip Electronics Co. Ltd.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/backlight.h>
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
11*4882a593Smuzhiyun #include <linux/of_platform.h>
12*4882a593Smuzhiyun #include <linux/pinctrl/consumer.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/regmap.h>
16*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
17*4882a593Smuzhiyun #include <linux/of.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <video/videomode.h>
20*4882a593Smuzhiyun #include <video/of_display_timing.h>
21*4882a593Smuzhiyun #include <video/display_timing.h>
22*4882a593Smuzhiyun #include <uapi/linux/media-bus-format.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include <drm/drm_device.h>
25*4882a593Smuzhiyun #include <drm/drm_modes.h>
26*4882a593Smuzhiyun #include <drm/drm_panel.h>
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun struct max96752f;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun struct panel_desc {
31*4882a593Smuzhiyun const char *name;
32*4882a593Smuzhiyun u32 width_mm;
33*4882a593Smuzhiyun u32 height_mm;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun int (*prepare)(struct max96752f *max96752f);
36*4882a593Smuzhiyun int (*unprepare)(struct max96752f *max96752f);
37*4882a593Smuzhiyun int (*enable)(struct max96752f *max96752f);
38*4882a593Smuzhiyun int (*disable)(struct max96752f *max96752f);
39*4882a593Smuzhiyun int (*backlight_enable)(struct max96752f *max96752f);
40*4882a593Smuzhiyun int (*backlight_disable)(struct max96752f *max96752f);
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun struct max96752f {
44*4882a593Smuzhiyun struct drm_panel panel;
45*4882a593Smuzhiyun struct device *dev;
46*4882a593Smuzhiyun struct {
47*4882a593Smuzhiyun struct regmap *serializer;
48*4882a593Smuzhiyun struct regmap *deserializer;
49*4882a593Smuzhiyun } regmap;
50*4882a593Smuzhiyun struct regulator *supply;
51*4882a593Smuzhiyun struct backlight_device *backlight;
52*4882a593Smuzhiyun struct drm_display_mode mode;
53*4882a593Smuzhiyun const struct panel_desc *desc;
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
to_max96752f(struct drm_panel * panel)56*4882a593Smuzhiyun static inline struct max96752f *to_max96752f(struct drm_panel *panel)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun return container_of(panel, struct max96752f, panel);
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
max96752f_panel_disable(struct drm_panel * panel)61*4882a593Smuzhiyun static int max96752f_panel_disable(struct drm_panel *panel)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun struct max96752f *max96752f = to_max96752f(panel);
64*4882a593Smuzhiyun const struct panel_desc *desc = max96752f->desc;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun if (desc->backlight_disable)
67*4882a593Smuzhiyun desc->backlight_disable(max96752f);
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun backlight_disable(max96752f->backlight);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun if (desc->disable)
72*4882a593Smuzhiyun desc->disable(max96752f);
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun return 0;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
max96752f_panel_enable(struct drm_panel * panel)77*4882a593Smuzhiyun static int max96752f_panel_enable(struct drm_panel *panel)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun struct max96752f *max96752f = to_max96752f(panel);
80*4882a593Smuzhiyun const struct panel_desc *desc = max96752f->desc;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun if (desc->enable)
83*4882a593Smuzhiyun desc->enable(max96752f);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun backlight_enable(max96752f->backlight);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun if (desc->backlight_enable)
88*4882a593Smuzhiyun desc->backlight_enable(max96752f);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun return 0;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
max96752f_panel_unprepare(struct drm_panel * panel)93*4882a593Smuzhiyun static int max96752f_panel_unprepare(struct drm_panel *panel)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun struct max96752f *max96752f = to_max96752f(panel);
96*4882a593Smuzhiyun const struct panel_desc *desc = max96752f->desc;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun if (desc->unprepare)
99*4882a593Smuzhiyun desc->unprepare(max96752f);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun pinctrl_pm_select_sleep_state(max96752f->dev);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun return 0;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
max96752f_panel_prepare(struct drm_panel * panel)106*4882a593Smuzhiyun static int max96752f_panel_prepare(struct drm_panel *panel)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun struct max96752f *max96752f = to_max96752f(panel);
109*4882a593Smuzhiyun const struct panel_desc *desc = max96752f->desc;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun pinctrl_pm_select_default_state(max96752f->dev);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun if (desc->prepare)
114*4882a593Smuzhiyun desc->prepare(max96752f);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun return 0;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
max96752f_panel_get_modes(struct drm_panel * panel,struct drm_connector * connector)119*4882a593Smuzhiyun static int max96752f_panel_get_modes(struct drm_panel *panel,
120*4882a593Smuzhiyun struct drm_connector *connector)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun struct max96752f *max96752f = to_max96752f(panel);
123*4882a593Smuzhiyun const struct panel_desc *desc = max96752f->desc;
124*4882a593Smuzhiyun struct drm_display_mode *mode;
125*4882a593Smuzhiyun u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun connector->display_info.width_mm = desc->width_mm;
128*4882a593Smuzhiyun connector->display_info.height_mm = desc->height_mm;
129*4882a593Smuzhiyun drm_display_info_set_bus_formats(&connector->display_info, &bus_format, 1);
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun mode = drm_mode_duplicate(connector->dev, &max96752f->mode);
132*4882a593Smuzhiyun mode->width_mm = desc->width_mm;
133*4882a593Smuzhiyun mode->height_mm = desc->height_mm;
134*4882a593Smuzhiyun mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun drm_mode_set_name(mode);
137*4882a593Smuzhiyun drm_mode_probed_add(connector, mode);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return 1;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun static const struct drm_panel_funcs max96752f_panel_funcs = {
143*4882a593Smuzhiyun .disable = max96752f_panel_disable,
144*4882a593Smuzhiyun .unprepare = max96752f_panel_unprepare,
145*4882a593Smuzhiyun .prepare = max96752f_panel_prepare,
146*4882a593Smuzhiyun .enable = max96752f_panel_enable,
147*4882a593Smuzhiyun .get_modes = max96752f_panel_get_modes,
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun
max96752f_parse_dt(struct max96752f * max96752f)150*4882a593Smuzhiyun static int max96752f_parse_dt(struct max96752f *max96752f)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun struct device *dev = max96752f->dev;
153*4882a593Smuzhiyun struct display_timing dt;
154*4882a593Smuzhiyun struct videomode vm;
155*4882a593Smuzhiyun int ret;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun ret = of_get_display_timing(dev->of_node, "panel-timing", &dt);
158*4882a593Smuzhiyun if (ret < 0) {
159*4882a593Smuzhiyun dev_err(dev, "%pOF: no panel-timing node found\n", dev->of_node);
160*4882a593Smuzhiyun return ret;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun videomode_from_timing(&dt, &vm);
164*4882a593Smuzhiyun drm_display_mode_from_videomode(&vm, &max96752f->mode);
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun return 0;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun static const struct regmap_range max96752f_readable_ranges[] = {
170*4882a593Smuzhiyun regmap_reg_range(0x0000, 0x0600),
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun static const struct regmap_access_table max96752f_readable_table = {
174*4882a593Smuzhiyun .yes_ranges = max96752f_readable_ranges,
175*4882a593Smuzhiyun .n_yes_ranges = ARRAY_SIZE(max96752f_readable_ranges),
176*4882a593Smuzhiyun };
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun static const struct regmap_config max96752f_regmap_config = {
179*4882a593Smuzhiyun .name = "max96752f",
180*4882a593Smuzhiyun .reg_bits = 16,
181*4882a593Smuzhiyun .val_bits = 8,
182*4882a593Smuzhiyun .max_register = 0xffff,
183*4882a593Smuzhiyun .rd_table = &max96752f_readable_table,
184*4882a593Smuzhiyun };
185*4882a593Smuzhiyun
max96752f_power_off(void * data)186*4882a593Smuzhiyun static void max96752f_power_off(void *data)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun struct max96752f *max96752f = data;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun if (max96752f->supply)
191*4882a593Smuzhiyun regulator_disable(max96752f->supply);
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
max96752f_power_on(struct max96752f * max96752f)194*4882a593Smuzhiyun static void max96752f_power_on(struct max96752f *max96752f)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun int ret;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun if (max96752f->supply) {
199*4882a593Smuzhiyun ret = regulator_enable(max96752f->supply);
200*4882a593Smuzhiyun if (ret)
201*4882a593Smuzhiyun dev_err(max96752f->dev,
202*4882a593Smuzhiyun "failed to enable power supply: %d\n", ret);
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
max96752f_probe(struct i2c_client * client)206*4882a593Smuzhiyun static int max96752f_probe(struct i2c_client *client)
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun struct device *dev = &client->dev;
209*4882a593Smuzhiyun struct max96752f *max96752f;
210*4882a593Smuzhiyun struct i2c_client *parent;
211*4882a593Smuzhiyun int ret;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun max96752f = devm_kzalloc(dev, sizeof(*max96752f), GFP_KERNEL);
214*4882a593Smuzhiyun if (!max96752f)
215*4882a593Smuzhiyun return -ENOMEM;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun max96752f->dev = dev;
218*4882a593Smuzhiyun max96752f->desc = of_device_get_match_data(dev);
219*4882a593Smuzhiyun i2c_set_clientdata(client, max96752f);
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun max96752f->supply = devm_regulator_get_optional(dev, "power");
222*4882a593Smuzhiyun if (IS_ERR(max96752f->supply)) {
223*4882a593Smuzhiyun if (PTR_ERR(max96752f->supply) != -ENODEV)
224*4882a593Smuzhiyun return dev_err_probe(dev, PTR_ERR(max96752f->supply),
225*4882a593Smuzhiyun "failed to get regulator\n");
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun max96752f->supply = NULL;
228*4882a593Smuzhiyun } else {
229*4882a593Smuzhiyun ret = regulator_enable(max96752f->supply);
230*4882a593Smuzhiyun if (ret) {
231*4882a593Smuzhiyun dev_err(dev, "failed to enable power supply: %d\n", ret);
232*4882a593Smuzhiyun return ret;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun ret = devm_add_action_or_reset(dev, max96752f_power_off, max96752f);
236*4882a593Smuzhiyun if (ret) {
237*4882a593Smuzhiyun regulator_disable(max96752f->supply);
238*4882a593Smuzhiyun return ret;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun max96752f->regmap.deserializer =
243*4882a593Smuzhiyun devm_regmap_init_i2c(client, &max96752f_regmap_config);
244*4882a593Smuzhiyun if (IS_ERR(max96752f->regmap.deserializer))
245*4882a593Smuzhiyun return dev_err_probe(dev, PTR_ERR(max96752f->regmap.deserializer),
246*4882a593Smuzhiyun "failed to initialize deserializer regmap\n");
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun parent = of_find_i2c_device_by_node(dev->of_node->parent->parent);
249*4882a593Smuzhiyun if (!parent)
250*4882a593Smuzhiyun return dev_err_probe(dev, -ENODEV, "failed to find parent\n");
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun max96752f->regmap.serializer = dev_get_regmap(&parent->dev, NULL);
253*4882a593Smuzhiyun if (!max96752f->regmap.serializer)
254*4882a593Smuzhiyun return dev_err_probe(dev, -ENODEV,
255*4882a593Smuzhiyun "failed to initialize serializer regmap\n");
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun ret = max96752f_parse_dt(max96752f);
258*4882a593Smuzhiyun if (ret)
259*4882a593Smuzhiyun return dev_err_probe(dev, ret, "failed to parse DT\n");
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun max96752f->backlight = devm_of_find_backlight(dev);
262*4882a593Smuzhiyun if (IS_ERR(max96752f->backlight))
263*4882a593Smuzhiyun return dev_err_probe(dev, PTR_ERR(max96752f->backlight),
264*4882a593Smuzhiyun "failed to get backlight\n");
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun drm_panel_init(&max96752f->panel, dev, &max96752f_panel_funcs,
267*4882a593Smuzhiyun DRM_MODE_CONNECTOR_LVDS);
268*4882a593Smuzhiyun drm_panel_add(&max96752f->panel);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun return 0;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
max96752f_remove(struct i2c_client * client)273*4882a593Smuzhiyun static int max96752f_remove(struct i2c_client *client)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun struct max96752f *max96752f = i2c_get_clientdata(client);
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun drm_panel_remove(&max96752f->panel);
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun return 0;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
max96752f_suspend(struct device * dev)282*4882a593Smuzhiyun static int __maybe_unused max96752f_suspend(struct device *dev)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun struct max96752f *max96752f = dev_get_drvdata(dev);
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun max96752f_power_off(max96752f);
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun return 0;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun
max96752f_resume(struct device * dev)291*4882a593Smuzhiyun static int __maybe_unused max96752f_resume(struct device *dev)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun struct max96752f *max96752f = dev_get_drvdata(dev);
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun max96752f_power_on(max96752f);
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun return 0;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(max96752f_pm_ops, max96752f_suspend, max96752f_resume);
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun #define maxim_serializer_write(max96752f, reg, val) do { \
303*4882a593Smuzhiyun int ret; \
304*4882a593Smuzhiyun ret = regmap_write(max96752f->regmap.serializer, \
305*4882a593Smuzhiyun reg, val); \
306*4882a593Smuzhiyun if (ret) \
307*4882a593Smuzhiyun return ret; \
308*4882a593Smuzhiyun } while (0)
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun #define maxim_serializer_read(max96752f, reg, val) do { \
311*4882a593Smuzhiyun int ret; \
312*4882a593Smuzhiyun ret = regmap_read(max96752f->regmap.serializer, \
313*4882a593Smuzhiyun reg, val); \
314*4882a593Smuzhiyun if (ret) \
315*4882a593Smuzhiyun return ret; \
316*4882a593Smuzhiyun } while (0)
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun #define maxim_deserializer_write(max96752f, reg, val) do { \
319*4882a593Smuzhiyun int ret; \
320*4882a593Smuzhiyun ret = regmap_write(max96752f->regmap.deserializer, \
321*4882a593Smuzhiyun reg, val); \
322*4882a593Smuzhiyun if (ret) \
323*4882a593Smuzhiyun return ret; \
324*4882a593Smuzhiyun } while (0)
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun #define maxim_deserializer_read(max96752f, reg, val) do { \
327*4882a593Smuzhiyun int ret; \
328*4882a593Smuzhiyun ret = regmap_read(max96752f->regmap.deserializer, \
329*4882a593Smuzhiyun reg, val); \
330*4882a593Smuzhiyun if (ret) \
331*4882a593Smuzhiyun return ret; \
332*4882a593Smuzhiyun } while (0)
333*4882a593Smuzhiyun
boe_av156fht_l83_prepare(struct max96752f * max96752f)334*4882a593Smuzhiyun static int boe_av156fht_l83_prepare(struct max96752f *max96752f)
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0002, 0x43);
337*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0140, 0x20);
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x01ce, 0x5e); /* oldi */
340*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x020e, 0x40); /* bl_pwm */
341*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x020c, 0x84);
342*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0207, 0xa1); /* tp_int */
343*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0206, 0x83);
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0215, 0x90); /* lcd_en */
346*4882a593Smuzhiyun msleep(20);
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun return 0;
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun
boe_av156fht_l83_unprepare(struct max96752f * max96752f)351*4882a593Smuzhiyun static int boe_av156fht_l83_unprepare(struct max96752f *max96752f)
352*4882a593Smuzhiyun {
353*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0215, 0x80); /* lcd_en */
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun return 0;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
boe_av156fht_l83_enable(struct max96752f * max96752f)358*4882a593Smuzhiyun static int boe_av156fht_l83_enable(struct max96752f *max96752f)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0227, 0x90); /* lcd_rst */
361*4882a593Smuzhiyun msleep(20);
362*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x020f, 0x90); /* tp_rst */
363*4882a593Smuzhiyun msleep(100);
364*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0221, 0x90); /* lcd_stb */
365*4882a593Smuzhiyun msleep(60);
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun return 0;
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun
boe_av156fht_l83_disable(struct max96752f * max96752f)370*4882a593Smuzhiyun static int boe_av156fht_l83_disable(struct max96752f *max96752f)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0221, 0x80); /* lcd_stb */
373*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x020f, 0x80); /* tp_rst */
374*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0227, 0x80); /* lcd_rst */
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun return 0;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
boe_av156fht_l83_backlight_enable(struct max96752f * max96752f)379*4882a593Smuzhiyun static int boe_av156fht_l83_backlight_enable(struct max96752f *max96752f)
380*4882a593Smuzhiyun {
381*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0212, 0x90); /* bl_current_ctl */
382*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0209, 0x90); /* bl_en */
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun return 0;
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
boe_av156fht_l83_backlight_disable(struct max96752f * max96752f)387*4882a593Smuzhiyun static int boe_av156fht_l83_backlight_disable(struct max96752f *max96752f)
388*4882a593Smuzhiyun {
389*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0209, 0x80); /* bl_en */
390*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0212, 0x80); /* bl_current_ctl */
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun return 0;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun static const struct panel_desc boe_av156fht_l83 = {
396*4882a593Smuzhiyun .name = "boe-av156fht-l83",
397*4882a593Smuzhiyun .width_mm = 346,
398*4882a593Smuzhiyun .height_mm = 194,
399*4882a593Smuzhiyun .prepare = boe_av156fht_l83_prepare,
400*4882a593Smuzhiyun .unprepare = boe_av156fht_l83_unprepare,
401*4882a593Smuzhiyun .enable = boe_av156fht_l83_enable,
402*4882a593Smuzhiyun .disable = boe_av156fht_l83_disable,
403*4882a593Smuzhiyun .backlight_enable = boe_av156fht_l83_backlight_enable,
404*4882a593Smuzhiyun .backlight_disable = boe_av156fht_l83_backlight_disable,
405*4882a593Smuzhiyun };
406*4882a593Smuzhiyun
hannstar_hsd123jpw3_a15_prepare(struct max96752f * max96752f)407*4882a593Smuzhiyun static int hannstar_hsd123jpw3_a15_prepare(struct max96752f *max96752f)
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0002, 0x43);
410*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0140, 0x20);
411*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x01ce, 0x5e);
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0203, 0x83); /* GPIO1 <- TP_INT */
414*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0206, 0x84); /* GPIO2 -> TP_RST */
415*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0224, 0x84); /* GPIO12 -> LCD_BL_PWM */
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun return 0;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun
hannstar_hsd123jpw3_a15_unprepare(struct max96752f * max96752f)420*4882a593Smuzhiyun static int hannstar_hsd123jpw3_a15_unprepare(struct max96752f *max96752f)
421*4882a593Smuzhiyun {
422*4882a593Smuzhiyun return 0;
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun
hannstar_hsd123jpw3_a15_enable(struct max96752f * max96752f)425*4882a593Smuzhiyun static int hannstar_hsd123jpw3_a15_enable(struct max96752f *max96752f)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0221, 0x90); /* GPIO11 -> LCD_RESET */
428*4882a593Smuzhiyun msleep(20);
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun return 0;
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun
hannstar_hsd123jpw3_a15_disable(struct max96752f * max96752f)433*4882a593Smuzhiyun static int hannstar_hsd123jpw3_a15_disable(struct max96752f *max96752f)
434*4882a593Smuzhiyun {
435*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0221, 0x80); /* GPIO11 -> LCD_RESET */
436*4882a593Smuzhiyun msleep(20);
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun return 0;
439*4882a593Smuzhiyun }
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun static const struct panel_desc hannstar_hsd123jpw3_a15 = {
442*4882a593Smuzhiyun .name = "hannstar,hsd123jpw3-a15",
443*4882a593Smuzhiyun .width_mm = 292,
444*4882a593Smuzhiyun .height_mm = 110,
445*4882a593Smuzhiyun .prepare = hannstar_hsd123jpw3_a15_prepare,
446*4882a593Smuzhiyun .unprepare = hannstar_hsd123jpw3_a15_unprepare,
447*4882a593Smuzhiyun .enable = hannstar_hsd123jpw3_a15_enable,
448*4882a593Smuzhiyun .disable = hannstar_hsd123jpw3_a15_disable,
449*4882a593Smuzhiyun };
450*4882a593Smuzhiyun
ogm_101fhbllm01_prepare(struct max96752f * max96752f)451*4882a593Smuzhiyun static int ogm_101fhbllm01_prepare(struct max96752f *max96752f)
452*4882a593Smuzhiyun {
453*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x01ce, 0x5e);
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0203, 0x84); /* GPIO1 -> BL_PWM */
456*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0206, 0x84); /* GPIO2 -> TP_RST */
457*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0209, 0x83); /* GPIO3 <- TP_INT */
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0001, 0x02);
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun return 0;
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun
ogm_101fhbllm01_unprepare(struct max96752f * max96752f)464*4882a593Smuzhiyun static int ogm_101fhbllm01_unprepare(struct max96752f *max96752f)
465*4882a593Smuzhiyun {
466*4882a593Smuzhiyun maxim_deserializer_write(max96752f, 0x0001, 0x01);
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun return 0;
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun static const struct panel_desc ogm_101fhbllm01 = {
472*4882a593Smuzhiyun .name = "ogm,101fhbllm01",
473*4882a593Smuzhiyun .width_mm = 126,
474*4882a593Smuzhiyun .height_mm = 223,
475*4882a593Smuzhiyun .prepare = ogm_101fhbllm01_prepare,
476*4882a593Smuzhiyun .unprepare = ogm_101fhbllm01_unprepare,
477*4882a593Smuzhiyun };
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun static const struct of_device_id max96752f_of_match[] = {
480*4882a593Smuzhiyun { .compatible = "boe,av156fht-l83", &boe_av156fht_l83 },
481*4882a593Smuzhiyun { .compatible = "hannstar,hsd123jpw3-a15", &hannstar_hsd123jpw3_a15 },
482*4882a593Smuzhiyun { .compatible = "ogm,101fhbllm01", &ogm_101fhbllm01 },
483*4882a593Smuzhiyun { }
484*4882a593Smuzhiyun };
485*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, max96752f_of_match);
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun static struct i2c_driver max96752f_driver = {
488*4882a593Smuzhiyun .driver = {
489*4882a593Smuzhiyun .name = "panel-maxim-max96752f",
490*4882a593Smuzhiyun .of_match_table = max96752f_of_match,
491*4882a593Smuzhiyun .pm = &max96752f_pm_ops,
492*4882a593Smuzhiyun },
493*4882a593Smuzhiyun .probe_new = max96752f_probe,
494*4882a593Smuzhiyun .remove = max96752f_remove,
495*4882a593Smuzhiyun };
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun module_i2c_driver(max96752f_driver);
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun MODULE_AUTHOR("Wyon Bi <bivvy.bi@rock-chips.com>");
500*4882a593Smuzhiyun MODULE_DESCRIPTION("Maxim MAX96752F based panel driver");
501*4882a593Smuzhiyun MODULE_LICENSE("GPL");
502