xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/panel/panel-lg-lg4573.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * from:
6*4882a593Smuzhiyun  * drivers/gpu/drm/panel/panel-ld9040.c
7*4882a593Smuzhiyun  * ld9040 AMOLED LCD drm_panel driver.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Copyright (c) 2014 Samsung Electronics Co., Ltd
10*4882a593Smuzhiyun  * Derived from drivers/video/backlight/ld9040.c
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * Andrzej Hajda <a.hajda@samsung.com>
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
19*4882a593Smuzhiyun #include <linux/spi/spi.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <video/mipi_display.h>
22*4882a593Smuzhiyun #include <video/of_videomode.h>
23*4882a593Smuzhiyun #include <video/videomode.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include <drm/drm_device.h>
26*4882a593Smuzhiyun #include <drm/drm_modes.h>
27*4882a593Smuzhiyun #include <drm/drm_panel.h>
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun struct lg4573 {
30*4882a593Smuzhiyun 	struct drm_panel panel;
31*4882a593Smuzhiyun 	struct spi_device *spi;
32*4882a593Smuzhiyun 	struct videomode vm;
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun 
panel_to_lg4573(struct drm_panel * panel)35*4882a593Smuzhiyun static inline struct lg4573 *panel_to_lg4573(struct drm_panel *panel)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	return container_of(panel, struct lg4573, panel);
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun 
lg4573_spi_write_u16(struct lg4573 * ctx,u16 data)40*4882a593Smuzhiyun static int lg4573_spi_write_u16(struct lg4573 *ctx, u16 data)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun 	struct spi_transfer xfer = {
43*4882a593Smuzhiyun 		.len = 2,
44*4882a593Smuzhiyun 	};
45*4882a593Smuzhiyun 	__be16 temp = cpu_to_be16(data);
46*4882a593Smuzhiyun 	struct spi_message msg;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	dev_dbg(ctx->panel.dev, "writing data: %x\n", data);
49*4882a593Smuzhiyun 	xfer.tx_buf = &temp;
50*4882a593Smuzhiyun 	spi_message_init(&msg);
51*4882a593Smuzhiyun 	spi_message_add_tail(&xfer, &msg);
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	return spi_sync(ctx->spi, &msg);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun 
lg4573_spi_write_u16_array(struct lg4573 * ctx,const u16 * buffer,unsigned int count)56*4882a593Smuzhiyun static int lg4573_spi_write_u16_array(struct lg4573 *ctx, const u16 *buffer,
57*4882a593Smuzhiyun 				      unsigned int count)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	unsigned int i;
60*4882a593Smuzhiyun 	int ret;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	for (i = 0; i < count; i++) {
63*4882a593Smuzhiyun 		ret = lg4573_spi_write_u16(ctx, buffer[i]);
64*4882a593Smuzhiyun 		if (ret)
65*4882a593Smuzhiyun 			return ret;
66*4882a593Smuzhiyun 	}
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	return 0;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun 
lg4573_spi_write_dcs(struct lg4573 * ctx,u8 dcs)71*4882a593Smuzhiyun static int lg4573_spi_write_dcs(struct lg4573 *ctx, u8 dcs)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun 	return lg4573_spi_write_u16(ctx, (0x70 << 8 | dcs));
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun 
lg4573_display_on(struct lg4573 * ctx)76*4882a593Smuzhiyun static int lg4573_display_on(struct lg4573 *ctx)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun 	int ret;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	ret = lg4573_spi_write_dcs(ctx, MIPI_DCS_EXIT_SLEEP_MODE);
81*4882a593Smuzhiyun 	if (ret)
82*4882a593Smuzhiyun 		return ret;
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	msleep(5);
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	return lg4573_spi_write_dcs(ctx, MIPI_DCS_SET_DISPLAY_ON);
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
lg4573_display_off(struct lg4573 * ctx)89*4882a593Smuzhiyun static int lg4573_display_off(struct lg4573 *ctx)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	int ret;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	ret = lg4573_spi_write_dcs(ctx, MIPI_DCS_SET_DISPLAY_OFF);
94*4882a593Smuzhiyun 	if (ret)
95*4882a593Smuzhiyun 		return ret;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	msleep(120);
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	return lg4573_spi_write_dcs(ctx, MIPI_DCS_ENTER_SLEEP_MODE);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun 
lg4573_display_mode_settings(struct lg4573 * ctx)102*4882a593Smuzhiyun static int lg4573_display_mode_settings(struct lg4573 *ctx)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun 	static const u16 display_mode_settings[] = {
105*4882a593Smuzhiyun 		0x703A, 0x7270, 0x70B1, 0x7208,
106*4882a593Smuzhiyun 		0x723B, 0x720F, 0x70B2, 0x7200,
107*4882a593Smuzhiyun 		0x72C8, 0x70B3, 0x7200, 0x70B4,
108*4882a593Smuzhiyun 		0x7200, 0x70B5, 0x7242, 0x7210,
109*4882a593Smuzhiyun 		0x7210, 0x7200, 0x7220, 0x70B6,
110*4882a593Smuzhiyun 		0x720B, 0x720F, 0x723C, 0x7213,
111*4882a593Smuzhiyun 		0x7213, 0x72E8, 0x70B7, 0x7246,
112*4882a593Smuzhiyun 		0x7206, 0x720C, 0x7200, 0x7200,
113*4882a593Smuzhiyun 	};
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	dev_dbg(ctx->panel.dev, "transfer display mode settings\n");
116*4882a593Smuzhiyun 	return lg4573_spi_write_u16_array(ctx, display_mode_settings,
117*4882a593Smuzhiyun 					  ARRAY_SIZE(display_mode_settings));
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun 
lg4573_power_settings(struct lg4573 * ctx)120*4882a593Smuzhiyun static int lg4573_power_settings(struct lg4573 *ctx)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	static const u16 power_settings[] = {
123*4882a593Smuzhiyun 		0x70C0, 0x7201, 0x7211, 0x70C3,
124*4882a593Smuzhiyun 		0x7207, 0x7203, 0x7204, 0x7204,
125*4882a593Smuzhiyun 		0x7204, 0x70C4, 0x7212, 0x7224,
126*4882a593Smuzhiyun 		0x7218, 0x7218, 0x7202, 0x7249,
127*4882a593Smuzhiyun 		0x70C5, 0x726F, 0x70C6, 0x7241,
128*4882a593Smuzhiyun 		0x7263,
129*4882a593Smuzhiyun 	};
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	dev_dbg(ctx->panel.dev, "transfer power settings\n");
132*4882a593Smuzhiyun 	return lg4573_spi_write_u16_array(ctx, power_settings,
133*4882a593Smuzhiyun 					  ARRAY_SIZE(power_settings));
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
lg4573_gamma_settings(struct lg4573 * ctx)136*4882a593Smuzhiyun static int lg4573_gamma_settings(struct lg4573 *ctx)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	static const u16 gamma_settings[] = {
139*4882a593Smuzhiyun 		0x70D0, 0x7203, 0x7207, 0x7273,
140*4882a593Smuzhiyun 		0x7235, 0x7200, 0x7201, 0x7220,
141*4882a593Smuzhiyun 		0x7200, 0x7203, 0x70D1, 0x7203,
142*4882a593Smuzhiyun 		0x7207, 0x7273, 0x7235, 0x7200,
143*4882a593Smuzhiyun 		0x7201, 0x7220, 0x7200, 0x7203,
144*4882a593Smuzhiyun 		0x70D2, 0x7203, 0x7207, 0x7273,
145*4882a593Smuzhiyun 		0x7235, 0x7200, 0x7201, 0x7220,
146*4882a593Smuzhiyun 		0x7200, 0x7203, 0x70D3, 0x7203,
147*4882a593Smuzhiyun 		0x7207, 0x7273, 0x7235, 0x7200,
148*4882a593Smuzhiyun 		0x7201, 0x7220, 0x7200, 0x7203,
149*4882a593Smuzhiyun 		0x70D4, 0x7203, 0x7207, 0x7273,
150*4882a593Smuzhiyun 		0x7235, 0x7200, 0x7201, 0x7220,
151*4882a593Smuzhiyun 		0x7200, 0x7203, 0x70D5, 0x7203,
152*4882a593Smuzhiyun 		0x7207, 0x7273, 0x7235, 0x7200,
153*4882a593Smuzhiyun 		0x7201, 0x7220, 0x7200, 0x7203,
154*4882a593Smuzhiyun 	};
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	dev_dbg(ctx->panel.dev, "transfer gamma settings\n");
157*4882a593Smuzhiyun 	return lg4573_spi_write_u16_array(ctx, gamma_settings,
158*4882a593Smuzhiyun 					  ARRAY_SIZE(gamma_settings));
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun 
lg4573_init(struct lg4573 * ctx)161*4882a593Smuzhiyun static int lg4573_init(struct lg4573 *ctx)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	int ret;
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	dev_dbg(ctx->panel.dev, "initializing LCD\n");
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	ret = lg4573_display_mode_settings(ctx);
168*4882a593Smuzhiyun 	if (ret)
169*4882a593Smuzhiyun 		return ret;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	ret = lg4573_power_settings(ctx);
172*4882a593Smuzhiyun 	if (ret)
173*4882a593Smuzhiyun 		return ret;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	return lg4573_gamma_settings(ctx);
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun 
lg4573_power_on(struct lg4573 * ctx)178*4882a593Smuzhiyun static int lg4573_power_on(struct lg4573 *ctx)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun 	return lg4573_display_on(ctx);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
lg4573_disable(struct drm_panel * panel)183*4882a593Smuzhiyun static int lg4573_disable(struct drm_panel *panel)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	struct lg4573 *ctx = panel_to_lg4573(panel);
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	return lg4573_display_off(ctx);
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun 
lg4573_enable(struct drm_panel * panel)190*4882a593Smuzhiyun static int lg4573_enable(struct drm_panel *panel)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	struct lg4573 *ctx = panel_to_lg4573(panel);
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	lg4573_init(ctx);
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	return lg4573_power_on(ctx);
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun static const struct drm_display_mode default_mode = {
200*4882a593Smuzhiyun 	.clock = 28341,
201*4882a593Smuzhiyun 	.hdisplay = 480,
202*4882a593Smuzhiyun 	.hsync_start = 480 + 10,
203*4882a593Smuzhiyun 	.hsync_end = 480 + 10 + 59,
204*4882a593Smuzhiyun 	.htotal = 480 + 10 + 59 + 10,
205*4882a593Smuzhiyun 	.vdisplay = 800,
206*4882a593Smuzhiyun 	.vsync_start = 800 + 15,
207*4882a593Smuzhiyun 	.vsync_end = 800 + 15 + 15,
208*4882a593Smuzhiyun 	.vtotal = 800 + 15 + 15 + 15,
209*4882a593Smuzhiyun };
210*4882a593Smuzhiyun 
lg4573_get_modes(struct drm_panel * panel,struct drm_connector * connector)211*4882a593Smuzhiyun static int lg4573_get_modes(struct drm_panel *panel,
212*4882a593Smuzhiyun 			    struct drm_connector *connector)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun 	struct drm_display_mode *mode;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	mode = drm_mode_duplicate(connector->dev, &default_mode);
217*4882a593Smuzhiyun 	if (!mode) {
218*4882a593Smuzhiyun 		dev_err(panel->dev, "failed to add mode %ux%ux@%u\n",
219*4882a593Smuzhiyun 			default_mode.hdisplay, default_mode.vdisplay,
220*4882a593Smuzhiyun 			drm_mode_vrefresh(&default_mode));
221*4882a593Smuzhiyun 		return -ENOMEM;
222*4882a593Smuzhiyun 	}
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	drm_mode_set_name(mode);
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
227*4882a593Smuzhiyun 	drm_mode_probed_add(connector, mode);
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	connector->display_info.width_mm = 61;
230*4882a593Smuzhiyun 	connector->display_info.height_mm = 103;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	return 1;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun static const struct drm_panel_funcs lg4573_drm_funcs = {
236*4882a593Smuzhiyun 	.disable = lg4573_disable,
237*4882a593Smuzhiyun 	.enable = lg4573_enable,
238*4882a593Smuzhiyun 	.get_modes = lg4573_get_modes,
239*4882a593Smuzhiyun };
240*4882a593Smuzhiyun 
lg4573_probe(struct spi_device * spi)241*4882a593Smuzhiyun static int lg4573_probe(struct spi_device *spi)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun 	struct lg4573 *ctx;
244*4882a593Smuzhiyun 	int ret;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	ctx = devm_kzalloc(&spi->dev, sizeof(*ctx), GFP_KERNEL);
247*4882a593Smuzhiyun 	if (!ctx)
248*4882a593Smuzhiyun 		return -ENOMEM;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	ctx->spi = spi;
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	spi_set_drvdata(spi, ctx);
253*4882a593Smuzhiyun 	spi->bits_per_word = 8;
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	ret = spi_setup(spi);
256*4882a593Smuzhiyun 	if (ret < 0) {
257*4882a593Smuzhiyun 		dev_err(&spi->dev, "SPI setup failed: %d\n", ret);
258*4882a593Smuzhiyun 		return ret;
259*4882a593Smuzhiyun 	}
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	drm_panel_init(&ctx->panel, &spi->dev, &lg4573_drm_funcs,
262*4882a593Smuzhiyun 		       DRM_MODE_CONNECTOR_DPI);
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	drm_panel_add(&ctx->panel);
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	return 0;
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun 
lg4573_remove(struct spi_device * spi)269*4882a593Smuzhiyun static int lg4573_remove(struct spi_device *spi)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun 	struct lg4573 *ctx = spi_get_drvdata(spi);
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	lg4573_display_off(ctx);
274*4882a593Smuzhiyun 	drm_panel_remove(&ctx->panel);
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	return 0;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun static const struct of_device_id lg4573_of_match[] = {
280*4882a593Smuzhiyun 	{ .compatible = "lg,lg4573" },
281*4882a593Smuzhiyun 	{ }
282*4882a593Smuzhiyun };
283*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, lg4573_of_match);
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun static struct spi_driver lg4573_driver = {
286*4882a593Smuzhiyun 	.probe = lg4573_probe,
287*4882a593Smuzhiyun 	.remove = lg4573_remove,
288*4882a593Smuzhiyun 	.driver = {
289*4882a593Smuzhiyun 		.name = "lg4573",
290*4882a593Smuzhiyun 		.of_match_table = lg4573_of_match,
291*4882a593Smuzhiyun 	},
292*4882a593Smuzhiyun };
293*4882a593Smuzhiyun module_spi_driver(lg4573_driver);
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun MODULE_AUTHOR("Heiko Schocher <hs@denx.de>");
296*4882a593Smuzhiyun MODULE_DESCRIPTION("lg4573 LCD Driver");
297*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
298