xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2019 Theobroma Systems Design und Consulting GmbH
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * base on panel-kingdisplay-kd097d04.c
6*4882a593Smuzhiyun  * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/backlight.h>
10*4882a593Smuzhiyun #include <linux/delay.h>
11*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/of.h>
14*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <video/mipi_display.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include <drm/drm_crtc.h>
19*4882a593Smuzhiyun #include <drm/drm_device.h>
20*4882a593Smuzhiyun #include <drm/drm_mipi_dsi.h>
21*4882a593Smuzhiyun #include <drm/drm_modes.h>
22*4882a593Smuzhiyun #include <drm/drm_panel.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun struct ltk500hd1829 {
25*4882a593Smuzhiyun 	struct device *dev;
26*4882a593Smuzhiyun 	struct drm_panel panel;
27*4882a593Smuzhiyun 	struct gpio_desc *reset_gpio;
28*4882a593Smuzhiyun 	struct regulator *vcc;
29*4882a593Smuzhiyun 	struct regulator *iovcc;
30*4882a593Smuzhiyun 	bool prepared;
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun struct ltk500hd1829_cmd {
34*4882a593Smuzhiyun 	char cmd;
35*4882a593Smuzhiyun 	char data;
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun  * There is no description in the Reference Manual about these commands.
40*4882a593Smuzhiyun  * We received them from the vendor, so just use them as is.
41*4882a593Smuzhiyun  */
42*4882a593Smuzhiyun static const struct ltk500hd1829_cmd init_code[] = {
43*4882a593Smuzhiyun 	{ 0xE0, 0x00 },
44*4882a593Smuzhiyun 	{ 0xE1, 0x93 },
45*4882a593Smuzhiyun 	{ 0xE2, 0x65 },
46*4882a593Smuzhiyun 	{ 0xE3, 0xF8 },
47*4882a593Smuzhiyun 	{ 0x80, 0x03 },
48*4882a593Smuzhiyun 	{ 0xE0, 0x04 },
49*4882a593Smuzhiyun 	{ 0x2D, 0x03 },
50*4882a593Smuzhiyun 	{ 0xE0, 0x01 },
51*4882a593Smuzhiyun 	{ 0x00, 0x00 },
52*4882a593Smuzhiyun 	{ 0x01, 0xB6 },
53*4882a593Smuzhiyun 	{ 0x03, 0x00 },
54*4882a593Smuzhiyun 	{ 0x04, 0xC5 },
55*4882a593Smuzhiyun 	{ 0x17, 0x00 },
56*4882a593Smuzhiyun 	{ 0x18, 0xBF },
57*4882a593Smuzhiyun 	{ 0x19, 0x01 },
58*4882a593Smuzhiyun 	{ 0x1A, 0x00 },
59*4882a593Smuzhiyun 	{ 0x1B, 0xBF },
60*4882a593Smuzhiyun 	{ 0x1C, 0x01 },
61*4882a593Smuzhiyun 	{ 0x1F, 0x7C },
62*4882a593Smuzhiyun 	{ 0x20, 0x26 },
63*4882a593Smuzhiyun 	{ 0x21, 0x26 },
64*4882a593Smuzhiyun 	{ 0x22, 0x4E },
65*4882a593Smuzhiyun 	{ 0x37, 0x09 },
66*4882a593Smuzhiyun 	{ 0x38, 0x04 },
67*4882a593Smuzhiyun 	{ 0x39, 0x08 },
68*4882a593Smuzhiyun 	{ 0x3A, 0x1F },
69*4882a593Smuzhiyun 	{ 0x3B, 0x1F },
70*4882a593Smuzhiyun 	{ 0x3C, 0x78 },
71*4882a593Smuzhiyun 	{ 0x3D, 0xFF },
72*4882a593Smuzhiyun 	{ 0x3E, 0xFF },
73*4882a593Smuzhiyun 	{ 0x3F, 0x00 },
74*4882a593Smuzhiyun 	{ 0x40, 0x04 },
75*4882a593Smuzhiyun 	{ 0x41, 0xA0 },
76*4882a593Smuzhiyun 	{ 0x43, 0x0F },
77*4882a593Smuzhiyun 	{ 0x44, 0x0A },
78*4882a593Smuzhiyun 	{ 0x45, 0x24 },
79*4882a593Smuzhiyun 	{ 0x55, 0x01 },
80*4882a593Smuzhiyun 	{ 0x56, 0x01 },
81*4882a593Smuzhiyun 	{ 0x57, 0xA5 },
82*4882a593Smuzhiyun 	{ 0x58, 0x0A },
83*4882a593Smuzhiyun 	{ 0x59, 0x4A },
84*4882a593Smuzhiyun 	{ 0x5A, 0x38 },
85*4882a593Smuzhiyun 	{ 0x5B, 0x10 },
86*4882a593Smuzhiyun 	{ 0x5C, 0x19 },
87*4882a593Smuzhiyun 	{ 0x5D, 0x7C },
88*4882a593Smuzhiyun 	{ 0x5E, 0x64 },
89*4882a593Smuzhiyun 	{ 0x5F, 0x54 },
90*4882a593Smuzhiyun 	{ 0x60, 0x48 },
91*4882a593Smuzhiyun 	{ 0x61, 0x44 },
92*4882a593Smuzhiyun 	{ 0x62, 0x35 },
93*4882a593Smuzhiyun 	{ 0x63, 0x3A },
94*4882a593Smuzhiyun 	{ 0x64, 0x24 },
95*4882a593Smuzhiyun 	{ 0x65, 0x3B },
96*4882a593Smuzhiyun 	{ 0x66, 0x39 },
97*4882a593Smuzhiyun 	{ 0x67, 0x37 },
98*4882a593Smuzhiyun 	{ 0x68, 0x56 },
99*4882a593Smuzhiyun 	{ 0x69, 0x41 },
100*4882a593Smuzhiyun 	{ 0x6A, 0x47 },
101*4882a593Smuzhiyun 	{ 0x6B, 0x2F },
102*4882a593Smuzhiyun 	{ 0x6C, 0x23 },
103*4882a593Smuzhiyun 	{ 0x6D, 0x13 },
104*4882a593Smuzhiyun 	{ 0x6E, 0x02 },
105*4882a593Smuzhiyun 	{ 0x6F, 0x08 },
106*4882a593Smuzhiyun 	{ 0x70, 0x7C },
107*4882a593Smuzhiyun 	{ 0x71, 0x64 },
108*4882a593Smuzhiyun 	{ 0x72, 0x54 },
109*4882a593Smuzhiyun 	{ 0x73, 0x48 },
110*4882a593Smuzhiyun 	{ 0x74, 0x44 },
111*4882a593Smuzhiyun 	{ 0x75, 0x35 },
112*4882a593Smuzhiyun 	{ 0x76, 0x3A },
113*4882a593Smuzhiyun 	{ 0x77, 0x22 },
114*4882a593Smuzhiyun 	{ 0x78, 0x3B },
115*4882a593Smuzhiyun 	{ 0x79, 0x39 },
116*4882a593Smuzhiyun 	{ 0x7A, 0x38 },
117*4882a593Smuzhiyun 	{ 0x7B, 0x52 },
118*4882a593Smuzhiyun 	{ 0x7C, 0x41 },
119*4882a593Smuzhiyun 	{ 0x7D, 0x47 },
120*4882a593Smuzhiyun 	{ 0x7E, 0x2F },
121*4882a593Smuzhiyun 	{ 0x7F, 0x23 },
122*4882a593Smuzhiyun 	{ 0x80, 0x13 },
123*4882a593Smuzhiyun 	{ 0x81, 0x02 },
124*4882a593Smuzhiyun 	{ 0x82, 0x08 },
125*4882a593Smuzhiyun 	{ 0xE0, 0x02 },
126*4882a593Smuzhiyun 	{ 0x00, 0x57 },
127*4882a593Smuzhiyun 	{ 0x01, 0x77 },
128*4882a593Smuzhiyun 	{ 0x02, 0x44 },
129*4882a593Smuzhiyun 	{ 0x03, 0x46 },
130*4882a593Smuzhiyun 	{ 0x04, 0x48 },
131*4882a593Smuzhiyun 	{ 0x05, 0x4A },
132*4882a593Smuzhiyun 	{ 0x06, 0x4C },
133*4882a593Smuzhiyun 	{ 0x07, 0x4E },
134*4882a593Smuzhiyun 	{ 0x08, 0x50 },
135*4882a593Smuzhiyun 	{ 0x09, 0x55 },
136*4882a593Smuzhiyun 	{ 0x0A, 0x52 },
137*4882a593Smuzhiyun 	{ 0x0B, 0x55 },
138*4882a593Smuzhiyun 	{ 0x0C, 0x55 },
139*4882a593Smuzhiyun 	{ 0x0D, 0x55 },
140*4882a593Smuzhiyun 	{ 0x0E, 0x55 },
141*4882a593Smuzhiyun 	{ 0x0F, 0x55 },
142*4882a593Smuzhiyun 	{ 0x10, 0x55 },
143*4882a593Smuzhiyun 	{ 0x11, 0x55 },
144*4882a593Smuzhiyun 	{ 0x12, 0x55 },
145*4882a593Smuzhiyun 	{ 0x13, 0x40 },
146*4882a593Smuzhiyun 	{ 0x14, 0x55 },
147*4882a593Smuzhiyun 	{ 0x15, 0x55 },
148*4882a593Smuzhiyun 	{ 0x16, 0x57 },
149*4882a593Smuzhiyun 	{ 0x17, 0x77 },
150*4882a593Smuzhiyun 	{ 0x18, 0x45 },
151*4882a593Smuzhiyun 	{ 0x19, 0x47 },
152*4882a593Smuzhiyun 	{ 0x1A, 0x49 },
153*4882a593Smuzhiyun 	{ 0x1B, 0x4B },
154*4882a593Smuzhiyun 	{ 0x1C, 0x4D },
155*4882a593Smuzhiyun 	{ 0x1D, 0x4F },
156*4882a593Smuzhiyun 	{ 0x1E, 0x51 },
157*4882a593Smuzhiyun 	{ 0x1F, 0x55 },
158*4882a593Smuzhiyun 	{ 0x20, 0x53 },
159*4882a593Smuzhiyun 	{ 0x21, 0x55 },
160*4882a593Smuzhiyun 	{ 0x22, 0x55 },
161*4882a593Smuzhiyun 	{ 0x23, 0x55 },
162*4882a593Smuzhiyun 	{ 0x24, 0x55 },
163*4882a593Smuzhiyun 	{ 0x25, 0x55 },
164*4882a593Smuzhiyun 	{ 0x26, 0x55 },
165*4882a593Smuzhiyun 	{ 0x27, 0x55 },
166*4882a593Smuzhiyun 	{ 0x28, 0x55 },
167*4882a593Smuzhiyun 	{ 0x29, 0x41 },
168*4882a593Smuzhiyun 	{ 0x2A, 0x55 },
169*4882a593Smuzhiyun 	{ 0x2B, 0x55 },
170*4882a593Smuzhiyun 	{ 0x2C, 0x57 },
171*4882a593Smuzhiyun 	{ 0x2D, 0x77 },
172*4882a593Smuzhiyun 	{ 0x2E, 0x4F },
173*4882a593Smuzhiyun 	{ 0x2F, 0x4D },
174*4882a593Smuzhiyun 	{ 0x30, 0x4B },
175*4882a593Smuzhiyun 	{ 0x31, 0x49 },
176*4882a593Smuzhiyun 	{ 0x32, 0x47 },
177*4882a593Smuzhiyun 	{ 0x33, 0x45 },
178*4882a593Smuzhiyun 	{ 0x34, 0x41 },
179*4882a593Smuzhiyun 	{ 0x35, 0x55 },
180*4882a593Smuzhiyun 	{ 0x36, 0x53 },
181*4882a593Smuzhiyun 	{ 0x37, 0x55 },
182*4882a593Smuzhiyun 	{ 0x38, 0x55 },
183*4882a593Smuzhiyun 	{ 0x39, 0x55 },
184*4882a593Smuzhiyun 	{ 0x3A, 0x55 },
185*4882a593Smuzhiyun 	{ 0x3B, 0x55 },
186*4882a593Smuzhiyun 	{ 0x3C, 0x55 },
187*4882a593Smuzhiyun 	{ 0x3D, 0x55 },
188*4882a593Smuzhiyun 	{ 0x3E, 0x55 },
189*4882a593Smuzhiyun 	{ 0x3F, 0x51 },
190*4882a593Smuzhiyun 	{ 0x40, 0x55 },
191*4882a593Smuzhiyun 	{ 0x41, 0x55 },
192*4882a593Smuzhiyun 	{ 0x42, 0x57 },
193*4882a593Smuzhiyun 	{ 0x43, 0x77 },
194*4882a593Smuzhiyun 	{ 0x44, 0x4E },
195*4882a593Smuzhiyun 	{ 0x45, 0x4C },
196*4882a593Smuzhiyun 	{ 0x46, 0x4A },
197*4882a593Smuzhiyun 	{ 0x47, 0x48 },
198*4882a593Smuzhiyun 	{ 0x48, 0x46 },
199*4882a593Smuzhiyun 	{ 0x49, 0x44 },
200*4882a593Smuzhiyun 	{ 0x4A, 0x40 },
201*4882a593Smuzhiyun 	{ 0x4B, 0x55 },
202*4882a593Smuzhiyun 	{ 0x4C, 0x52 },
203*4882a593Smuzhiyun 	{ 0x4D, 0x55 },
204*4882a593Smuzhiyun 	{ 0x4E, 0x55 },
205*4882a593Smuzhiyun 	{ 0x4F, 0x55 },
206*4882a593Smuzhiyun 	{ 0x50, 0x55 },
207*4882a593Smuzhiyun 	{ 0x51, 0x55 },
208*4882a593Smuzhiyun 	{ 0x52, 0x55 },
209*4882a593Smuzhiyun 	{ 0x53, 0x55 },
210*4882a593Smuzhiyun 	{ 0x54, 0x55 },
211*4882a593Smuzhiyun 	{ 0x55, 0x50 },
212*4882a593Smuzhiyun 	{ 0x56, 0x55 },
213*4882a593Smuzhiyun 	{ 0x57, 0x55 },
214*4882a593Smuzhiyun 	{ 0x58, 0x40 },
215*4882a593Smuzhiyun 	{ 0x59, 0x00 },
216*4882a593Smuzhiyun 	{ 0x5A, 0x00 },
217*4882a593Smuzhiyun 	{ 0x5B, 0x10 },
218*4882a593Smuzhiyun 	{ 0x5C, 0x09 },
219*4882a593Smuzhiyun 	{ 0x5D, 0x30 },
220*4882a593Smuzhiyun 	{ 0x5E, 0x01 },
221*4882a593Smuzhiyun 	{ 0x5F, 0x02 },
222*4882a593Smuzhiyun 	{ 0x60, 0x30 },
223*4882a593Smuzhiyun 	{ 0x61, 0x03 },
224*4882a593Smuzhiyun 	{ 0x62, 0x04 },
225*4882a593Smuzhiyun 	{ 0x63, 0x06 },
226*4882a593Smuzhiyun 	{ 0x64, 0x6A },
227*4882a593Smuzhiyun 	{ 0x65, 0x75 },
228*4882a593Smuzhiyun 	{ 0x66, 0x0F },
229*4882a593Smuzhiyun 	{ 0x67, 0xB3 },
230*4882a593Smuzhiyun 	{ 0x68, 0x0B },
231*4882a593Smuzhiyun 	{ 0x69, 0x06 },
232*4882a593Smuzhiyun 	{ 0x6A, 0x6A },
233*4882a593Smuzhiyun 	{ 0x6B, 0x10 },
234*4882a593Smuzhiyun 	{ 0x6C, 0x00 },
235*4882a593Smuzhiyun 	{ 0x6D, 0x04 },
236*4882a593Smuzhiyun 	{ 0x6E, 0x04 },
237*4882a593Smuzhiyun 	{ 0x6F, 0x88 },
238*4882a593Smuzhiyun 	{ 0x70, 0x00 },
239*4882a593Smuzhiyun 	{ 0x71, 0x00 },
240*4882a593Smuzhiyun 	{ 0x72, 0x06 },
241*4882a593Smuzhiyun 	{ 0x73, 0x7B },
242*4882a593Smuzhiyun 	{ 0x74, 0x00 },
243*4882a593Smuzhiyun 	{ 0x75, 0xBC },
244*4882a593Smuzhiyun 	{ 0x76, 0x00 },
245*4882a593Smuzhiyun 	{ 0x77, 0x05 },
246*4882a593Smuzhiyun 	{ 0x78, 0x2E },
247*4882a593Smuzhiyun 	{ 0x79, 0x00 },
248*4882a593Smuzhiyun 	{ 0x7A, 0x00 },
249*4882a593Smuzhiyun 	{ 0x7B, 0x00 },
250*4882a593Smuzhiyun 	{ 0x7C, 0x00 },
251*4882a593Smuzhiyun 	{ 0x7D, 0x03 },
252*4882a593Smuzhiyun 	{ 0x7E, 0x7B },
253*4882a593Smuzhiyun 	{ 0xE0, 0x04 },
254*4882a593Smuzhiyun 	{ 0x09, 0x10 },
255*4882a593Smuzhiyun 	{ 0x2B, 0x2B },
256*4882a593Smuzhiyun 	{ 0x2E, 0x44 },
257*4882a593Smuzhiyun 	{ 0xE0, 0x00 },
258*4882a593Smuzhiyun 	{ 0xE6, 0x02 },
259*4882a593Smuzhiyun 	{ 0xE7, 0x02 },
260*4882a593Smuzhiyun 	{ 0x35, 0x00 },
261*4882a593Smuzhiyun };
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun static inline
panel_to_ltk500hd1829(struct drm_panel * panel)264*4882a593Smuzhiyun struct ltk500hd1829 *panel_to_ltk500hd1829(struct drm_panel *panel)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun 	return container_of(panel, struct ltk500hd1829, panel);
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun 
ltk500hd1829_unprepare(struct drm_panel * panel)269*4882a593Smuzhiyun static int ltk500hd1829_unprepare(struct drm_panel *panel)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun 	struct ltk500hd1829 *ctx = panel_to_ltk500hd1829(panel);
272*4882a593Smuzhiyun 	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
273*4882a593Smuzhiyun 	int ret;
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	if (!ctx->prepared)
276*4882a593Smuzhiyun 		return 0;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_set_display_off(dsi);
279*4882a593Smuzhiyun 	if (ret < 0)
280*4882a593Smuzhiyun 		dev_err(panel->dev, "failed to set display off: %d\n", ret);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
283*4882a593Smuzhiyun 	if (ret < 0) {
284*4882a593Smuzhiyun 		dev_err(panel->dev, "failed to enter sleep mode: %d\n", ret);
285*4882a593Smuzhiyun 	}
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	/* 120ms to enter sleep mode */
288*4882a593Smuzhiyun 	msleep(120);
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	regulator_disable(ctx->iovcc);
291*4882a593Smuzhiyun 	regulator_disable(ctx->vcc);
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	ctx->prepared = false;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	return 0;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun 
ltk500hd1829_prepare(struct drm_panel * panel)298*4882a593Smuzhiyun static int ltk500hd1829_prepare(struct drm_panel *panel)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun 	struct ltk500hd1829 *ctx = panel_to_ltk500hd1829(panel);
301*4882a593Smuzhiyun 	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
302*4882a593Smuzhiyun 	unsigned int i;
303*4882a593Smuzhiyun 	int ret;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	if (ctx->prepared)
306*4882a593Smuzhiyun 		return 0;
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	ret = regulator_enable(ctx->vcc);
309*4882a593Smuzhiyun 	if (ret < 0) {
310*4882a593Smuzhiyun 		dev_err(ctx->dev, "Failed to enable vci supply: %d\n", ret);
311*4882a593Smuzhiyun 		return ret;
312*4882a593Smuzhiyun 	}
313*4882a593Smuzhiyun 	ret = regulator_enable(ctx->iovcc);
314*4882a593Smuzhiyun 	if (ret < 0) {
315*4882a593Smuzhiyun 		dev_err(ctx->dev, "Failed to enable iovcc supply: %d\n", ret);
316*4882a593Smuzhiyun 		goto disable_vcc;
317*4882a593Smuzhiyun 	}
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
320*4882a593Smuzhiyun 	/* tRW: 10us */
321*4882a593Smuzhiyun 	usleep_range(10, 20);
322*4882a593Smuzhiyun 	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	/* tRT: >= 5ms */
325*4882a593Smuzhiyun 	usleep_range(5000, 6000);
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(init_code); i++) {
328*4882a593Smuzhiyun 		ret = mipi_dsi_generic_write(dsi, &init_code[i],
329*4882a593Smuzhiyun 					     sizeof(struct ltk500hd1829_cmd));
330*4882a593Smuzhiyun 		if (ret < 0) {
331*4882a593Smuzhiyun 			dev_err(panel->dev, "failed to write init cmds: %d\n", ret);
332*4882a593Smuzhiyun 			goto disable_iovcc;
333*4882a593Smuzhiyun 		}
334*4882a593Smuzhiyun 	}
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
337*4882a593Smuzhiyun 	if (ret < 0) {
338*4882a593Smuzhiyun 		dev_err(panel->dev, "failed to exit sleep mode: %d\n", ret);
339*4882a593Smuzhiyun 		goto disable_iovcc;
340*4882a593Smuzhiyun 	}
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	/* 120ms to exit sleep mode */
343*4882a593Smuzhiyun 	msleep(120);
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	ret = mipi_dsi_dcs_set_display_on(dsi);
346*4882a593Smuzhiyun 	if (ret < 0) {
347*4882a593Smuzhiyun 		dev_err(panel->dev, "failed to set display on: %d\n", ret);
348*4882a593Smuzhiyun 		goto disable_iovcc;
349*4882a593Smuzhiyun 	}
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	ctx->prepared = true;
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	return 0;
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun disable_iovcc:
356*4882a593Smuzhiyun 	regulator_disable(ctx->iovcc);
357*4882a593Smuzhiyun disable_vcc:
358*4882a593Smuzhiyun 	regulator_disable(ctx->vcc);
359*4882a593Smuzhiyun 	return ret;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun static const struct drm_display_mode default_mode = {
363*4882a593Smuzhiyun 	.hdisplay	= 720,
364*4882a593Smuzhiyun 	.hsync_start	= 720 + 50,
365*4882a593Smuzhiyun 	.hsync_end	= 720 + 50 + 50,
366*4882a593Smuzhiyun 	.htotal		= 720 + 50 + 50 + 50,
367*4882a593Smuzhiyun 	.vdisplay	= 1280,
368*4882a593Smuzhiyun 	.vsync_start	= 1280 + 30,
369*4882a593Smuzhiyun 	.vsync_end	= 1280 + 30 + 4,
370*4882a593Smuzhiyun 	.vtotal		= 1280 + 30 + 4 + 12,
371*4882a593Smuzhiyun 	.clock		= 69217,
372*4882a593Smuzhiyun 	.width_mm	= 62,
373*4882a593Smuzhiyun 	.height_mm	= 110,
374*4882a593Smuzhiyun };
375*4882a593Smuzhiyun 
ltk500hd1829_get_modes(struct drm_panel * panel,struct drm_connector * connector)376*4882a593Smuzhiyun static int ltk500hd1829_get_modes(struct drm_panel *panel,
377*4882a593Smuzhiyun 				  struct drm_connector *connector)
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun 	struct ltk500hd1829 *ctx = panel_to_ltk500hd1829(panel);
380*4882a593Smuzhiyun 	struct drm_display_mode *mode;
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 	mode = drm_mode_duplicate(connector->dev, &default_mode);
383*4882a593Smuzhiyun 	if (!mode) {
384*4882a593Smuzhiyun 		dev_err(ctx->dev, "failed to add mode %ux%u@%u\n",
385*4882a593Smuzhiyun 			default_mode.hdisplay, default_mode.vdisplay,
386*4882a593Smuzhiyun 			drm_mode_vrefresh(&default_mode));
387*4882a593Smuzhiyun 		return -ENOMEM;
388*4882a593Smuzhiyun 	}
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	drm_mode_set_name(mode);
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
393*4882a593Smuzhiyun 	connector->display_info.width_mm = mode->width_mm;
394*4882a593Smuzhiyun 	connector->display_info.height_mm = mode->height_mm;
395*4882a593Smuzhiyun 	drm_mode_probed_add(connector, mode);
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	return 1;
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun static const struct drm_panel_funcs ltk500hd1829_funcs = {
401*4882a593Smuzhiyun 	.unprepare = ltk500hd1829_unprepare,
402*4882a593Smuzhiyun 	.prepare = ltk500hd1829_prepare,
403*4882a593Smuzhiyun 	.get_modes = ltk500hd1829_get_modes,
404*4882a593Smuzhiyun };
405*4882a593Smuzhiyun 
ltk500hd1829_probe(struct mipi_dsi_device * dsi)406*4882a593Smuzhiyun static int ltk500hd1829_probe(struct mipi_dsi_device *dsi)
407*4882a593Smuzhiyun {
408*4882a593Smuzhiyun 	struct ltk500hd1829 *ctx;
409*4882a593Smuzhiyun 	struct device *dev = &dsi->dev;
410*4882a593Smuzhiyun 	int ret;
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL);
413*4882a593Smuzhiyun 	if (!ctx)
414*4882a593Smuzhiyun 		return -ENOMEM;
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
417*4882a593Smuzhiyun 	if (IS_ERR(ctx->reset_gpio)) {
418*4882a593Smuzhiyun 		dev_err(dev, "cannot get reset gpio\n");
419*4882a593Smuzhiyun 		return PTR_ERR(ctx->reset_gpio);
420*4882a593Smuzhiyun 	}
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 	ctx->vcc = devm_regulator_get(dev, "vcc");
423*4882a593Smuzhiyun 	if (IS_ERR(ctx->vcc)) {
424*4882a593Smuzhiyun 		ret = PTR_ERR(ctx->vcc);
425*4882a593Smuzhiyun 		if (ret != -EPROBE_DEFER)
426*4882a593Smuzhiyun 			dev_err(dev, "Failed to request vcc regulator: %d\n", ret);
427*4882a593Smuzhiyun 		return ret;
428*4882a593Smuzhiyun 	}
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 	ctx->iovcc = devm_regulator_get(dev, "iovcc");
431*4882a593Smuzhiyun 	if (IS_ERR(ctx->iovcc)) {
432*4882a593Smuzhiyun 		ret = PTR_ERR(ctx->iovcc);
433*4882a593Smuzhiyun 		if (ret != -EPROBE_DEFER)
434*4882a593Smuzhiyun 			dev_err(dev, "Failed to request iovcc regulator: %d\n", ret);
435*4882a593Smuzhiyun 		return ret;
436*4882a593Smuzhiyun 	}
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	mipi_dsi_set_drvdata(dsi, ctx);
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	ctx->dev = dev;
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	dsi->lanes = 4;
443*4882a593Smuzhiyun 	dsi->format = MIPI_DSI_FMT_RGB888;
444*4882a593Smuzhiyun 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
445*4882a593Smuzhiyun 			  MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET;
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun 	drm_panel_init(&ctx->panel, &dsi->dev, &ltk500hd1829_funcs,
448*4882a593Smuzhiyun 		       DRM_MODE_CONNECTOR_DSI);
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	ret = drm_panel_of_backlight(&ctx->panel);
451*4882a593Smuzhiyun 	if (ret)
452*4882a593Smuzhiyun 		return ret;
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun 	drm_panel_add(&ctx->panel);
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	ret = mipi_dsi_attach(dsi);
457*4882a593Smuzhiyun 	if (ret < 0) {
458*4882a593Smuzhiyun 		dev_err(dev, "mipi_dsi_attach failed: %d\n", ret);
459*4882a593Smuzhiyun 		drm_panel_remove(&ctx->panel);
460*4882a593Smuzhiyun 		return ret;
461*4882a593Smuzhiyun 	}
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 	return 0;
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun 
ltk500hd1829_shutdown(struct mipi_dsi_device * dsi)466*4882a593Smuzhiyun static void ltk500hd1829_shutdown(struct mipi_dsi_device *dsi)
467*4882a593Smuzhiyun {
468*4882a593Smuzhiyun 	struct ltk500hd1829 *ctx = mipi_dsi_get_drvdata(dsi);
469*4882a593Smuzhiyun 	int ret;
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun 	ret = drm_panel_unprepare(&ctx->panel);
472*4882a593Smuzhiyun 	if (ret < 0)
473*4882a593Smuzhiyun 		dev_err(&dsi->dev, "Failed to unprepare panel: %d\n", ret);
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	ret = drm_panel_disable(&ctx->panel);
476*4882a593Smuzhiyun 	if (ret < 0)
477*4882a593Smuzhiyun 		dev_err(&dsi->dev, "Failed to disable panel: %d\n", ret);
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun 
ltk500hd1829_remove(struct mipi_dsi_device * dsi)480*4882a593Smuzhiyun static int ltk500hd1829_remove(struct mipi_dsi_device *dsi)
481*4882a593Smuzhiyun {
482*4882a593Smuzhiyun 	struct ltk500hd1829 *ctx = mipi_dsi_get_drvdata(dsi);
483*4882a593Smuzhiyun 	int ret;
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 	ltk500hd1829_shutdown(dsi);
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 	ret = mipi_dsi_detach(dsi);
488*4882a593Smuzhiyun 	if (ret < 0)
489*4882a593Smuzhiyun 		dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	drm_panel_remove(&ctx->panel);
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	return 0;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun static const struct of_device_id ltk500hd1829_of_match[] = {
497*4882a593Smuzhiyun 	{ .compatible = "leadtek,ltk500hd1829", },
498*4882a593Smuzhiyun 	{ /* sentinel */ }
499*4882a593Smuzhiyun };
500*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ltk500hd1829_of_match);
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun static struct mipi_dsi_driver ltk500hd1829_driver = {
503*4882a593Smuzhiyun 	.driver = {
504*4882a593Smuzhiyun 		.name = "panel-leadtek-ltk500hd1829",
505*4882a593Smuzhiyun 		.of_match_table = ltk500hd1829_of_match,
506*4882a593Smuzhiyun 	},
507*4882a593Smuzhiyun 	.probe = ltk500hd1829_probe,
508*4882a593Smuzhiyun 	.remove = ltk500hd1829_remove,
509*4882a593Smuzhiyun 	.shutdown = ltk500hd1829_shutdown,
510*4882a593Smuzhiyun };
511*4882a593Smuzhiyun module_mipi_dsi_driver(ltk500hd1829_driver);
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun MODULE_AUTHOR("Heiko Stuebner <heiko.stuebner@theobroma-systems.com>");
514*4882a593Smuzhiyun MODULE_DESCRIPTION("Leadtek LTK500HD1829 panel driver");
515*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
516