xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/delay.h>
7*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/of.h>
10*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <video/mipi_display.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <drm/drm_crtc.h>
15*4882a593Smuzhiyun #include <drm/drm_device.h>
16*4882a593Smuzhiyun #include <drm/drm_mipi_dsi.h>
17*4882a593Smuzhiyun #include <drm/drm_modes.h>
18*4882a593Smuzhiyun #include <drm/drm_panel.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun struct kingdisplay_panel {
21*4882a593Smuzhiyun 	struct drm_panel base;
22*4882a593Smuzhiyun 	struct mipi_dsi_device *link;
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun 	struct regulator *supply;
25*4882a593Smuzhiyun 	struct gpio_desc *enable_gpio;
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	bool prepared;
28*4882a593Smuzhiyun 	bool enabled;
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun struct kingdisplay_panel_cmd {
32*4882a593Smuzhiyun 	char cmd;
33*4882a593Smuzhiyun 	char data;
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun  * According to the discussion on
38*4882a593Smuzhiyun  * https://review.coreboot.org/#/c/coreboot/+/22472/
39*4882a593Smuzhiyun  * the panel init array is not part of the panels datasheet but instead
40*4882a593Smuzhiyun  * just came in this form from the panel vendor.
41*4882a593Smuzhiyun  */
42*4882a593Smuzhiyun static const struct kingdisplay_panel_cmd init_code[] = {
43*4882a593Smuzhiyun 	/* voltage setting */
44*4882a593Smuzhiyun 	{ 0xB0, 0x00 },
45*4882a593Smuzhiyun 	{ 0xB2, 0x02 },
46*4882a593Smuzhiyun 	{ 0xB3, 0x11 },
47*4882a593Smuzhiyun 	{ 0xB4, 0x00 },
48*4882a593Smuzhiyun 	{ 0xB6, 0x80 },
49*4882a593Smuzhiyun 	/* VCOM disable */
50*4882a593Smuzhiyun 	{ 0xB7, 0x02 },
51*4882a593Smuzhiyun 	{ 0xB8, 0x80 },
52*4882a593Smuzhiyun 	{ 0xBA, 0x43 },
53*4882a593Smuzhiyun 	/* VCOM setting */
54*4882a593Smuzhiyun 	{ 0xBB, 0x53 },
55*4882a593Smuzhiyun 	/* VSP setting */
56*4882a593Smuzhiyun 	{ 0xBC, 0x0A },
57*4882a593Smuzhiyun 	/* VSN setting */
58*4882a593Smuzhiyun 	{ 0xBD, 0x4A },
59*4882a593Smuzhiyun 	/* VGH setting */
60*4882a593Smuzhiyun 	{ 0xBE, 0x2F },
61*4882a593Smuzhiyun 	/* VGL setting */
62*4882a593Smuzhiyun 	{ 0xBF, 0x1A },
63*4882a593Smuzhiyun 	{ 0xF0, 0x39 },
64*4882a593Smuzhiyun 	{ 0xF1, 0x22 },
65*4882a593Smuzhiyun 	/* Gamma setting */
66*4882a593Smuzhiyun 	{ 0xB0, 0x02 },
67*4882a593Smuzhiyun 	{ 0xC0, 0x00 },
68*4882a593Smuzhiyun 	{ 0xC1, 0x01 },
69*4882a593Smuzhiyun 	{ 0xC2, 0x0B },
70*4882a593Smuzhiyun 	{ 0xC3, 0x15 },
71*4882a593Smuzhiyun 	{ 0xC4, 0x22 },
72*4882a593Smuzhiyun 	{ 0xC5, 0x11 },
73*4882a593Smuzhiyun 	{ 0xC6, 0x15 },
74*4882a593Smuzhiyun 	{ 0xC7, 0x19 },
75*4882a593Smuzhiyun 	{ 0xC8, 0x1A },
76*4882a593Smuzhiyun 	{ 0xC9, 0x16 },
77*4882a593Smuzhiyun 	{ 0xCA, 0x18 },
78*4882a593Smuzhiyun 	{ 0xCB, 0x13 },
79*4882a593Smuzhiyun 	{ 0xCC, 0x18 },
80*4882a593Smuzhiyun 	{ 0xCD, 0x13 },
81*4882a593Smuzhiyun 	{ 0xCE, 0x1C },
82*4882a593Smuzhiyun 	{ 0xCF, 0x19 },
83*4882a593Smuzhiyun 	{ 0xD0, 0x21 },
84*4882a593Smuzhiyun 	{ 0xD1, 0x2C },
85*4882a593Smuzhiyun 	{ 0xD2, 0x2F },
86*4882a593Smuzhiyun 	{ 0xD3, 0x30 },
87*4882a593Smuzhiyun 	{ 0xD4, 0x19 },
88*4882a593Smuzhiyun 	{ 0xD5, 0x1F },
89*4882a593Smuzhiyun 	{ 0xD6, 0x00 },
90*4882a593Smuzhiyun 	{ 0xD7, 0x01 },
91*4882a593Smuzhiyun 	{ 0xD8, 0x0B },
92*4882a593Smuzhiyun 	{ 0xD9, 0x15 },
93*4882a593Smuzhiyun 	{ 0xDA, 0x22 },
94*4882a593Smuzhiyun 	{ 0xDB, 0x11 },
95*4882a593Smuzhiyun 	{ 0xDC, 0x15 },
96*4882a593Smuzhiyun 	{ 0xDD, 0x19 },
97*4882a593Smuzhiyun 	{ 0xDE, 0x1A },
98*4882a593Smuzhiyun 	{ 0xDF, 0x16 },
99*4882a593Smuzhiyun 	{ 0xE0, 0x18 },
100*4882a593Smuzhiyun 	{ 0xE1, 0x13 },
101*4882a593Smuzhiyun 	{ 0xE2, 0x18 },
102*4882a593Smuzhiyun 	{ 0xE3, 0x13 },
103*4882a593Smuzhiyun 	{ 0xE4, 0x1C },
104*4882a593Smuzhiyun 	{ 0xE5, 0x19 },
105*4882a593Smuzhiyun 	{ 0xE6, 0x21 },
106*4882a593Smuzhiyun 	{ 0xE7, 0x2C },
107*4882a593Smuzhiyun 	{ 0xE8, 0x2F },
108*4882a593Smuzhiyun 	{ 0xE9, 0x30 },
109*4882a593Smuzhiyun 	{ 0xEA, 0x19 },
110*4882a593Smuzhiyun 	{ 0xEB, 0x1F },
111*4882a593Smuzhiyun 	/* GOA MUX setting */
112*4882a593Smuzhiyun 	{ 0xB0, 0x01 },
113*4882a593Smuzhiyun 	{ 0xC0, 0x10 },
114*4882a593Smuzhiyun 	{ 0xC1, 0x0F },
115*4882a593Smuzhiyun 	{ 0xC2, 0x0E },
116*4882a593Smuzhiyun 	{ 0xC3, 0x0D },
117*4882a593Smuzhiyun 	{ 0xC4, 0x0C },
118*4882a593Smuzhiyun 	{ 0xC5, 0x0B },
119*4882a593Smuzhiyun 	{ 0xC6, 0x0A },
120*4882a593Smuzhiyun 	{ 0xC7, 0x09 },
121*4882a593Smuzhiyun 	{ 0xC8, 0x08 },
122*4882a593Smuzhiyun 	{ 0xC9, 0x07 },
123*4882a593Smuzhiyun 	{ 0xCA, 0x06 },
124*4882a593Smuzhiyun 	{ 0xCB, 0x05 },
125*4882a593Smuzhiyun 	{ 0xCC, 0x00 },
126*4882a593Smuzhiyun 	{ 0xCD, 0x01 },
127*4882a593Smuzhiyun 	{ 0xCE, 0x02 },
128*4882a593Smuzhiyun 	{ 0xCF, 0x03 },
129*4882a593Smuzhiyun 	{ 0xD0, 0x04 },
130*4882a593Smuzhiyun 	{ 0xD6, 0x10 },
131*4882a593Smuzhiyun 	{ 0xD7, 0x0F },
132*4882a593Smuzhiyun 	{ 0xD8, 0x0E },
133*4882a593Smuzhiyun 	{ 0xD9, 0x0D },
134*4882a593Smuzhiyun 	{ 0xDA, 0x0C },
135*4882a593Smuzhiyun 	{ 0xDB, 0x0B },
136*4882a593Smuzhiyun 	{ 0xDC, 0x0A },
137*4882a593Smuzhiyun 	{ 0xDD, 0x09 },
138*4882a593Smuzhiyun 	{ 0xDE, 0x08 },
139*4882a593Smuzhiyun 	{ 0xDF, 0x07 },
140*4882a593Smuzhiyun 	{ 0xE0, 0x06 },
141*4882a593Smuzhiyun 	{ 0xE1, 0x05 },
142*4882a593Smuzhiyun 	{ 0xE2, 0x00 },
143*4882a593Smuzhiyun 	{ 0xE3, 0x01 },
144*4882a593Smuzhiyun 	{ 0xE4, 0x02 },
145*4882a593Smuzhiyun 	{ 0xE5, 0x03 },
146*4882a593Smuzhiyun 	{ 0xE6, 0x04 },
147*4882a593Smuzhiyun 	{ 0xE7, 0x00 },
148*4882a593Smuzhiyun 	{ 0xEC, 0xC0 },
149*4882a593Smuzhiyun 	/* GOA timing setting */
150*4882a593Smuzhiyun 	{ 0xB0, 0x03 },
151*4882a593Smuzhiyun 	{ 0xC0, 0x01 },
152*4882a593Smuzhiyun 	{ 0xC2, 0x6F },
153*4882a593Smuzhiyun 	{ 0xC3, 0x6F },
154*4882a593Smuzhiyun 	{ 0xC5, 0x36 },
155*4882a593Smuzhiyun 	{ 0xC8, 0x08 },
156*4882a593Smuzhiyun 	{ 0xC9, 0x04 },
157*4882a593Smuzhiyun 	{ 0xCA, 0x41 },
158*4882a593Smuzhiyun 	{ 0xCC, 0x43 },
159*4882a593Smuzhiyun 	{ 0xCF, 0x60 },
160*4882a593Smuzhiyun 	{ 0xD2, 0x04 },
161*4882a593Smuzhiyun 	{ 0xD3, 0x04 },
162*4882a593Smuzhiyun 	{ 0xD4, 0x03 },
163*4882a593Smuzhiyun 	{ 0xD5, 0x02 },
164*4882a593Smuzhiyun 	{ 0xD6, 0x01 },
165*4882a593Smuzhiyun 	{ 0xD7, 0x00 },
166*4882a593Smuzhiyun 	{ 0xDB, 0x01 },
167*4882a593Smuzhiyun 	{ 0xDE, 0x36 },
168*4882a593Smuzhiyun 	{ 0xE6, 0x6F },
169*4882a593Smuzhiyun 	{ 0xE7, 0x6F },
170*4882a593Smuzhiyun 	/* GOE setting */
171*4882a593Smuzhiyun 	{ 0xB0, 0x06 },
172*4882a593Smuzhiyun 	{ 0xB8, 0xA5 },
173*4882a593Smuzhiyun 	{ 0xC0, 0xA5 },
174*4882a593Smuzhiyun 	{ 0xD5, 0x3F },
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun static inline
to_kingdisplay_panel(struct drm_panel * panel)178*4882a593Smuzhiyun struct kingdisplay_panel *to_kingdisplay_panel(struct drm_panel *panel)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun 	return container_of(panel, struct kingdisplay_panel, base);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
kingdisplay_panel_disable(struct drm_panel * panel)183*4882a593Smuzhiyun static int kingdisplay_panel_disable(struct drm_panel *panel)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	struct kingdisplay_panel *kingdisplay = to_kingdisplay_panel(panel);
186*4882a593Smuzhiyun 	int err;
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	if (!kingdisplay->enabled)
189*4882a593Smuzhiyun 		return 0;
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	err = mipi_dsi_dcs_set_display_off(kingdisplay->link);
192*4882a593Smuzhiyun 	if (err < 0)
193*4882a593Smuzhiyun 		dev_err(panel->dev, "failed to set display off: %d\n", err);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	kingdisplay->enabled = false;
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	return 0;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun 
kingdisplay_panel_unprepare(struct drm_panel * panel)200*4882a593Smuzhiyun static int kingdisplay_panel_unprepare(struct drm_panel *panel)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun 	struct kingdisplay_panel *kingdisplay = to_kingdisplay_panel(panel);
203*4882a593Smuzhiyun 	int err;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	if (!kingdisplay->prepared)
206*4882a593Smuzhiyun 		return 0;
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	err = mipi_dsi_dcs_enter_sleep_mode(kingdisplay->link);
209*4882a593Smuzhiyun 	if (err < 0) {
210*4882a593Smuzhiyun 		dev_err(panel->dev, "failed to enter sleep mode: %d\n", err);
211*4882a593Smuzhiyun 		return err;
212*4882a593Smuzhiyun 	}
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	/* T15: 120ms */
215*4882a593Smuzhiyun 	msleep(120);
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	gpiod_set_value_cansleep(kingdisplay->enable_gpio, 0);
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	err = regulator_disable(kingdisplay->supply);
220*4882a593Smuzhiyun 	if (err < 0)
221*4882a593Smuzhiyun 		return err;
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	kingdisplay->prepared = false;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	return 0;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun 
kingdisplay_panel_prepare(struct drm_panel * panel)228*4882a593Smuzhiyun static int kingdisplay_panel_prepare(struct drm_panel *panel)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun 	struct kingdisplay_panel *kingdisplay = to_kingdisplay_panel(panel);
231*4882a593Smuzhiyun 	int err, regulator_err;
232*4882a593Smuzhiyun 	unsigned int i;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	if (kingdisplay->prepared)
235*4882a593Smuzhiyun 		return 0;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	gpiod_set_value_cansleep(kingdisplay->enable_gpio, 0);
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	err = regulator_enable(kingdisplay->supply);
240*4882a593Smuzhiyun 	if (err < 0)
241*4882a593Smuzhiyun 		return err;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	/* T2: 15ms */
244*4882a593Smuzhiyun 	usleep_range(15000, 16000);
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	gpiod_set_value_cansleep(kingdisplay->enable_gpio, 1);
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	/* T4: 15ms */
249*4882a593Smuzhiyun 	usleep_range(15000, 16000);
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(init_code); i++) {
252*4882a593Smuzhiyun 		err = mipi_dsi_generic_write(kingdisplay->link, &init_code[i],
253*4882a593Smuzhiyun 					sizeof(struct kingdisplay_panel_cmd));
254*4882a593Smuzhiyun 		if (err < 0) {
255*4882a593Smuzhiyun 			dev_err(panel->dev, "failed write init cmds: %d\n", err);
256*4882a593Smuzhiyun 			goto poweroff;
257*4882a593Smuzhiyun 		}
258*4882a593Smuzhiyun 	}
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	err = mipi_dsi_dcs_exit_sleep_mode(kingdisplay->link);
261*4882a593Smuzhiyun 	if (err < 0) {
262*4882a593Smuzhiyun 		dev_err(panel->dev, "failed to exit sleep mode: %d\n", err);
263*4882a593Smuzhiyun 		goto poweroff;
264*4882a593Smuzhiyun 	}
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	/* T6: 120ms */
267*4882a593Smuzhiyun 	msleep(120);
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	err = mipi_dsi_dcs_set_display_on(kingdisplay->link);
270*4882a593Smuzhiyun 	if (err < 0) {
271*4882a593Smuzhiyun 		dev_err(panel->dev, "failed to set display on: %d\n", err);
272*4882a593Smuzhiyun 		goto poweroff;
273*4882a593Smuzhiyun 	}
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	/* T7: 10ms */
276*4882a593Smuzhiyun 	usleep_range(10000, 11000);
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	kingdisplay->prepared = true;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	return 0;
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun poweroff:
283*4882a593Smuzhiyun 	gpiod_set_value_cansleep(kingdisplay->enable_gpio, 0);
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	regulator_err = regulator_disable(kingdisplay->supply);
286*4882a593Smuzhiyun 	if (regulator_err)
287*4882a593Smuzhiyun 		dev_err(panel->dev, "failed to disable regulator: %d\n", regulator_err);
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	return err;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun 
kingdisplay_panel_enable(struct drm_panel * panel)292*4882a593Smuzhiyun static int kingdisplay_panel_enable(struct drm_panel *panel)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	struct kingdisplay_panel *kingdisplay = to_kingdisplay_panel(panel);
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	if (kingdisplay->enabled)
297*4882a593Smuzhiyun 		return 0;
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	kingdisplay->enabled = true;
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	return 0;
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun static const struct drm_display_mode default_mode = {
305*4882a593Smuzhiyun 	.clock = 229000,
306*4882a593Smuzhiyun 	.hdisplay = 1536,
307*4882a593Smuzhiyun 	.hsync_start = 1536 + 100,
308*4882a593Smuzhiyun 	.hsync_end = 1536 + 100 + 24,
309*4882a593Smuzhiyun 	.htotal = 1536 + 100 + 24 + 100,
310*4882a593Smuzhiyun 	.vdisplay = 2048,
311*4882a593Smuzhiyun 	.vsync_start = 2048 + 95,
312*4882a593Smuzhiyun 	.vsync_end = 2048 + 95 + 2,
313*4882a593Smuzhiyun 	.vtotal = 2048 + 95 + 2 + 23,
314*4882a593Smuzhiyun };
315*4882a593Smuzhiyun 
kingdisplay_panel_get_modes(struct drm_panel * panel,struct drm_connector * connector)316*4882a593Smuzhiyun static int kingdisplay_panel_get_modes(struct drm_panel *panel,
317*4882a593Smuzhiyun 				       struct drm_connector *connector)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun 	struct drm_display_mode *mode;
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	mode = drm_mode_duplicate(connector->dev, &default_mode);
322*4882a593Smuzhiyun 	if (!mode) {
323*4882a593Smuzhiyun 		dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
324*4882a593Smuzhiyun 			default_mode.hdisplay, default_mode.vdisplay,
325*4882a593Smuzhiyun 			drm_mode_vrefresh(&default_mode));
326*4882a593Smuzhiyun 		return -ENOMEM;
327*4882a593Smuzhiyun 	}
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 	drm_mode_set_name(mode);
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	drm_mode_probed_add(connector, mode);
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	connector->display_info.width_mm = 147;
334*4882a593Smuzhiyun 	connector->display_info.height_mm = 196;
335*4882a593Smuzhiyun 	connector->display_info.bpc = 8;
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	return 1;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun static const struct drm_panel_funcs kingdisplay_panel_funcs = {
341*4882a593Smuzhiyun 	.disable = kingdisplay_panel_disable,
342*4882a593Smuzhiyun 	.unprepare = kingdisplay_panel_unprepare,
343*4882a593Smuzhiyun 	.prepare = kingdisplay_panel_prepare,
344*4882a593Smuzhiyun 	.enable = kingdisplay_panel_enable,
345*4882a593Smuzhiyun 	.get_modes = kingdisplay_panel_get_modes,
346*4882a593Smuzhiyun };
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun static const struct of_device_id kingdisplay_of_match[] = {
349*4882a593Smuzhiyun 	{ .compatible = "kingdisplay,kd097d04", },
350*4882a593Smuzhiyun 	{ }
351*4882a593Smuzhiyun };
352*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, kingdisplay_of_match);
353*4882a593Smuzhiyun 
kingdisplay_panel_add(struct kingdisplay_panel * kingdisplay)354*4882a593Smuzhiyun static int kingdisplay_panel_add(struct kingdisplay_panel *kingdisplay)
355*4882a593Smuzhiyun {
356*4882a593Smuzhiyun 	struct device *dev = &kingdisplay->link->dev;
357*4882a593Smuzhiyun 	int err;
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 	kingdisplay->supply = devm_regulator_get(dev, "power");
360*4882a593Smuzhiyun 	if (IS_ERR(kingdisplay->supply))
361*4882a593Smuzhiyun 		return PTR_ERR(kingdisplay->supply);
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	kingdisplay->enable_gpio = devm_gpiod_get_optional(dev, "enable",
364*4882a593Smuzhiyun 							   GPIOD_OUT_HIGH);
365*4882a593Smuzhiyun 	if (IS_ERR(kingdisplay->enable_gpio)) {
366*4882a593Smuzhiyun 		err = PTR_ERR(kingdisplay->enable_gpio);
367*4882a593Smuzhiyun 		dev_dbg(dev, "failed to get enable gpio: %d\n", err);
368*4882a593Smuzhiyun 		kingdisplay->enable_gpio = NULL;
369*4882a593Smuzhiyun 	}
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	drm_panel_init(&kingdisplay->base, &kingdisplay->link->dev,
372*4882a593Smuzhiyun 		       &kingdisplay_panel_funcs, DRM_MODE_CONNECTOR_DSI);
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	err = drm_panel_of_backlight(&kingdisplay->base);
375*4882a593Smuzhiyun 	if (err)
376*4882a593Smuzhiyun 		return err;
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	drm_panel_add(&kingdisplay->base);
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	return 0;
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun 
kingdisplay_panel_del(struct kingdisplay_panel * kingdisplay)383*4882a593Smuzhiyun static void kingdisplay_panel_del(struct kingdisplay_panel *kingdisplay)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun 	drm_panel_remove(&kingdisplay->base);
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun 
kingdisplay_panel_probe(struct mipi_dsi_device * dsi)388*4882a593Smuzhiyun static int kingdisplay_panel_probe(struct mipi_dsi_device *dsi)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun 	struct kingdisplay_panel *kingdisplay;
391*4882a593Smuzhiyun 	int err;
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	dsi->lanes = 4;
394*4882a593Smuzhiyun 	dsi->format = MIPI_DSI_FMT_RGB888;
395*4882a593Smuzhiyun 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
396*4882a593Smuzhiyun 			  MIPI_DSI_MODE_LPM;
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	kingdisplay = devm_kzalloc(&dsi->dev, sizeof(*kingdisplay), GFP_KERNEL);
399*4882a593Smuzhiyun 	if (!kingdisplay)
400*4882a593Smuzhiyun 		return -ENOMEM;
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	mipi_dsi_set_drvdata(dsi, kingdisplay);
403*4882a593Smuzhiyun 	kingdisplay->link = dsi;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	err = kingdisplay_panel_add(kingdisplay);
406*4882a593Smuzhiyun 	if (err < 0)
407*4882a593Smuzhiyun 		return err;
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	err = mipi_dsi_attach(dsi);
410*4882a593Smuzhiyun 	if (err < 0) {
411*4882a593Smuzhiyun 		kingdisplay_panel_del(kingdisplay);
412*4882a593Smuzhiyun 		return err;
413*4882a593Smuzhiyun 	}
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	return 0;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun 
kingdisplay_panel_remove(struct mipi_dsi_device * dsi)418*4882a593Smuzhiyun static int kingdisplay_panel_remove(struct mipi_dsi_device *dsi)
419*4882a593Smuzhiyun {
420*4882a593Smuzhiyun 	struct kingdisplay_panel *kingdisplay = mipi_dsi_get_drvdata(dsi);
421*4882a593Smuzhiyun 	int err;
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun 	err = drm_panel_unprepare(&kingdisplay->base);
424*4882a593Smuzhiyun 	if (err < 0)
425*4882a593Smuzhiyun 		dev_err(&dsi->dev, "failed to unprepare panel: %d\n", err);
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	err = drm_panel_disable(&kingdisplay->base);
428*4882a593Smuzhiyun 	if (err < 0)
429*4882a593Smuzhiyun 		dev_err(&dsi->dev, "failed to disable panel: %d\n", err);
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun 	err = mipi_dsi_detach(dsi);
432*4882a593Smuzhiyun 	if (err < 0)
433*4882a593Smuzhiyun 		dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	kingdisplay_panel_del(kingdisplay);
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun 	return 0;
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun 
kingdisplay_panel_shutdown(struct mipi_dsi_device * dsi)440*4882a593Smuzhiyun static void kingdisplay_panel_shutdown(struct mipi_dsi_device *dsi)
441*4882a593Smuzhiyun {
442*4882a593Smuzhiyun 	struct kingdisplay_panel *kingdisplay = mipi_dsi_get_drvdata(dsi);
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 	drm_panel_unprepare(&kingdisplay->base);
445*4882a593Smuzhiyun 	drm_panel_disable(&kingdisplay->base);
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun static struct mipi_dsi_driver kingdisplay_panel_driver = {
449*4882a593Smuzhiyun 	.driver = {
450*4882a593Smuzhiyun 		.name = "panel-kingdisplay-kd097d04",
451*4882a593Smuzhiyun 		.of_match_table = kingdisplay_of_match,
452*4882a593Smuzhiyun 	},
453*4882a593Smuzhiyun 	.probe = kingdisplay_panel_probe,
454*4882a593Smuzhiyun 	.remove = kingdisplay_panel_remove,
455*4882a593Smuzhiyun 	.shutdown = kingdisplay_panel_shutdown,
456*4882a593Smuzhiyun };
457*4882a593Smuzhiyun module_mipi_dsi_driver(kingdisplay_panel_driver);
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
460*4882a593Smuzhiyun MODULE_AUTHOR("Nickey Yang <nickey.yang@rock-chips.com>");
461*4882a593Smuzhiyun MODULE_DESCRIPTION("kingdisplay KD097D04 panel driver");
462*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
463