1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/delay.h>
7*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/of.h>
10*4882a593Smuzhiyun #include <linux/of_device.h>
11*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <video/mipi_display.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <drm/drm_crtc.h>
16*4882a593Smuzhiyun #include <drm/drm_device.h>
17*4882a593Smuzhiyun #include <drm/drm_mipi_dsi.h>
18*4882a593Smuzhiyun #include <drm/drm_modes.h>
19*4882a593Smuzhiyun #include <drm/drm_panel.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun struct panel_init_cmd {
22*4882a593Smuzhiyun size_t len;
23*4882a593Smuzhiyun const char *data;
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define _INIT_CMD(...) { \
27*4882a593Smuzhiyun .len = sizeof((char[]){__VA_ARGS__}), \
28*4882a593Smuzhiyun .data = (char[]){__VA_ARGS__} }
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun struct panel_desc {
31*4882a593Smuzhiyun const struct drm_display_mode *mode;
32*4882a593Smuzhiyun unsigned int bpc;
33*4882a593Smuzhiyun struct {
34*4882a593Smuzhiyun unsigned int width;
35*4882a593Smuzhiyun unsigned int height;
36*4882a593Smuzhiyun } size;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun unsigned long flags;
39*4882a593Smuzhiyun enum mipi_dsi_pixel_format format;
40*4882a593Smuzhiyun const struct panel_init_cmd *init_cmds;
41*4882a593Smuzhiyun unsigned int lanes;
42*4882a593Smuzhiyun const char * const *supply_names;
43*4882a593Smuzhiyun unsigned int num_supplies;
44*4882a593Smuzhiyun unsigned int sleep_mode_delay;
45*4882a593Smuzhiyun unsigned int power_down_delay;
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun struct innolux_panel {
49*4882a593Smuzhiyun struct drm_panel base;
50*4882a593Smuzhiyun struct mipi_dsi_device *link;
51*4882a593Smuzhiyun const struct panel_desc *desc;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun struct regulator_bulk_data *supplies;
54*4882a593Smuzhiyun struct gpio_desc *enable_gpio;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun bool prepared;
57*4882a593Smuzhiyun bool enabled;
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
to_innolux_panel(struct drm_panel * panel)60*4882a593Smuzhiyun static inline struct innolux_panel *to_innolux_panel(struct drm_panel *panel)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun return container_of(panel, struct innolux_panel, base);
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
innolux_panel_disable(struct drm_panel * panel)65*4882a593Smuzhiyun static int innolux_panel_disable(struct drm_panel *panel)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun struct innolux_panel *innolux = to_innolux_panel(panel);
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun if (!innolux->enabled)
70*4882a593Smuzhiyun return 0;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun innolux->enabled = false;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun return 0;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
innolux_panel_unprepare(struct drm_panel * panel)77*4882a593Smuzhiyun static int innolux_panel_unprepare(struct drm_panel *panel)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun struct innolux_panel *innolux = to_innolux_panel(panel);
80*4882a593Smuzhiyun int err;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun if (!innolux->prepared)
83*4882a593Smuzhiyun return 0;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun err = mipi_dsi_dcs_set_display_off(innolux->link);
86*4882a593Smuzhiyun if (err < 0)
87*4882a593Smuzhiyun dev_err(panel->dev, "failed to set display off: %d\n", err);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun err = mipi_dsi_dcs_enter_sleep_mode(innolux->link);
90*4882a593Smuzhiyun if (err < 0) {
91*4882a593Smuzhiyun dev_err(panel->dev, "failed to enter sleep mode: %d\n", err);
92*4882a593Smuzhiyun return err;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun if (innolux->desc->sleep_mode_delay)
96*4882a593Smuzhiyun msleep(innolux->desc->sleep_mode_delay);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun gpiod_set_value_cansleep(innolux->enable_gpio, 0);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun if (innolux->desc->power_down_delay)
101*4882a593Smuzhiyun msleep(innolux->desc->power_down_delay);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun err = regulator_bulk_disable(innolux->desc->num_supplies,
104*4882a593Smuzhiyun innolux->supplies);
105*4882a593Smuzhiyun if (err < 0)
106*4882a593Smuzhiyun return err;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun innolux->prepared = false;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun return 0;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
innolux_panel_prepare(struct drm_panel * panel)113*4882a593Smuzhiyun static int innolux_panel_prepare(struct drm_panel *panel)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun struct innolux_panel *innolux = to_innolux_panel(panel);
116*4882a593Smuzhiyun int err;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun if (innolux->prepared)
119*4882a593Smuzhiyun return 0;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun gpiod_set_value_cansleep(innolux->enable_gpio, 0);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun err = regulator_bulk_enable(innolux->desc->num_supplies,
124*4882a593Smuzhiyun innolux->supplies);
125*4882a593Smuzhiyun if (err < 0)
126*4882a593Smuzhiyun return err;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun /* p079zca: t2 (20ms), p097pfg: t4 (15ms) */
129*4882a593Smuzhiyun usleep_range(20000, 21000);
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun gpiod_set_value_cansleep(innolux->enable_gpio, 1);
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /* p079zca: t4, p097pfg: t5 */
134*4882a593Smuzhiyun usleep_range(20000, 21000);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun if (innolux->desc->init_cmds) {
137*4882a593Smuzhiyun const struct panel_init_cmd *cmds =
138*4882a593Smuzhiyun innolux->desc->init_cmds;
139*4882a593Smuzhiyun unsigned int i;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun for (i = 0; cmds[i].len != 0; i++) {
142*4882a593Smuzhiyun const struct panel_init_cmd *cmd = &cmds[i];
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun err = mipi_dsi_generic_write(innolux->link, cmd->data,
145*4882a593Smuzhiyun cmd->len);
146*4882a593Smuzhiyun if (err < 0) {
147*4882a593Smuzhiyun dev_err(panel->dev, "failed to write command %u\n", i);
148*4882a593Smuzhiyun goto poweroff;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun /*
152*4882a593Smuzhiyun * Included by random guessing, because without this
153*4882a593Smuzhiyun * (or at least, some delay), the panel sometimes
154*4882a593Smuzhiyun * didn't appear to pick up the command sequence.
155*4882a593Smuzhiyun */
156*4882a593Smuzhiyun err = mipi_dsi_dcs_nop(innolux->link);
157*4882a593Smuzhiyun if (err < 0) {
158*4882a593Smuzhiyun dev_err(panel->dev, "failed to send DCS nop: %d\n", err);
159*4882a593Smuzhiyun goto poweroff;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun err = mipi_dsi_dcs_exit_sleep_mode(innolux->link);
165*4882a593Smuzhiyun if (err < 0) {
166*4882a593Smuzhiyun dev_err(panel->dev, "failed to exit sleep mode: %d\n", err);
167*4882a593Smuzhiyun goto poweroff;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun /* T6: 120ms - 1000ms*/
171*4882a593Smuzhiyun msleep(120);
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun err = mipi_dsi_dcs_set_display_on(innolux->link);
174*4882a593Smuzhiyun if (err < 0) {
175*4882a593Smuzhiyun dev_err(panel->dev, "failed to set display on: %d\n", err);
176*4882a593Smuzhiyun goto poweroff;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /* T7: 5ms */
180*4882a593Smuzhiyun usleep_range(5000, 6000);
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun innolux->prepared = true;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun return 0;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun poweroff:
187*4882a593Smuzhiyun gpiod_set_value_cansleep(innolux->enable_gpio, 0);
188*4882a593Smuzhiyun regulator_bulk_disable(innolux->desc->num_supplies, innolux->supplies);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun return err;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
innolux_panel_enable(struct drm_panel * panel)193*4882a593Smuzhiyun static int innolux_panel_enable(struct drm_panel *panel)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun struct innolux_panel *innolux = to_innolux_panel(panel);
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun if (innolux->enabled)
198*4882a593Smuzhiyun return 0;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun innolux->enabled = true;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun return 0;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun static const char * const innolux_p079zca_supply_names[] = {
206*4882a593Smuzhiyun "power",
207*4882a593Smuzhiyun };
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun static const struct drm_display_mode innolux_p079zca_mode = {
210*4882a593Smuzhiyun .clock = 56900,
211*4882a593Smuzhiyun .hdisplay = 768,
212*4882a593Smuzhiyun .hsync_start = 768 + 40,
213*4882a593Smuzhiyun .hsync_end = 768 + 40 + 40,
214*4882a593Smuzhiyun .htotal = 768 + 40 + 40 + 40,
215*4882a593Smuzhiyun .vdisplay = 1024,
216*4882a593Smuzhiyun .vsync_start = 1024 + 20,
217*4882a593Smuzhiyun .vsync_end = 1024 + 20 + 4,
218*4882a593Smuzhiyun .vtotal = 1024 + 20 + 4 + 20,
219*4882a593Smuzhiyun };
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun static const struct panel_desc innolux_p079zca_panel_desc = {
222*4882a593Smuzhiyun .mode = &innolux_p079zca_mode,
223*4882a593Smuzhiyun .bpc = 8,
224*4882a593Smuzhiyun .size = {
225*4882a593Smuzhiyun .width = 120,
226*4882a593Smuzhiyun .height = 160,
227*4882a593Smuzhiyun },
228*4882a593Smuzhiyun .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
229*4882a593Smuzhiyun MIPI_DSI_MODE_LPM,
230*4882a593Smuzhiyun .format = MIPI_DSI_FMT_RGB888,
231*4882a593Smuzhiyun .lanes = 4,
232*4882a593Smuzhiyun .supply_names = innolux_p079zca_supply_names,
233*4882a593Smuzhiyun .num_supplies = ARRAY_SIZE(innolux_p079zca_supply_names),
234*4882a593Smuzhiyun .power_down_delay = 80, /* T8: 80ms - 1000ms */
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun static const char * const innolux_p097pfg_supply_names[] = {
238*4882a593Smuzhiyun "avdd",
239*4882a593Smuzhiyun "avee",
240*4882a593Smuzhiyun };
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun static const struct drm_display_mode innolux_p097pfg_mode = {
243*4882a593Smuzhiyun .clock = 229000,
244*4882a593Smuzhiyun .hdisplay = 1536,
245*4882a593Smuzhiyun .hsync_start = 1536 + 100,
246*4882a593Smuzhiyun .hsync_end = 1536 + 100 + 24,
247*4882a593Smuzhiyun .htotal = 1536 + 100 + 24 + 100,
248*4882a593Smuzhiyun .vdisplay = 2048,
249*4882a593Smuzhiyun .vsync_start = 2048 + 100,
250*4882a593Smuzhiyun .vsync_end = 2048 + 100 + 2,
251*4882a593Smuzhiyun .vtotal = 2048 + 100 + 2 + 18,
252*4882a593Smuzhiyun };
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun /*
255*4882a593Smuzhiyun * Display manufacturer failed to provide init sequencing according to
256*4882a593Smuzhiyun * https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/892065/
257*4882a593Smuzhiyun * so the init sequence stems from a register dump of a working panel.
258*4882a593Smuzhiyun */
259*4882a593Smuzhiyun static const struct panel_init_cmd innolux_p097pfg_init_cmds[] = {
260*4882a593Smuzhiyun /* page 0 */
261*4882a593Smuzhiyun _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00),
262*4882a593Smuzhiyun _INIT_CMD(0xB1, 0xE8, 0x11),
263*4882a593Smuzhiyun _INIT_CMD(0xB2, 0x25, 0x02),
264*4882a593Smuzhiyun _INIT_CMD(0xB5, 0x08, 0x00),
265*4882a593Smuzhiyun _INIT_CMD(0xBC, 0x0F, 0x00),
266*4882a593Smuzhiyun _INIT_CMD(0xB8, 0x03, 0x06, 0x00, 0x00),
267*4882a593Smuzhiyun _INIT_CMD(0xBD, 0x01, 0x90, 0x14, 0x14),
268*4882a593Smuzhiyun _INIT_CMD(0x6F, 0x01),
269*4882a593Smuzhiyun _INIT_CMD(0xC0, 0x03),
270*4882a593Smuzhiyun _INIT_CMD(0x6F, 0x02),
271*4882a593Smuzhiyun _INIT_CMD(0xC1, 0x0D),
272*4882a593Smuzhiyun _INIT_CMD(0xD9, 0x01, 0x09, 0x70),
273*4882a593Smuzhiyun _INIT_CMD(0xC5, 0x12, 0x21, 0x00),
274*4882a593Smuzhiyun _INIT_CMD(0xBB, 0x93, 0x93),
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /* page 1 */
277*4882a593Smuzhiyun _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x01),
278*4882a593Smuzhiyun _INIT_CMD(0xB3, 0x3C, 0x3C),
279*4882a593Smuzhiyun _INIT_CMD(0xB4, 0x0F, 0x0F),
280*4882a593Smuzhiyun _INIT_CMD(0xB9, 0x45, 0x45),
281*4882a593Smuzhiyun _INIT_CMD(0xBA, 0x14, 0x14),
282*4882a593Smuzhiyun _INIT_CMD(0xCA, 0x02),
283*4882a593Smuzhiyun _INIT_CMD(0xCE, 0x04),
284*4882a593Smuzhiyun _INIT_CMD(0xC3, 0x9B, 0x9B),
285*4882a593Smuzhiyun _INIT_CMD(0xD8, 0xC0, 0x03),
286*4882a593Smuzhiyun _INIT_CMD(0xBC, 0x82, 0x01),
287*4882a593Smuzhiyun _INIT_CMD(0xBD, 0x9E, 0x01),
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun /* page 2 */
290*4882a593Smuzhiyun _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x02),
291*4882a593Smuzhiyun _INIT_CMD(0xB0, 0x82),
292*4882a593Smuzhiyun _INIT_CMD(0xD1, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x82, 0x00, 0xA5,
293*4882a593Smuzhiyun 0x00, 0xC1, 0x00, 0xEA, 0x01, 0x0D, 0x01, 0x40),
294*4882a593Smuzhiyun _INIT_CMD(0xD2, 0x01, 0x6A, 0x01, 0xA8, 0x01, 0xDC, 0x02, 0x29,
295*4882a593Smuzhiyun 0x02, 0x67, 0x02, 0x68, 0x02, 0xA8, 0x02, 0xF0),
296*4882a593Smuzhiyun _INIT_CMD(0xD3, 0x03, 0x19, 0x03, 0x49, 0x03, 0x67, 0x03, 0x8C,
297*4882a593Smuzhiyun 0x03, 0xA6, 0x03, 0xC7, 0x03, 0xDE, 0x03, 0xEC),
298*4882a593Smuzhiyun _INIT_CMD(0xD4, 0x03, 0xFF, 0x03, 0xFF),
299*4882a593Smuzhiyun _INIT_CMD(0xE0, 0x00, 0x00, 0x00, 0x86, 0x00, 0xC5, 0x00, 0xE5,
300*4882a593Smuzhiyun 0x00, 0xFF, 0x01, 0x26, 0x01, 0x45, 0x01, 0x75),
301*4882a593Smuzhiyun _INIT_CMD(0xE1, 0x01, 0x9C, 0x01, 0xD5, 0x02, 0x05, 0x02, 0x4D,
302*4882a593Smuzhiyun 0x02, 0x86, 0x02, 0x87, 0x02, 0xC3, 0x03, 0x03),
303*4882a593Smuzhiyun _INIT_CMD(0xE2, 0x03, 0x2A, 0x03, 0x56, 0x03, 0x72, 0x03, 0x94,
304*4882a593Smuzhiyun 0x03, 0xAC, 0x03, 0xCB, 0x03, 0xE0, 0x03, 0xED),
305*4882a593Smuzhiyun _INIT_CMD(0xE3, 0x03, 0xFF, 0x03, 0xFF),
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun /* page 3 */
308*4882a593Smuzhiyun _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x03),
309*4882a593Smuzhiyun _INIT_CMD(0xB0, 0x00, 0x00, 0x00, 0x00),
310*4882a593Smuzhiyun _INIT_CMD(0xB1, 0x00, 0x00, 0x00, 0x00),
311*4882a593Smuzhiyun _INIT_CMD(0xB2, 0x00, 0x00, 0x06, 0x04, 0x01, 0x40, 0x85),
312*4882a593Smuzhiyun _INIT_CMD(0xB3, 0x10, 0x07, 0xFC, 0x04, 0x01, 0x40, 0x80),
313*4882a593Smuzhiyun _INIT_CMD(0xB6, 0xF0, 0x08, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01,
314*4882a593Smuzhiyun 0x40, 0x80),
315*4882a593Smuzhiyun _INIT_CMD(0xBA, 0xC5, 0x07, 0x00, 0x04, 0x11, 0x25, 0x8C),
316*4882a593Smuzhiyun _INIT_CMD(0xBB, 0xC5, 0x07, 0x00, 0x03, 0x11, 0x25, 0x8C),
317*4882a593Smuzhiyun _INIT_CMD(0xC0, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x80, 0x80),
318*4882a593Smuzhiyun _INIT_CMD(0xC1, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x80, 0x80),
319*4882a593Smuzhiyun _INIT_CMD(0xC4, 0x00, 0x00),
320*4882a593Smuzhiyun _INIT_CMD(0xEF, 0x41),
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun /* page 4 */
323*4882a593Smuzhiyun _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x04),
324*4882a593Smuzhiyun _INIT_CMD(0xEC, 0x4C),
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun /* page 5 */
327*4882a593Smuzhiyun _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x05),
328*4882a593Smuzhiyun _INIT_CMD(0xB0, 0x13, 0x03, 0x03, 0x01),
329*4882a593Smuzhiyun _INIT_CMD(0xB1, 0x30, 0x00),
330*4882a593Smuzhiyun _INIT_CMD(0xB2, 0x02, 0x02, 0x00),
331*4882a593Smuzhiyun _INIT_CMD(0xB3, 0x82, 0x23, 0x82, 0x9D),
332*4882a593Smuzhiyun _INIT_CMD(0xB4, 0xC5, 0x75, 0x24, 0x57),
333*4882a593Smuzhiyun _INIT_CMD(0xB5, 0x00, 0xD4, 0x72, 0x11, 0x11, 0xAB, 0x0A),
334*4882a593Smuzhiyun _INIT_CMD(0xB6, 0x00, 0x00, 0xD5, 0x72, 0x24, 0x56),
335*4882a593Smuzhiyun _INIT_CMD(0xB7, 0x5C, 0xDC, 0x5C, 0x5C),
336*4882a593Smuzhiyun _INIT_CMD(0xB9, 0x0C, 0x00, 0x00, 0x01, 0x00),
337*4882a593Smuzhiyun _INIT_CMD(0xC0, 0x75, 0x11, 0x11, 0x54, 0x05),
338*4882a593Smuzhiyun _INIT_CMD(0xC6, 0x00, 0x00, 0x00, 0x00),
339*4882a593Smuzhiyun _INIT_CMD(0xD0, 0x00, 0x48, 0x08, 0x00, 0x00),
340*4882a593Smuzhiyun _INIT_CMD(0xD1, 0x00, 0x48, 0x09, 0x00, 0x00),
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun /* page 6 */
343*4882a593Smuzhiyun _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x06),
344*4882a593Smuzhiyun _INIT_CMD(0xB0, 0x02, 0x32, 0x32, 0x08, 0x2F),
345*4882a593Smuzhiyun _INIT_CMD(0xB1, 0x2E, 0x15, 0x14, 0x13, 0x12),
346*4882a593Smuzhiyun _INIT_CMD(0xB2, 0x11, 0x10, 0x00, 0x3D, 0x3D),
347*4882a593Smuzhiyun _INIT_CMD(0xB3, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D),
348*4882a593Smuzhiyun _INIT_CMD(0xB4, 0x3D, 0x32),
349*4882a593Smuzhiyun _INIT_CMD(0xB5, 0x03, 0x32, 0x32, 0x09, 0x2F),
350*4882a593Smuzhiyun _INIT_CMD(0xB6, 0x2E, 0x1B, 0x1A, 0x19, 0x18),
351*4882a593Smuzhiyun _INIT_CMD(0xB7, 0x17, 0x16, 0x01, 0x3D, 0x3D),
352*4882a593Smuzhiyun _INIT_CMD(0xB8, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D),
353*4882a593Smuzhiyun _INIT_CMD(0xB9, 0x3D, 0x32),
354*4882a593Smuzhiyun _INIT_CMD(0xC0, 0x01, 0x32, 0x32, 0x09, 0x2F),
355*4882a593Smuzhiyun _INIT_CMD(0xC1, 0x2E, 0x1A, 0x1B, 0x16, 0x17),
356*4882a593Smuzhiyun _INIT_CMD(0xC2, 0x18, 0x19, 0x03, 0x3D, 0x3D),
357*4882a593Smuzhiyun _INIT_CMD(0xC3, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D),
358*4882a593Smuzhiyun _INIT_CMD(0xC4, 0x3D, 0x32),
359*4882a593Smuzhiyun _INIT_CMD(0xC5, 0x00, 0x32, 0x32, 0x08, 0x2F),
360*4882a593Smuzhiyun _INIT_CMD(0xC6, 0x2E, 0x14, 0x15, 0x10, 0x11),
361*4882a593Smuzhiyun _INIT_CMD(0xC7, 0x12, 0x13, 0x02, 0x3D, 0x3D),
362*4882a593Smuzhiyun _INIT_CMD(0xC8, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D),
363*4882a593Smuzhiyun _INIT_CMD(0xC9, 0x3D, 0x32),
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun {},
366*4882a593Smuzhiyun };
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun static const struct panel_desc innolux_p097pfg_panel_desc = {
369*4882a593Smuzhiyun .mode = &innolux_p097pfg_mode,
370*4882a593Smuzhiyun .bpc = 8,
371*4882a593Smuzhiyun .size = {
372*4882a593Smuzhiyun .width = 147,
373*4882a593Smuzhiyun .height = 196,
374*4882a593Smuzhiyun },
375*4882a593Smuzhiyun .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
376*4882a593Smuzhiyun MIPI_DSI_MODE_LPM,
377*4882a593Smuzhiyun .format = MIPI_DSI_FMT_RGB888,
378*4882a593Smuzhiyun .init_cmds = innolux_p097pfg_init_cmds,
379*4882a593Smuzhiyun .lanes = 4,
380*4882a593Smuzhiyun .supply_names = innolux_p097pfg_supply_names,
381*4882a593Smuzhiyun .num_supplies = ARRAY_SIZE(innolux_p097pfg_supply_names),
382*4882a593Smuzhiyun .sleep_mode_delay = 100, /* T15 */
383*4882a593Smuzhiyun };
384*4882a593Smuzhiyun
innolux_panel_get_modes(struct drm_panel * panel,struct drm_connector * connector)385*4882a593Smuzhiyun static int innolux_panel_get_modes(struct drm_panel *panel,
386*4882a593Smuzhiyun struct drm_connector *connector)
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun struct innolux_panel *innolux = to_innolux_panel(panel);
389*4882a593Smuzhiyun const struct drm_display_mode *m = innolux->desc->mode;
390*4882a593Smuzhiyun struct drm_display_mode *mode;
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun mode = drm_mode_duplicate(connector->dev, m);
393*4882a593Smuzhiyun if (!mode) {
394*4882a593Smuzhiyun dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
395*4882a593Smuzhiyun m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
396*4882a593Smuzhiyun return -ENOMEM;
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun drm_mode_set_name(mode);
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun drm_mode_probed_add(connector, mode);
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun connector->display_info.width_mm = innolux->desc->size.width;
404*4882a593Smuzhiyun connector->display_info.height_mm = innolux->desc->size.height;
405*4882a593Smuzhiyun connector->display_info.bpc = innolux->desc->bpc;
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun return 1;
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun static const struct drm_panel_funcs innolux_panel_funcs = {
411*4882a593Smuzhiyun .disable = innolux_panel_disable,
412*4882a593Smuzhiyun .unprepare = innolux_panel_unprepare,
413*4882a593Smuzhiyun .prepare = innolux_panel_prepare,
414*4882a593Smuzhiyun .enable = innolux_panel_enable,
415*4882a593Smuzhiyun .get_modes = innolux_panel_get_modes,
416*4882a593Smuzhiyun };
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun static const struct of_device_id innolux_of_match[] = {
419*4882a593Smuzhiyun { .compatible = "innolux,p079zca",
420*4882a593Smuzhiyun .data = &innolux_p079zca_panel_desc
421*4882a593Smuzhiyun },
422*4882a593Smuzhiyun { .compatible = "innolux,p097pfg",
423*4882a593Smuzhiyun .data = &innolux_p097pfg_panel_desc
424*4882a593Smuzhiyun },
425*4882a593Smuzhiyun { }
426*4882a593Smuzhiyun };
427*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, innolux_of_match);
428*4882a593Smuzhiyun
innolux_panel_add(struct mipi_dsi_device * dsi,const struct panel_desc * desc)429*4882a593Smuzhiyun static int innolux_panel_add(struct mipi_dsi_device *dsi,
430*4882a593Smuzhiyun const struct panel_desc *desc)
431*4882a593Smuzhiyun {
432*4882a593Smuzhiyun struct innolux_panel *innolux;
433*4882a593Smuzhiyun struct device *dev = &dsi->dev;
434*4882a593Smuzhiyun int err, i;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun innolux = devm_kzalloc(dev, sizeof(*innolux), GFP_KERNEL);
437*4882a593Smuzhiyun if (!innolux)
438*4882a593Smuzhiyun return -ENOMEM;
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun innolux->desc = desc;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun innolux->supplies = devm_kcalloc(dev, desc->num_supplies,
443*4882a593Smuzhiyun sizeof(*innolux->supplies),
444*4882a593Smuzhiyun GFP_KERNEL);
445*4882a593Smuzhiyun if (!innolux->supplies)
446*4882a593Smuzhiyun return -ENOMEM;
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun for (i = 0; i < desc->num_supplies; i++)
449*4882a593Smuzhiyun innolux->supplies[i].supply = desc->supply_names[i];
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun err = devm_regulator_bulk_get(dev, desc->num_supplies,
452*4882a593Smuzhiyun innolux->supplies);
453*4882a593Smuzhiyun if (err < 0)
454*4882a593Smuzhiyun return err;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun innolux->enable_gpio = devm_gpiod_get_optional(dev, "enable",
457*4882a593Smuzhiyun GPIOD_OUT_HIGH);
458*4882a593Smuzhiyun if (IS_ERR(innolux->enable_gpio)) {
459*4882a593Smuzhiyun err = PTR_ERR(innolux->enable_gpio);
460*4882a593Smuzhiyun dev_dbg(dev, "failed to get enable gpio: %d\n", err);
461*4882a593Smuzhiyun innolux->enable_gpio = NULL;
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun drm_panel_init(&innolux->base, dev, &innolux_panel_funcs,
465*4882a593Smuzhiyun DRM_MODE_CONNECTOR_DSI);
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun err = drm_panel_of_backlight(&innolux->base);
468*4882a593Smuzhiyun if (err)
469*4882a593Smuzhiyun return err;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun drm_panel_add(&innolux->base);
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun mipi_dsi_set_drvdata(dsi, innolux);
474*4882a593Smuzhiyun innolux->link = dsi;
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun return 0;
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun
innolux_panel_del(struct innolux_panel * innolux)479*4882a593Smuzhiyun static void innolux_panel_del(struct innolux_panel *innolux)
480*4882a593Smuzhiyun {
481*4882a593Smuzhiyun drm_panel_remove(&innolux->base);
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun
innolux_panel_probe(struct mipi_dsi_device * dsi)484*4882a593Smuzhiyun static int innolux_panel_probe(struct mipi_dsi_device *dsi)
485*4882a593Smuzhiyun {
486*4882a593Smuzhiyun const struct panel_desc *desc;
487*4882a593Smuzhiyun struct innolux_panel *innolux;
488*4882a593Smuzhiyun int err;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun desc = of_device_get_match_data(&dsi->dev);
491*4882a593Smuzhiyun dsi->mode_flags = desc->flags;
492*4882a593Smuzhiyun dsi->format = desc->format;
493*4882a593Smuzhiyun dsi->lanes = desc->lanes;
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun err = innolux_panel_add(dsi, desc);
496*4882a593Smuzhiyun if (err < 0)
497*4882a593Smuzhiyun return err;
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun err = mipi_dsi_attach(dsi);
500*4882a593Smuzhiyun if (err < 0) {
501*4882a593Smuzhiyun innolux = mipi_dsi_get_drvdata(dsi);
502*4882a593Smuzhiyun innolux_panel_del(innolux);
503*4882a593Smuzhiyun return err;
504*4882a593Smuzhiyun }
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun return 0;
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun
innolux_panel_remove(struct mipi_dsi_device * dsi)509*4882a593Smuzhiyun static int innolux_panel_remove(struct mipi_dsi_device *dsi)
510*4882a593Smuzhiyun {
511*4882a593Smuzhiyun struct innolux_panel *innolux = mipi_dsi_get_drvdata(dsi);
512*4882a593Smuzhiyun int err;
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun err = drm_panel_unprepare(&innolux->base);
515*4882a593Smuzhiyun if (err < 0)
516*4882a593Smuzhiyun dev_err(&dsi->dev, "failed to unprepare panel: %d\n", err);
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun err = drm_panel_disable(&innolux->base);
519*4882a593Smuzhiyun if (err < 0)
520*4882a593Smuzhiyun dev_err(&dsi->dev, "failed to disable panel: %d\n", err);
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun err = mipi_dsi_detach(dsi);
523*4882a593Smuzhiyun if (err < 0)
524*4882a593Smuzhiyun dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun innolux_panel_del(innolux);
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun return 0;
529*4882a593Smuzhiyun }
530*4882a593Smuzhiyun
innolux_panel_shutdown(struct mipi_dsi_device * dsi)531*4882a593Smuzhiyun static void innolux_panel_shutdown(struct mipi_dsi_device *dsi)
532*4882a593Smuzhiyun {
533*4882a593Smuzhiyun struct innolux_panel *innolux = mipi_dsi_get_drvdata(dsi);
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun drm_panel_unprepare(&innolux->base);
536*4882a593Smuzhiyun drm_panel_disable(&innolux->base);
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun static struct mipi_dsi_driver innolux_panel_driver = {
540*4882a593Smuzhiyun .driver = {
541*4882a593Smuzhiyun .name = "panel-innolux-p079zca",
542*4882a593Smuzhiyun .of_match_table = innolux_of_match,
543*4882a593Smuzhiyun },
544*4882a593Smuzhiyun .probe = innolux_panel_probe,
545*4882a593Smuzhiyun .remove = innolux_panel_remove,
546*4882a593Smuzhiyun .shutdown = innolux_panel_shutdown,
547*4882a593Smuzhiyun };
548*4882a593Smuzhiyun module_mipi_dsi_driver(innolux_panel_driver);
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
551*4882a593Smuzhiyun MODULE_AUTHOR("Lin Huang <hl@rock-chips.com>");
552*4882a593Smuzhiyun MODULE_DESCRIPTION("Innolux P079ZCA panel driver");
553*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
554