1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Elida kd35t133 5.5" MIPI-DSI panel driver
4*4882a593Smuzhiyun * Copyright (C) 2020 Theobroma Systems Design und Consulting GmbH
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * based on
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Rockteck jh057n00900 5.5" MIPI-DSI panel driver
9*4882a593Smuzhiyun * Copyright (C) Purism SPC 2019
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/delay.h>
13*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
14*4882a593Smuzhiyun #include <linux/media-bus-format.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/of.h>
17*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <video/display_timing.h>
20*4882a593Smuzhiyun #include <video/mipi_display.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include <drm/drm_mipi_dsi.h>
23*4882a593Smuzhiyun #include <drm/drm_modes.h>
24*4882a593Smuzhiyun #include <drm/drm_panel.h>
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* Manufacturer specific Commands send via DSI */
27*4882a593Smuzhiyun #define KD35T133_CMD_INTERFACEMODECTRL 0xb0
28*4882a593Smuzhiyun #define KD35T133_CMD_FRAMERATECTRL 0xb1
29*4882a593Smuzhiyun #define KD35T133_CMD_DISPLAYINVERSIONCTRL 0xb4
30*4882a593Smuzhiyun #define KD35T133_CMD_DISPLAYFUNCTIONCTRL 0xb6
31*4882a593Smuzhiyun #define KD35T133_CMD_POWERCONTROL1 0xc0
32*4882a593Smuzhiyun #define KD35T133_CMD_POWERCONTROL2 0xc1
33*4882a593Smuzhiyun #define KD35T133_CMD_VCOMCONTROL 0xc5
34*4882a593Smuzhiyun #define KD35T133_CMD_POSITIVEGAMMA 0xe0
35*4882a593Smuzhiyun #define KD35T133_CMD_NEGATIVEGAMMA 0xe1
36*4882a593Smuzhiyun #define KD35T133_CMD_SETIMAGEFUNCTION 0xe9
37*4882a593Smuzhiyun #define KD35T133_CMD_ADJUSTCONTROL3 0xf7
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun struct kd35t133 {
40*4882a593Smuzhiyun struct device *dev;
41*4882a593Smuzhiyun struct drm_panel panel;
42*4882a593Smuzhiyun struct gpio_desc *reset_gpio;
43*4882a593Smuzhiyun struct regulator *vdd;
44*4882a593Smuzhiyun struct regulator *iovcc;
45*4882a593Smuzhiyun bool prepared;
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
panel_to_kd35t133(struct drm_panel * panel)48*4882a593Smuzhiyun static inline struct kd35t133 *panel_to_kd35t133(struct drm_panel *panel)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun return container_of(panel, struct kd35t133, panel);
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #define dsi_dcs_write_seq(dsi, cmd, seq...) do { \
54*4882a593Smuzhiyun static const u8 b[] = { cmd, seq }; \
55*4882a593Smuzhiyun int ret; \
56*4882a593Smuzhiyun ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
57*4882a593Smuzhiyun if (ret < 0) \
58*4882a593Smuzhiyun return ret; \
59*4882a593Smuzhiyun } while (0)
60*4882a593Smuzhiyun
kd35t133_init_sequence(struct kd35t133 * ctx)61*4882a593Smuzhiyun static int kd35t133_init_sequence(struct kd35t133 *ctx)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
64*4882a593Smuzhiyun struct device *dev = ctx->dev;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /*
67*4882a593Smuzhiyun * Init sequence was supplied by the panel vendor with minimal
68*4882a593Smuzhiyun * documentation.
69*4882a593Smuzhiyun */
70*4882a593Smuzhiyun dsi_dcs_write_seq(dsi, KD35T133_CMD_POSITIVEGAMMA,
71*4882a593Smuzhiyun 0x00, 0x13, 0x18, 0x04, 0x0f, 0x06, 0x3a, 0x56,
72*4882a593Smuzhiyun 0x4d, 0x03, 0x0a, 0x06, 0x30, 0x3e, 0x0f);
73*4882a593Smuzhiyun dsi_dcs_write_seq(dsi, KD35T133_CMD_NEGATIVEGAMMA,
74*4882a593Smuzhiyun 0x00, 0x13, 0x18, 0x01, 0x11, 0x06, 0x38, 0x34,
75*4882a593Smuzhiyun 0x4d, 0x06, 0x0d, 0x0b, 0x31, 0x37, 0x0f);
76*4882a593Smuzhiyun dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL1, 0x18, 0x17);
77*4882a593Smuzhiyun dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL2, 0x41);
78*4882a593Smuzhiyun dsi_dcs_write_seq(dsi, KD35T133_CMD_VCOMCONTROL, 0x00, 0x1a, 0x80);
79*4882a593Smuzhiyun dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x48);
80*4882a593Smuzhiyun dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
81*4882a593Smuzhiyun dsi_dcs_write_seq(dsi, KD35T133_CMD_INTERFACEMODECTRL, 0x00);
82*4882a593Smuzhiyun dsi_dcs_write_seq(dsi, KD35T133_CMD_FRAMERATECTRL, 0xa0);
83*4882a593Smuzhiyun dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYINVERSIONCTRL, 0x02);
84*4882a593Smuzhiyun dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYFUNCTIONCTRL,
85*4882a593Smuzhiyun 0x20, 0x02);
86*4882a593Smuzhiyun dsi_dcs_write_seq(dsi, KD35T133_CMD_SETIMAGEFUNCTION, 0x00);
87*4882a593Smuzhiyun dsi_dcs_write_seq(dsi, KD35T133_CMD_ADJUSTCONTROL3,
88*4882a593Smuzhiyun 0xa9, 0x51, 0x2c, 0x82);
89*4882a593Smuzhiyun mipi_dsi_dcs_write(dsi, MIPI_DCS_ENTER_INVERT_MODE, NULL, 0);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun dev_dbg(dev, "Panel init sequence done\n");
92*4882a593Smuzhiyun return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
kd35t133_unprepare(struct drm_panel * panel)95*4882a593Smuzhiyun static int kd35t133_unprepare(struct drm_panel *panel)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun struct kd35t133 *ctx = panel_to_kd35t133(panel);
98*4882a593Smuzhiyun struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
99*4882a593Smuzhiyun int ret;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun if (!ctx->prepared)
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun ret = mipi_dsi_dcs_set_display_off(dsi);
105*4882a593Smuzhiyun if (ret < 0)
106*4882a593Smuzhiyun dev_err(ctx->dev, "failed to set display off: %d\n", ret);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
109*4882a593Smuzhiyun if (ret < 0) {
110*4882a593Smuzhiyun dev_err(ctx->dev, "failed to enter sleep mode: %d\n", ret);
111*4882a593Smuzhiyun return ret;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun regulator_disable(ctx->iovcc);
115*4882a593Smuzhiyun regulator_disable(ctx->vdd);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun ctx->prepared = false;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun return 0;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
kd35t133_prepare(struct drm_panel * panel)122*4882a593Smuzhiyun static int kd35t133_prepare(struct drm_panel *panel)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun struct kd35t133 *ctx = panel_to_kd35t133(panel);
125*4882a593Smuzhiyun struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
126*4882a593Smuzhiyun int ret;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun if (ctx->prepared)
129*4882a593Smuzhiyun return 0;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun dev_dbg(ctx->dev, "Resetting the panel\n");
132*4882a593Smuzhiyun ret = regulator_enable(ctx->vdd);
133*4882a593Smuzhiyun if (ret < 0) {
134*4882a593Smuzhiyun dev_err(ctx->dev, "Failed to enable vdd supply: %d\n", ret);
135*4882a593Smuzhiyun return ret;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun ret = regulator_enable(ctx->iovcc);
139*4882a593Smuzhiyun if (ret < 0) {
140*4882a593Smuzhiyun dev_err(ctx->dev, "Failed to enable iovcc supply: %d\n", ret);
141*4882a593Smuzhiyun goto disable_vdd;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun msleep(20);
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun gpiod_set_value_cansleep(ctx->reset_gpio, 1);
147*4882a593Smuzhiyun usleep_range(10, 20);
148*4882a593Smuzhiyun gpiod_set_value_cansleep(ctx->reset_gpio, 0);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun msleep(20);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
153*4882a593Smuzhiyun if (ret < 0) {
154*4882a593Smuzhiyun dev_err(ctx->dev, "Failed to exit sleep mode: %d\n", ret);
155*4882a593Smuzhiyun goto disable_iovcc;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun msleep(250);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun ret = kd35t133_init_sequence(ctx);
161*4882a593Smuzhiyun if (ret < 0) {
162*4882a593Smuzhiyun dev_err(ctx->dev, "Panel init sequence failed: %d\n", ret);
163*4882a593Smuzhiyun goto disable_iovcc;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun ret = mipi_dsi_dcs_set_display_on(dsi);
167*4882a593Smuzhiyun if (ret < 0) {
168*4882a593Smuzhiyun dev_err(ctx->dev, "Failed to set display on: %d\n", ret);
169*4882a593Smuzhiyun goto disable_iovcc;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun msleep(50);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun ctx->prepared = true;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun return 0;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun disable_iovcc:
179*4882a593Smuzhiyun regulator_disable(ctx->iovcc);
180*4882a593Smuzhiyun disable_vdd:
181*4882a593Smuzhiyun regulator_disable(ctx->vdd);
182*4882a593Smuzhiyun return ret;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun static const struct drm_display_mode default_mode = {
186*4882a593Smuzhiyun .hdisplay = 320,
187*4882a593Smuzhiyun .hsync_start = 320 + 130,
188*4882a593Smuzhiyun .hsync_end = 320 + 130 + 4,
189*4882a593Smuzhiyun .htotal = 320 + 130 + 4 + 130,
190*4882a593Smuzhiyun .vdisplay = 480,
191*4882a593Smuzhiyun .vsync_start = 480 + 2,
192*4882a593Smuzhiyun .vsync_end = 480 + 2 + 1,
193*4882a593Smuzhiyun .vtotal = 480 + 2 + 1 + 2,
194*4882a593Smuzhiyun .clock = 17000,
195*4882a593Smuzhiyun .width_mm = 42,
196*4882a593Smuzhiyun .height_mm = 82,
197*4882a593Smuzhiyun };
198*4882a593Smuzhiyun
kd35t133_get_modes(struct drm_panel * panel,struct drm_connector * connector)199*4882a593Smuzhiyun static int kd35t133_get_modes(struct drm_panel *panel,
200*4882a593Smuzhiyun struct drm_connector *connector)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun struct kd35t133 *ctx = panel_to_kd35t133(panel);
203*4882a593Smuzhiyun struct drm_display_mode *mode;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun mode = drm_mode_duplicate(connector->dev, &default_mode);
206*4882a593Smuzhiyun if (!mode) {
207*4882a593Smuzhiyun dev_err(ctx->dev, "Failed to add mode %ux%u@%u\n",
208*4882a593Smuzhiyun default_mode.hdisplay, default_mode.vdisplay,
209*4882a593Smuzhiyun drm_mode_vrefresh(&default_mode));
210*4882a593Smuzhiyun return -ENOMEM;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun drm_mode_set_name(mode);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
216*4882a593Smuzhiyun connector->display_info.width_mm = mode->width_mm;
217*4882a593Smuzhiyun connector->display_info.height_mm = mode->height_mm;
218*4882a593Smuzhiyun drm_mode_probed_add(connector, mode);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun return 1;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun static const struct drm_panel_funcs kd35t133_funcs = {
224*4882a593Smuzhiyun .unprepare = kd35t133_unprepare,
225*4882a593Smuzhiyun .prepare = kd35t133_prepare,
226*4882a593Smuzhiyun .get_modes = kd35t133_get_modes,
227*4882a593Smuzhiyun };
228*4882a593Smuzhiyun
kd35t133_probe(struct mipi_dsi_device * dsi)229*4882a593Smuzhiyun static int kd35t133_probe(struct mipi_dsi_device *dsi)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun struct device *dev = &dsi->dev;
232*4882a593Smuzhiyun struct kd35t133 *ctx;
233*4882a593Smuzhiyun int ret;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
236*4882a593Smuzhiyun if (!ctx)
237*4882a593Smuzhiyun return -ENOMEM;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
240*4882a593Smuzhiyun if (IS_ERR(ctx->reset_gpio)) {
241*4882a593Smuzhiyun dev_err(dev, "cannot get reset gpio\n");
242*4882a593Smuzhiyun return PTR_ERR(ctx->reset_gpio);
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun ctx->vdd = devm_regulator_get(dev, "vdd");
246*4882a593Smuzhiyun if (IS_ERR(ctx->vdd)) {
247*4882a593Smuzhiyun ret = PTR_ERR(ctx->vdd);
248*4882a593Smuzhiyun if (ret != -EPROBE_DEFER)
249*4882a593Smuzhiyun dev_err(dev, "Failed to request vdd regulator: %d\n", ret);
250*4882a593Smuzhiyun return ret;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun ctx->iovcc = devm_regulator_get(dev, "iovcc");
254*4882a593Smuzhiyun if (IS_ERR(ctx->iovcc)) {
255*4882a593Smuzhiyun ret = PTR_ERR(ctx->iovcc);
256*4882a593Smuzhiyun if (ret != -EPROBE_DEFER)
257*4882a593Smuzhiyun dev_err(dev, "Failed to request iovcc regulator: %d\n", ret);
258*4882a593Smuzhiyun return ret;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun mipi_dsi_set_drvdata(dsi, ctx);
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun ctx->dev = dev;
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun dsi->lanes = 1;
266*4882a593Smuzhiyun dsi->format = MIPI_DSI_FMT_RGB888;
267*4882a593Smuzhiyun dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
268*4882a593Smuzhiyun MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET |
269*4882a593Smuzhiyun MIPI_DSI_CLOCK_NON_CONTINUOUS;
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun drm_panel_init(&ctx->panel, &dsi->dev, &kd35t133_funcs,
272*4882a593Smuzhiyun DRM_MODE_CONNECTOR_DSI);
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun ret = drm_panel_of_backlight(&ctx->panel);
275*4882a593Smuzhiyun if (ret)
276*4882a593Smuzhiyun return ret;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun drm_panel_add(&ctx->panel);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun ret = mipi_dsi_attach(dsi);
281*4882a593Smuzhiyun if (ret < 0) {
282*4882a593Smuzhiyun dev_err(dev, "mipi_dsi_attach failed: %d\n", ret);
283*4882a593Smuzhiyun drm_panel_remove(&ctx->panel);
284*4882a593Smuzhiyun return ret;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun return 0;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
kd35t133_shutdown(struct mipi_dsi_device * dsi)290*4882a593Smuzhiyun static void kd35t133_shutdown(struct mipi_dsi_device *dsi)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun struct kd35t133 *ctx = mipi_dsi_get_drvdata(dsi);
293*4882a593Smuzhiyun int ret;
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun ret = drm_panel_unprepare(&ctx->panel);
296*4882a593Smuzhiyun if (ret < 0)
297*4882a593Smuzhiyun dev_err(&dsi->dev, "Failed to unprepare panel: %d\n", ret);
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun ret = drm_panel_disable(&ctx->panel);
300*4882a593Smuzhiyun if (ret < 0)
301*4882a593Smuzhiyun dev_err(&dsi->dev, "Failed to disable panel: %d\n", ret);
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
kd35t133_remove(struct mipi_dsi_device * dsi)304*4882a593Smuzhiyun static int kd35t133_remove(struct mipi_dsi_device *dsi)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun struct kd35t133 *ctx = mipi_dsi_get_drvdata(dsi);
307*4882a593Smuzhiyun int ret;
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun kd35t133_shutdown(dsi);
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun ret = mipi_dsi_detach(dsi);
312*4882a593Smuzhiyun if (ret < 0)
313*4882a593Smuzhiyun dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun drm_panel_remove(&ctx->panel);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun return 0;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun static const struct of_device_id kd35t133_of_match[] = {
321*4882a593Smuzhiyun { .compatible = "elida,kd35t133" },
322*4882a593Smuzhiyun { /* sentinel */ }
323*4882a593Smuzhiyun };
324*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, kd35t133_of_match);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun static struct mipi_dsi_driver kd35t133_driver = {
327*4882a593Smuzhiyun .driver = {
328*4882a593Smuzhiyun .name = "panel-elida-kd35t133",
329*4882a593Smuzhiyun .of_match_table = kd35t133_of_match,
330*4882a593Smuzhiyun },
331*4882a593Smuzhiyun .probe = kd35t133_probe,
332*4882a593Smuzhiyun .remove = kd35t133_remove,
333*4882a593Smuzhiyun .shutdown = kd35t133_shutdown,
334*4882a593Smuzhiyun };
335*4882a593Smuzhiyun module_mipi_dsi_driver(kd35t133_driver);
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun MODULE_AUTHOR("Heiko Stuebner <heiko.stuebner@theobroma-systems.com>");
338*4882a593Smuzhiyun MODULE_DESCRIPTION("DRM driver for Elida kd35t133 MIPI DSI panel");
339*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
340