1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
3*4882a593Smuzhiyun * Author: Rob Clark <rob@ti.com>
4*4882a593Smuzhiyun * Andy Gross <andy.gross@ti.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or
7*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as
8*4882a593Smuzhiyun * published by the Free Software Foundation version 2.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11*4882a593Smuzhiyun * kind, whether express or implied; without even the implied warranty
12*4882a593Smuzhiyun * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13*4882a593Smuzhiyun * GNU General Public License for more details.
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun #ifndef OMAP_DMM_TILER_H
16*4882a593Smuzhiyun #define OMAP_DMM_TILER_H
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include "omap_drv.h"
19*4882a593Smuzhiyun #include "tcm.h"
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun enum tiler_fmt {
22*4882a593Smuzhiyun TILFMT_8BIT = 0,
23*4882a593Smuzhiyun TILFMT_16BIT,
24*4882a593Smuzhiyun TILFMT_32BIT,
25*4882a593Smuzhiyun TILFMT_PAGE,
26*4882a593Smuzhiyun TILFMT_NFORMATS
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun struct pat_area {
30*4882a593Smuzhiyun u32 x0:8;
31*4882a593Smuzhiyun u32 y0:8;
32*4882a593Smuzhiyun u32 x1:8;
33*4882a593Smuzhiyun u32 y1:8;
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun struct tiler_block {
37*4882a593Smuzhiyun struct list_head alloc_node; /* node for global block list */
38*4882a593Smuzhiyun struct tcm_area area; /* area */
39*4882a593Smuzhiyun enum tiler_fmt fmt; /* format */
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* bits representing the same slot in DMM-TILER hw-block */
43*4882a593Smuzhiyun #define SLOT_WIDTH_BITS 6
44*4882a593Smuzhiyun #define SLOT_HEIGHT_BITS 6
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /* bits reserved to describe coordinates in DMM-TILER hw-block */
47*4882a593Smuzhiyun #define CONT_WIDTH_BITS 14
48*4882a593Smuzhiyun #define CONT_HEIGHT_BITS 13
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /* calculated constants */
51*4882a593Smuzhiyun #define TILER_PAGE (1 << (SLOT_WIDTH_BITS + SLOT_HEIGHT_BITS))
52*4882a593Smuzhiyun #define TILER_WIDTH (1 << (CONT_WIDTH_BITS - SLOT_WIDTH_BITS))
53*4882a593Smuzhiyun #define TILER_HEIGHT (1 << (CONT_HEIGHT_BITS - SLOT_HEIGHT_BITS))
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /*
56*4882a593Smuzhiyun Table 15-11. Coding and Description of TILER Orientations
57*4882a593Smuzhiyun S Y X Description Alternate description
58*4882a593Smuzhiyun 0 0 0 0-degree view Natural view
59*4882a593Smuzhiyun 0 0 1 0-degree view with vertical mirror 180-degree view with horizontal mirror
60*4882a593Smuzhiyun 0 1 0 0-degree view with horizontal mirror 180-degree view with vertical mirror
61*4882a593Smuzhiyun 0 1 1 180-degree view
62*4882a593Smuzhiyun 1 0 0 90-degree view with vertical mirror 270-degree view with horizontal mirror
63*4882a593Smuzhiyun 1 0 1 270-degree view
64*4882a593Smuzhiyun 1 1 0 90-degree view
65*4882a593Smuzhiyun 1 1 1 90-degree view with horizontal mirror 270-degree view with vertical mirror
66*4882a593Smuzhiyun */
67*4882a593Smuzhiyun #define MASK_XY_FLIP (1 << 31)
68*4882a593Smuzhiyun #define MASK_Y_INVERT (1 << 30)
69*4882a593Smuzhiyun #define MASK_X_INVERT (1 << 29)
70*4882a593Smuzhiyun #define SHIFT_ACC_MODE 27
71*4882a593Smuzhiyun #define MASK_ACC_MODE 3
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun #define MASK(bits) ((1 << (bits)) - 1)
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun #define TILVIEW_8BIT 0x60000000u
76*4882a593Smuzhiyun #define TILVIEW_16BIT (TILVIEW_8BIT + VIEW_SIZE)
77*4882a593Smuzhiyun #define TILVIEW_32BIT (TILVIEW_16BIT + VIEW_SIZE)
78*4882a593Smuzhiyun #define TILVIEW_PAGE (TILVIEW_32BIT + VIEW_SIZE)
79*4882a593Smuzhiyun #define TILVIEW_END (TILVIEW_PAGE + VIEW_SIZE)
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /* create tsptr by adding view orientation and access mode */
82*4882a593Smuzhiyun #define TIL_ADDR(x, orient, a)\
83*4882a593Smuzhiyun ((u32) (x) | (orient) | ((a) << SHIFT_ACC_MODE))
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_FS
86*4882a593Smuzhiyun int tiler_map_show(struct seq_file *s, void *arg);
87*4882a593Smuzhiyun #endif
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun /* pin/unpin */
90*4882a593Smuzhiyun int tiler_pin(struct tiler_block *block, struct page **pages,
91*4882a593Smuzhiyun u32 npages, u32 roll, bool wait);
92*4882a593Smuzhiyun int tiler_unpin(struct tiler_block *block);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /* reserve/release */
95*4882a593Smuzhiyun struct tiler_block *tiler_reserve_2d(enum tiler_fmt fmt, u16 w, u16 h,
96*4882a593Smuzhiyun u16 align);
97*4882a593Smuzhiyun struct tiler_block *tiler_reserve_1d(size_t size);
98*4882a593Smuzhiyun int tiler_release(struct tiler_block *block);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /* utilities */
101*4882a593Smuzhiyun dma_addr_t tiler_ssptr(struct tiler_block *block);
102*4882a593Smuzhiyun dma_addr_t tiler_tsptr(struct tiler_block *block, u32 orient,
103*4882a593Smuzhiyun u32 x, u32 y);
104*4882a593Smuzhiyun u32 tiler_stride(enum tiler_fmt fmt, u32 orient);
105*4882a593Smuzhiyun size_t tiler_size(enum tiler_fmt fmt, u16 w, u16 h);
106*4882a593Smuzhiyun size_t tiler_vsize(enum tiler_fmt fmt, u16 w, u16 h);
107*4882a593Smuzhiyun void tiler_align(enum tiler_fmt fmt, u16 *w, u16 *h);
108*4882a593Smuzhiyun u32 tiler_get_cpu_cache_flags(void);
109*4882a593Smuzhiyun bool dmm_is_available(void);
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun extern struct platform_driver omap_dmm_driver;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /* GEM bo flags -> tiler fmt */
gem2fmt(u32 flags)114*4882a593Smuzhiyun static inline enum tiler_fmt gem2fmt(u32 flags)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun switch (flags & OMAP_BO_TILED_MASK) {
117*4882a593Smuzhiyun case OMAP_BO_TILED_8:
118*4882a593Smuzhiyun return TILFMT_8BIT;
119*4882a593Smuzhiyun case OMAP_BO_TILED_16:
120*4882a593Smuzhiyun return TILFMT_16BIT;
121*4882a593Smuzhiyun case OMAP_BO_TILED_32:
122*4882a593Smuzhiyun return TILFMT_32BIT;
123*4882a593Smuzhiyun default:
124*4882a593Smuzhiyun return TILFMT_PAGE;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
validfmt(enum tiler_fmt fmt)128*4882a593Smuzhiyun static inline bool validfmt(enum tiler_fmt fmt)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun switch (fmt) {
131*4882a593Smuzhiyun case TILFMT_8BIT:
132*4882a593Smuzhiyun case TILFMT_16BIT:
133*4882a593Smuzhiyun case TILFMT_32BIT:
134*4882a593Smuzhiyun case TILFMT_PAGE:
135*4882a593Smuzhiyun return true;
136*4882a593Smuzhiyun default:
137*4882a593Smuzhiyun return false;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun #endif
142