1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * HDMI header definition for OMAP4 HDMI CEC IP
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright 2016-2017 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This program is free software; you may redistribute it and/or modify
7*4882a593Smuzhiyun * it under the terms of the GNU General Public License as published by
8*4882a593Smuzhiyun * the Free Software Foundation; version 2 of the License.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17*4882a593Smuzhiyun * SOFTWARE.
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #ifndef _HDMI4_CEC_H_
21*4882a593Smuzhiyun #define _HDMI4_CEC_H_
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun struct hdmi_core_data;
24*4882a593Smuzhiyun struct hdmi_wp_data;
25*4882a593Smuzhiyun struct platform_device;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* HDMI CEC funcs */
28*4882a593Smuzhiyun #ifdef CONFIG_OMAP4_DSS_HDMI_CEC
29*4882a593Smuzhiyun void hdmi4_cec_set_phys_addr(struct hdmi_core_data *core, u16 pa);
30*4882a593Smuzhiyun void hdmi4_cec_irq(struct hdmi_core_data *core);
31*4882a593Smuzhiyun int hdmi4_cec_init(struct platform_device *pdev, struct hdmi_core_data *core,
32*4882a593Smuzhiyun struct hdmi_wp_data *wp);
33*4882a593Smuzhiyun void hdmi4_cec_uninit(struct hdmi_core_data *core);
34*4882a593Smuzhiyun #else
hdmi4_cec_set_phys_addr(struct hdmi_core_data * core,u16 pa)35*4882a593Smuzhiyun static inline void hdmi4_cec_set_phys_addr(struct hdmi_core_data *core, u16 pa)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
hdmi4_cec_irq(struct hdmi_core_data * core)39*4882a593Smuzhiyun static inline void hdmi4_cec_irq(struct hdmi_core_data *core)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
hdmi4_cec_init(struct platform_device * pdev,struct hdmi_core_data * core,struct hdmi_wp_data * wp)43*4882a593Smuzhiyun static inline int hdmi4_cec_init(struct platform_device *pdev,
44*4882a593Smuzhiyun struct hdmi_core_data *core,
45*4882a593Smuzhiyun struct hdmi_wp_data *wp)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun return 0;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
hdmi4_cec_uninit(struct hdmi_core_data * core)50*4882a593Smuzhiyun static inline void hdmi4_cec_uninit(struct hdmi_core_data *core)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun #endif
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #endif
56