xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nv50_fbcon.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2010 Red Hat Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun  * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*4882a593Smuzhiyun  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4882a593Smuzhiyun  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4882a593Smuzhiyun  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4882a593Smuzhiyun  * OTHER DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  * Authors: Ben Skeggs
23*4882a593Smuzhiyun  */
24*4882a593Smuzhiyun #define NVIF_DEBUG_PRINT_DISABLE
25*4882a593Smuzhiyun #include "nouveau_drv.h"
26*4882a593Smuzhiyun #include "nouveau_dma.h"
27*4882a593Smuzhiyun #include "nouveau_fbcon.h"
28*4882a593Smuzhiyun #include "nouveau_vmm.h"
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include <nvif/push206e.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #include <nvhw/class/cl502d.h>
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun int
nv50_fbcon_fillrect(struct fb_info * info,const struct fb_fillrect * rect)35*4882a593Smuzhiyun nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	struct nouveau_fbdev *nfbdev = info->par;
38*4882a593Smuzhiyun 	struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
39*4882a593Smuzhiyun 	struct nouveau_channel *chan = drm->channel;
40*4882a593Smuzhiyun 	struct nvif_push *push = chan->chan.push;
41*4882a593Smuzhiyun 	u32 colour;
42*4882a593Smuzhiyun 	int ret;
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
45*4882a593Smuzhiyun 	    info->fix.visual == FB_VISUAL_DIRECTCOLOR)
46*4882a593Smuzhiyun 		colour = ((uint32_t *)info->pseudo_palette)[rect->color];
47*4882a593Smuzhiyun 	else
48*4882a593Smuzhiyun 		colour = rect->color;
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	ret = PUSH_WAIT(push, rect->rop == ROP_COPY ? 7 : 11);
51*4882a593Smuzhiyun 	if (ret)
52*4882a593Smuzhiyun 		return ret;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	if (rect->rop != ROP_COPY) {
55*4882a593Smuzhiyun 		PUSH_MTHD(push, NV502D, SET_OPERATION,
56*4882a593Smuzhiyun 			  NVDEF(NV502D, SET_OPERATION, V, ROP_AND));
57*4882a593Smuzhiyun 	}
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_RENDER_SOLID_PRIM_COLOR, colour);
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, RENDER_SOLID_PRIM_POINT_SET_X(0), rect->dx,
62*4882a593Smuzhiyun 				RENDER_SOLID_PRIM_POINT_Y(0), rect->dy,
63*4882a593Smuzhiyun 				RENDER_SOLID_PRIM_POINT_SET_X(1), rect->dx + rect->width,
64*4882a593Smuzhiyun 				RENDER_SOLID_PRIM_POINT_Y(1), rect->dy + rect->height);
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	if (rect->rop != ROP_COPY) {
67*4882a593Smuzhiyun 		PUSH_MTHD(push, NV502D, SET_OPERATION,
68*4882a593Smuzhiyun 			  NVDEF(NV502D, SET_OPERATION, V, SRCCOPY));
69*4882a593Smuzhiyun 	}
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	PUSH_KICK(push);
72*4882a593Smuzhiyun 	return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun int
nv50_fbcon_copyarea(struct fb_info * info,const struct fb_copyarea * region)76*4882a593Smuzhiyun nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun 	struct nouveau_fbdev *nfbdev = info->par;
79*4882a593Smuzhiyun 	struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
80*4882a593Smuzhiyun 	struct nouveau_channel *chan = drm->channel;
81*4882a593Smuzhiyun 	struct nvif_push *push = chan->chan.push;
82*4882a593Smuzhiyun 	int ret;
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	ret = PUSH_WAIT(push, 12);
85*4882a593Smuzhiyun 	if (ret)
86*4882a593Smuzhiyun 		return ret;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, WAIT_FOR_IDLE, 0);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_MEMORY_DST_X0, region->dx,
91*4882a593Smuzhiyun 				SET_PIXELS_FROM_MEMORY_DST_Y0, region->dy,
92*4882a593Smuzhiyun 				SET_PIXELS_FROM_MEMORY_DST_WIDTH, region->width,
93*4882a593Smuzhiyun 				SET_PIXELS_FROM_MEMORY_DST_HEIGHT, region->height);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_MEMORY_SRC_X0_FRAC, 0,
96*4882a593Smuzhiyun 				SET_PIXELS_FROM_MEMORY_SRC_X0_INT, region->sx,
97*4882a593Smuzhiyun 				SET_PIXELS_FROM_MEMORY_SRC_Y0_FRAC, 0,
98*4882a593Smuzhiyun 				PIXELS_FROM_MEMORY_SRC_Y0_INT, region->sy);
99*4882a593Smuzhiyun 	PUSH_KICK(push);
100*4882a593Smuzhiyun 	return 0;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun int
nv50_fbcon_imageblit(struct fb_info * info,const struct fb_image * image)104*4882a593Smuzhiyun nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun 	struct nouveau_fbdev *nfbdev = info->par;
107*4882a593Smuzhiyun 	struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
108*4882a593Smuzhiyun 	struct nouveau_channel *chan = drm->channel;
109*4882a593Smuzhiyun 	struct nvif_push *push = chan->chan.push;
110*4882a593Smuzhiyun 	uint32_t dwords, *data = (uint32_t *)image->data;
111*4882a593Smuzhiyun 	uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
112*4882a593Smuzhiyun 	uint32_t *palette = info->pseudo_palette, bg, fg;
113*4882a593Smuzhiyun 	int ret;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	if (image->depth != 1)
116*4882a593Smuzhiyun 		return -ENODEV;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
119*4882a593Smuzhiyun 	    info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
120*4882a593Smuzhiyun 		bg = palette[image->bg_color] | mask;
121*4882a593Smuzhiyun 		fg = palette[image->fg_color] | mask;
122*4882a593Smuzhiyun 	} else {
123*4882a593Smuzhiyun 		bg = image->bg_color;
124*4882a593Smuzhiyun 		fg = image->fg_color;
125*4882a593Smuzhiyun 	}
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	ret = PUSH_WAIT(push, 11);
128*4882a593Smuzhiyun 	if (ret)
129*4882a593Smuzhiyun 		return ret;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_COLOR0, bg,
132*4882a593Smuzhiyun 				SET_PIXELS_FROM_CPU_COLOR1, fg);
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_SRC_WIDTH, image->width,
135*4882a593Smuzhiyun 				SET_PIXELS_FROM_CPU_SRC_HEIGHT, image->height);
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_DST_X0_FRAC, 0,
138*4882a593Smuzhiyun 				SET_PIXELS_FROM_CPU_DST_X0_INT, image->dx,
139*4882a593Smuzhiyun 				SET_PIXELS_FROM_CPU_DST_Y0_FRAC, 0,
140*4882a593Smuzhiyun 				SET_PIXELS_FROM_CPU_DST_Y0_INT, image->dy);
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	dwords = ALIGN(ALIGN(image->width, 8) * image->height, 32) >> 5;
143*4882a593Smuzhiyun 	while (dwords) {
144*4882a593Smuzhiyun 		int count = dwords > 2047 ? 2047 : dwords;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 		ret = PUSH_WAIT(push, count + 1);
147*4882a593Smuzhiyun 		if (ret)
148*4882a593Smuzhiyun 			return ret;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 		dwords -= count;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 		PUSH_NINC(push, NV502D, PIXELS_FROM_CPU_DATA, data, count);
153*4882a593Smuzhiyun 		data += count;
154*4882a593Smuzhiyun 	}
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	PUSH_KICK(push);
157*4882a593Smuzhiyun 	return 0;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun int
nv50_fbcon_accel_init(struct fb_info * info)161*4882a593Smuzhiyun nv50_fbcon_accel_init(struct fb_info *info)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	struct nouveau_fbdev *nfbdev = info->par;
164*4882a593Smuzhiyun 	struct drm_device *dev = nfbdev->helper.dev;
165*4882a593Smuzhiyun 	struct nouveau_drm *drm = nouveau_drm(dev);
166*4882a593Smuzhiyun 	struct nouveau_channel *chan = drm->channel;
167*4882a593Smuzhiyun 	struct nvif_push *push = chan->chan.push;
168*4882a593Smuzhiyun 	int ret, format;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	switch (info->var.bits_per_pixel) {
171*4882a593Smuzhiyun 	case 8:
172*4882a593Smuzhiyun 		format = NV502D_SET_DST_FORMAT_V_Y8;
173*4882a593Smuzhiyun 		break;
174*4882a593Smuzhiyun 	case 15:
175*4882a593Smuzhiyun 		format = NV502D_SET_DST_FORMAT_V_X1R5G5B5;
176*4882a593Smuzhiyun 		break;
177*4882a593Smuzhiyun 	case 16:
178*4882a593Smuzhiyun 		format = NV502D_SET_DST_FORMAT_V_R5G6B5;
179*4882a593Smuzhiyun 		break;
180*4882a593Smuzhiyun 	case 32:
181*4882a593Smuzhiyun 		switch (info->var.transp.length) {
182*4882a593Smuzhiyun 		case 0: /* depth 24 */
183*4882a593Smuzhiyun 		case 8: /* depth 32, just use 24.. */
184*4882a593Smuzhiyun 			format = NV502D_SET_DST_FORMAT_V_X8R8G8B8;
185*4882a593Smuzhiyun 			break;
186*4882a593Smuzhiyun 		case 2: /* depth 30 */
187*4882a593Smuzhiyun 			format = NV502D_SET_DST_FORMAT_V_A2B10G10R10;
188*4882a593Smuzhiyun 			break;
189*4882a593Smuzhiyun 		default:
190*4882a593Smuzhiyun 			return -EINVAL;
191*4882a593Smuzhiyun 		}
192*4882a593Smuzhiyun 		break;
193*4882a593Smuzhiyun 	default:
194*4882a593Smuzhiyun 		return -EINVAL;
195*4882a593Smuzhiyun 	}
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	ret = nvif_object_ctor(&chan->user, "fbconTwoD", 0x502d, 0x502d,
198*4882a593Smuzhiyun 			       NULL, 0, &nfbdev->twod);
199*4882a593Smuzhiyun 	if (ret)
200*4882a593Smuzhiyun 		return ret;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	ret = PUSH_WAIT(push, 56);
203*4882a593Smuzhiyun 	if (ret) {
204*4882a593Smuzhiyun 		nouveau_fbcon_gpu_lockup(info);
205*4882a593Smuzhiyun 		return ret;
206*4882a593Smuzhiyun 	}
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_OBJECT, nfbdev->twod.handle);
209*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_DST_CONTEXT_DMA, chan->vram.handle,
210*4882a593Smuzhiyun 				SET_SRC_CONTEXT_DMA, chan->vram.handle,
211*4882a593Smuzhiyun 				SET_SEMAPHORE_CONTEXT_DMA, chan->vram.handle);
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_DST_FORMAT,
214*4882a593Smuzhiyun 		  NVVAL(NV502D, SET_DST_FORMAT, V, format),
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 				SET_DST_MEMORY_LAYOUT,
217*4882a593Smuzhiyun 		  NVDEF(NV502D, SET_DST_MEMORY_LAYOUT, V, PITCH));
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_DST_PITCH, info->fix.line_length,
220*4882a593Smuzhiyun 				SET_DST_WIDTH, info->var.xres_virtual,
221*4882a593Smuzhiyun 				SET_DST_HEIGHT, info->var.yres_virtual,
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 				SET_DST_OFFSET_UPPER,
224*4882a593Smuzhiyun 		  NVVAL(NV502D, SET_DST_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)),
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 				SET_DST_OFFSET_LOWER,
227*4882a593Smuzhiyun 		  NVVAL(NV502D, SET_DST_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr)));
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_SRC_FORMAT,
230*4882a593Smuzhiyun 		  NVVAL(NV502D, SET_SRC_FORMAT, V, format),
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 				SET_SRC_MEMORY_LAYOUT,
233*4882a593Smuzhiyun 		  NVDEF(NV502D, SET_SRC_MEMORY_LAYOUT, V, PITCH));
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_SRC_PITCH, info->fix.line_length,
236*4882a593Smuzhiyun 				SET_SRC_WIDTH, info->var.xres_virtual,
237*4882a593Smuzhiyun 				SET_SRC_HEIGHT, info->var.yres_virtual,
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 				SET_SRC_OFFSET_UPPER,
240*4882a593Smuzhiyun 		  NVVAL(NV502D, SET_SRC_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)),
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 				SET_SRC_OFFSET_LOWER,
243*4882a593Smuzhiyun 		  NVVAL(NV502D, SET_SRC_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr)));
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_CLIP_ENABLE,
246*4882a593Smuzhiyun 		  NVDEF(NV502D, SET_CLIP_ENABLE, V, FALSE));
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_ROP,
249*4882a593Smuzhiyun 		  NVVAL(NV502D, SET_ROP, V, 0x55));
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_OPERATION,
252*4882a593Smuzhiyun 		  NVDEF(NV502D, SET_OPERATION, V, SRCCOPY));
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_MONOCHROME_PATTERN_COLOR_FORMAT,
255*4882a593Smuzhiyun 		  NVDEF(NV502D, SET_MONOCHROME_PATTERN_COLOR_FORMAT, V, A8R8G8B8),
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 				SET_MONOCHROME_PATTERN_FORMAT,
258*4882a593Smuzhiyun 		  NVDEF(NV502D, SET_MONOCHROME_PATTERN_FORMAT, V, LE_M1));
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, RENDER_SOLID_PRIM_MODE,
261*4882a593Smuzhiyun 		  NVDEF(NV502D, RENDER_SOLID_PRIM_MODE, V, RECTS),
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 				SET_RENDER_SOLID_PRIM_COLOR_FORMAT,
264*4882a593Smuzhiyun 		  NVVAL(NV502D, SET_RENDER_SOLID_PRIM_COLOR_FORMAT, V, format));
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_DATA_TYPE,
267*4882a593Smuzhiyun 		  NVDEF(NV502D, SET_PIXELS_FROM_CPU_DATA_TYPE, V, INDEX),
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 				SET_PIXELS_FROM_CPU_COLOR_FORMAT,
270*4882a593Smuzhiyun 		  NVVAL(NV502D, SET_PIXELS_FROM_CPU_COLOR_FORMAT, V, format),
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 				SET_PIXELS_FROM_CPU_INDEX_FORMAT,
273*4882a593Smuzhiyun 		  NVDEF(NV502D, SET_PIXELS_FROM_CPU_INDEX_FORMAT, V, I1),
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 				SET_PIXELS_FROM_CPU_MONO_FORMAT,
276*4882a593Smuzhiyun 		  NVDEF(NV502D, SET_PIXELS_FROM_CPU_MONO_FORMAT, V, CGA6_M1),
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 				SET_PIXELS_FROM_CPU_WRAP,
279*4882a593Smuzhiyun 		  NVDEF(NV502D, SET_PIXELS_FROM_CPU_WRAP, V, WRAP_BYTE));
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_MONO_OPACITY,
282*4882a593Smuzhiyun 		  NVDEF(NV502D, SET_PIXELS_FROM_CPU_MONO_OPACITY, V, OPAQUE));
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_DX_DU_FRAC, 0,
285*4882a593Smuzhiyun 				SET_PIXELS_FROM_CPU_DX_DU_INT, 1,
286*4882a593Smuzhiyun 				SET_PIXELS_FROM_CPU_DY_DV_FRAC, 0,
287*4882a593Smuzhiyun 				SET_PIXELS_FROM_CPU_DY_DV_INT, 1);
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP,
290*4882a593Smuzhiyun 		  NVDEF(NV502D, SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP, V, TRUE));
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_MEMORY_DU_DX_FRAC, 0,
293*4882a593Smuzhiyun 				SET_PIXELS_FROM_MEMORY_DU_DX_INT, 1,
294*4882a593Smuzhiyun 				SET_PIXELS_FROM_MEMORY_DV_DY_FRAC, 0,
295*4882a593Smuzhiyun 				SET_PIXELS_FROM_MEMORY_DV_DY_INT, 1);
296*4882a593Smuzhiyun 	PUSH_KICK(push);
297*4882a593Smuzhiyun 	return 0;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun 
300