1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 OR MIT
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA,
4*4882a593Smuzhiyun * Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA,
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
7*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
8*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
9*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sub license,
10*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
11*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the
14*4882a593Smuzhiyun * next paragraph) shall be included in all copies or substantial portions
15*4882a593Smuzhiyun * of the Software.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
20*4882a593Smuzhiyun * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
21*4882a593Smuzhiyun * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
22*4882a593Smuzhiyun * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
23*4882a593Smuzhiyun * USE OR OTHER DEALINGS IN THE SOFTWARE.
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun #include "nouveau_drv.h"
26*4882a593Smuzhiyun #include "nouveau_gem.h"
27*4882a593Smuzhiyun #include "nouveau_mem.h"
28*4882a593Smuzhiyun #include "nouveau_ttm.h"
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #include <drm/drm_legacy.h>
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #include <core/tegra.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun static void
nouveau_manager_del(struct ttm_resource_manager * man,struct ttm_resource * reg)35*4882a593Smuzhiyun nouveau_manager_del(struct ttm_resource_manager *man, struct ttm_resource *reg)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun nouveau_mem_del(reg);
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun static int
nouveau_vram_manager_new(struct ttm_resource_manager * man,struct ttm_buffer_object * bo,const struct ttm_place * place,struct ttm_resource * reg)41*4882a593Smuzhiyun nouveau_vram_manager_new(struct ttm_resource_manager *man,
42*4882a593Smuzhiyun struct ttm_buffer_object *bo,
43*4882a593Smuzhiyun const struct ttm_place *place,
44*4882a593Smuzhiyun struct ttm_resource *reg)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun struct nouveau_bo *nvbo = nouveau_bo(bo);
47*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
48*4882a593Smuzhiyun int ret;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun if (drm->client.device.info.ram_size == 0)
51*4882a593Smuzhiyun return -ENOMEM;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
54*4882a593Smuzhiyun if (ret)
55*4882a593Smuzhiyun return ret;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun ret = nouveau_mem_vram(reg, nvbo->contig, nvbo->page);
58*4882a593Smuzhiyun if (ret) {
59*4882a593Smuzhiyun nouveau_mem_del(reg);
60*4882a593Smuzhiyun return ret;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun return 0;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun const struct ttm_resource_manager_func nouveau_vram_manager = {
67*4882a593Smuzhiyun .alloc = nouveau_vram_manager_new,
68*4882a593Smuzhiyun .free = nouveau_manager_del,
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun static int
nouveau_gart_manager_new(struct ttm_resource_manager * man,struct ttm_buffer_object * bo,const struct ttm_place * place,struct ttm_resource * reg)72*4882a593Smuzhiyun nouveau_gart_manager_new(struct ttm_resource_manager *man,
73*4882a593Smuzhiyun struct ttm_buffer_object *bo,
74*4882a593Smuzhiyun const struct ttm_place *place,
75*4882a593Smuzhiyun struct ttm_resource *reg)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun struct nouveau_bo *nvbo = nouveau_bo(bo);
78*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
79*4882a593Smuzhiyun int ret;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
82*4882a593Smuzhiyun if (ret)
83*4882a593Smuzhiyun return ret;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun reg->start = 0;
86*4882a593Smuzhiyun return 0;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun const struct ttm_resource_manager_func nouveau_gart_manager = {
90*4882a593Smuzhiyun .alloc = nouveau_gart_manager_new,
91*4882a593Smuzhiyun .free = nouveau_manager_del,
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun static int
nv04_gart_manager_new(struct ttm_resource_manager * man,struct ttm_buffer_object * bo,const struct ttm_place * place,struct ttm_resource * reg)95*4882a593Smuzhiyun nv04_gart_manager_new(struct ttm_resource_manager *man,
96*4882a593Smuzhiyun struct ttm_buffer_object *bo,
97*4882a593Smuzhiyun const struct ttm_place *place,
98*4882a593Smuzhiyun struct ttm_resource *reg)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun struct nouveau_bo *nvbo = nouveau_bo(bo);
101*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
102*4882a593Smuzhiyun struct nouveau_mem *mem;
103*4882a593Smuzhiyun int ret;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
106*4882a593Smuzhiyun mem = nouveau_mem(reg);
107*4882a593Smuzhiyun if (ret)
108*4882a593Smuzhiyun return ret;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun ret = nvif_vmm_get(&mem->cli->vmm.vmm, PTES, false, 12, 0,
111*4882a593Smuzhiyun reg->num_pages << PAGE_SHIFT, &mem->vma[0]);
112*4882a593Smuzhiyun if (ret) {
113*4882a593Smuzhiyun nouveau_mem_del(reg);
114*4882a593Smuzhiyun return ret;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun reg->start = mem->vma[0].addr >> PAGE_SHIFT;
118*4882a593Smuzhiyun return 0;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun const struct ttm_resource_manager_func nv04_gart_manager = {
122*4882a593Smuzhiyun .alloc = nv04_gart_manager_new,
123*4882a593Smuzhiyun .free = nouveau_manager_del,
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun
nouveau_ttm_fault(struct vm_fault * vmf)126*4882a593Smuzhiyun static vm_fault_t nouveau_ttm_fault(struct vm_fault *vmf)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun struct vm_area_struct *vma = vmf->vma;
129*4882a593Smuzhiyun struct ttm_buffer_object *bo = vma->vm_private_data;
130*4882a593Smuzhiyun pgprot_t prot;
131*4882a593Smuzhiyun vm_fault_t ret;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun ret = ttm_bo_vm_reserve(bo, vmf);
134*4882a593Smuzhiyun if (ret)
135*4882a593Smuzhiyun return ret;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun nouveau_bo_del_io_reserve_lru(bo);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun prot = vm_get_page_prot(vma->vm_flags);
140*4882a593Smuzhiyun ret = ttm_bo_vm_fault_reserved(vmf, prot, TTM_BO_VM_NUM_PREFAULT, 1);
141*4882a593Smuzhiyun if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT))
142*4882a593Smuzhiyun return ret;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun nouveau_bo_add_io_reserve_lru(bo);
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun dma_resv_unlock(bo->base.resv);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun return ret;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun static struct vm_operations_struct nouveau_ttm_vm_ops = {
152*4882a593Smuzhiyun .fault = nouveau_ttm_fault,
153*4882a593Smuzhiyun .open = ttm_bo_vm_open,
154*4882a593Smuzhiyun .close = ttm_bo_vm_close,
155*4882a593Smuzhiyun .access = ttm_bo_vm_access
156*4882a593Smuzhiyun };
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun int
nouveau_ttm_mmap(struct file * filp,struct vm_area_struct * vma)159*4882a593Smuzhiyun nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun struct drm_file *file_priv = filp->private_data;
162*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_drm(file_priv->minor->dev);
163*4882a593Smuzhiyun int ret;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun ret = ttm_bo_mmap(filp, vma, &drm->ttm.bdev);
166*4882a593Smuzhiyun if (ret)
167*4882a593Smuzhiyun return ret;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun vma->vm_ops = &nouveau_ttm_vm_ops;
170*4882a593Smuzhiyun return 0;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun static int
nouveau_ttm_init_host(struct nouveau_drm * drm,u8 kind)174*4882a593Smuzhiyun nouveau_ttm_init_host(struct nouveau_drm *drm, u8 kind)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun struct nvif_mmu *mmu = &drm->client.mmu;
177*4882a593Smuzhiyun int typei;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE |
180*4882a593Smuzhiyun kind | NVIF_MEM_COHERENT);
181*4882a593Smuzhiyun if (typei < 0)
182*4882a593Smuzhiyun return -ENOSYS;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun drm->ttm.type_host[!!kind] = typei;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE | kind);
187*4882a593Smuzhiyun if (typei < 0)
188*4882a593Smuzhiyun return -ENOSYS;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun drm->ttm.type_ncoh[!!kind] = typei;
191*4882a593Smuzhiyun return 0;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun static int
nouveau_ttm_init_vram(struct nouveau_drm * drm)195*4882a593Smuzhiyun nouveau_ttm_init_vram(struct nouveau_drm *drm)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
198*4882a593Smuzhiyun struct ttm_resource_manager *man = kzalloc(sizeof(*man), GFP_KERNEL);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun if (!man)
201*4882a593Smuzhiyun return -ENOMEM;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun man->func = &nouveau_vram_manager;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun ttm_resource_manager_init(man,
206*4882a593Smuzhiyun drm->gem.vram_available >> PAGE_SHIFT);
207*4882a593Smuzhiyun ttm_set_driver_manager(&drm->ttm.bdev, TTM_PL_VRAM, man);
208*4882a593Smuzhiyun ttm_resource_manager_set_used(man, true);
209*4882a593Smuzhiyun return 0;
210*4882a593Smuzhiyun } else {
211*4882a593Smuzhiyun return ttm_range_man_init(&drm->ttm.bdev, TTM_PL_VRAM, false,
212*4882a593Smuzhiyun drm->gem.vram_available >> PAGE_SHIFT);
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun static void
nouveau_ttm_fini_vram(struct nouveau_drm * drm)217*4882a593Smuzhiyun nouveau_ttm_fini_vram(struct nouveau_drm *drm)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun struct ttm_resource_manager *man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_VRAM);
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
222*4882a593Smuzhiyun ttm_resource_manager_set_used(man, false);
223*4882a593Smuzhiyun ttm_resource_manager_force_list_clean(&drm->ttm.bdev, man);
224*4882a593Smuzhiyun ttm_resource_manager_cleanup(man);
225*4882a593Smuzhiyun ttm_set_driver_manager(&drm->ttm.bdev, TTM_PL_VRAM, NULL);
226*4882a593Smuzhiyun kfree(man);
227*4882a593Smuzhiyun } else
228*4882a593Smuzhiyun ttm_range_man_fini(&drm->ttm.bdev, TTM_PL_VRAM);
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun static int
nouveau_ttm_init_gtt(struct nouveau_drm * drm)232*4882a593Smuzhiyun nouveau_ttm_init_gtt(struct nouveau_drm *drm)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun struct ttm_resource_manager *man;
235*4882a593Smuzhiyun unsigned long size_pages = drm->gem.gart_available >> PAGE_SHIFT;
236*4882a593Smuzhiyun const struct ttm_resource_manager_func *func = NULL;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA)
239*4882a593Smuzhiyun func = &nouveau_gart_manager;
240*4882a593Smuzhiyun else if (!drm->agp.bridge)
241*4882a593Smuzhiyun func = &nv04_gart_manager;
242*4882a593Smuzhiyun else
243*4882a593Smuzhiyun return ttm_range_man_init(&drm->ttm.bdev, TTM_PL_TT, true,
244*4882a593Smuzhiyun size_pages);
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun man = kzalloc(sizeof(*man), GFP_KERNEL);
247*4882a593Smuzhiyun if (!man)
248*4882a593Smuzhiyun return -ENOMEM;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun man->func = func;
251*4882a593Smuzhiyun man->use_tt = true;
252*4882a593Smuzhiyun ttm_resource_manager_init(man, size_pages);
253*4882a593Smuzhiyun ttm_set_driver_manager(&drm->ttm.bdev, TTM_PL_TT, man);
254*4882a593Smuzhiyun ttm_resource_manager_set_used(man, true);
255*4882a593Smuzhiyun return 0;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun static void
nouveau_ttm_fini_gtt(struct nouveau_drm * drm)259*4882a593Smuzhiyun nouveau_ttm_fini_gtt(struct nouveau_drm *drm)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun struct ttm_resource_manager *man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_TT);
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA &&
264*4882a593Smuzhiyun drm->agp.bridge)
265*4882a593Smuzhiyun ttm_range_man_fini(&drm->ttm.bdev, TTM_PL_TT);
266*4882a593Smuzhiyun else {
267*4882a593Smuzhiyun ttm_resource_manager_set_used(man, false);
268*4882a593Smuzhiyun ttm_resource_manager_force_list_clean(&drm->ttm.bdev, man);
269*4882a593Smuzhiyun ttm_resource_manager_cleanup(man);
270*4882a593Smuzhiyun ttm_set_driver_manager(&drm->ttm.bdev, TTM_PL_TT, NULL);
271*4882a593Smuzhiyun kfree(man);
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun int
nouveau_ttm_init(struct nouveau_drm * drm)276*4882a593Smuzhiyun nouveau_ttm_init(struct nouveau_drm *drm)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun struct nvkm_device *device = nvxx_device(&drm->client.device);
279*4882a593Smuzhiyun struct nvkm_pci *pci = device->pci;
280*4882a593Smuzhiyun struct nvif_mmu *mmu = &drm->client.mmu;
281*4882a593Smuzhiyun struct drm_device *dev = drm->dev;
282*4882a593Smuzhiyun int typei, ret;
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun ret = nouveau_ttm_init_host(drm, 0);
285*4882a593Smuzhiyun if (ret)
286*4882a593Smuzhiyun return ret;
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
289*4882a593Smuzhiyun drm->client.device.info.chipset != 0x50) {
290*4882a593Smuzhiyun ret = nouveau_ttm_init_host(drm, NVIF_MEM_KIND);
291*4882a593Smuzhiyun if (ret)
292*4882a593Smuzhiyun return ret;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun if (drm->client.device.info.platform != NV_DEVICE_INFO_V0_SOC &&
296*4882a593Smuzhiyun drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
297*4882a593Smuzhiyun typei = nvif_mmu_type(mmu, NVIF_MEM_VRAM | NVIF_MEM_MAPPABLE |
298*4882a593Smuzhiyun NVIF_MEM_KIND |
299*4882a593Smuzhiyun NVIF_MEM_COMP |
300*4882a593Smuzhiyun NVIF_MEM_DISP);
301*4882a593Smuzhiyun if (typei < 0)
302*4882a593Smuzhiyun return -ENOSYS;
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun drm->ttm.type_vram = typei;
305*4882a593Smuzhiyun } else {
306*4882a593Smuzhiyun drm->ttm.type_vram = -1;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun if (pci && pci->agp.bridge) {
310*4882a593Smuzhiyun drm->agp.bridge = pci->agp.bridge;
311*4882a593Smuzhiyun drm->agp.base = pci->agp.base;
312*4882a593Smuzhiyun drm->agp.size = pci->agp.size;
313*4882a593Smuzhiyun drm->agp.cma = pci->agp.cma;
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun ret = ttm_bo_device_init(&drm->ttm.bdev,
317*4882a593Smuzhiyun &nouveau_bo_driver,
318*4882a593Smuzhiyun dev->anon_inode->i_mapping,
319*4882a593Smuzhiyun dev->vma_offset_manager,
320*4882a593Smuzhiyun drm->client.mmu.dmabits <= 32 ? true : false);
321*4882a593Smuzhiyun if (ret) {
322*4882a593Smuzhiyun NV_ERROR(drm, "error initialising bo driver, %d\n", ret);
323*4882a593Smuzhiyun return ret;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun /* VRAM init */
327*4882a593Smuzhiyun drm->gem.vram_available = drm->client.device.info.ram_user;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun arch_io_reserve_memtype_wc(device->func->resource_addr(device, 1),
330*4882a593Smuzhiyun device->func->resource_size(device, 1));
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun ret = nouveau_ttm_init_vram(drm);
333*4882a593Smuzhiyun if (ret) {
334*4882a593Smuzhiyun NV_ERROR(drm, "VRAM mm init failed, %d\n", ret);
335*4882a593Smuzhiyun return ret;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun drm->ttm.mtrr = arch_phys_wc_add(device->func->resource_addr(device, 1),
339*4882a593Smuzhiyun device->func->resource_size(device, 1));
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun /* GART init */
342*4882a593Smuzhiyun if (!drm->agp.bridge) {
343*4882a593Smuzhiyun drm->gem.gart_available = drm->client.vmm.vmm.limit;
344*4882a593Smuzhiyun } else {
345*4882a593Smuzhiyun drm->gem.gart_available = drm->agp.size;
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun ret = nouveau_ttm_init_gtt(drm);
349*4882a593Smuzhiyun if (ret) {
350*4882a593Smuzhiyun NV_ERROR(drm, "GART mm init failed, %d\n", ret);
351*4882a593Smuzhiyun return ret;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun mutex_init(&drm->ttm.io_reserve_mutex);
355*4882a593Smuzhiyun INIT_LIST_HEAD(&drm->ttm.io_reserve_lru);
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun NV_INFO(drm, "VRAM: %d MiB\n", (u32)(drm->gem.vram_available >> 20));
358*4882a593Smuzhiyun NV_INFO(drm, "GART: %d MiB\n", (u32)(drm->gem.gart_available >> 20));
359*4882a593Smuzhiyun return 0;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun void
nouveau_ttm_fini(struct nouveau_drm * drm)363*4882a593Smuzhiyun nouveau_ttm_fini(struct nouveau_drm *drm)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun struct nvkm_device *device = nvxx_device(&drm->client.device);
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun nouveau_ttm_fini_vram(drm);
368*4882a593Smuzhiyun nouveau_ttm_fini_gtt(drm);
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun ttm_bo_device_release(&drm->ttm.bdev);
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun arch_phys_wc_del(drm->ttm.mtrr);
373*4882a593Smuzhiyun drm->ttm.mtrr = 0;
374*4882a593Smuzhiyun arch_io_free_memtype_wc(device->func->resource_addr(device, 1),
375*4882a593Smuzhiyun device->func->resource_size(device, 1));
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun }
378