1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17*4882a593Smuzhiyun * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18*4882a593Smuzhiyun * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20*4882a593Smuzhiyun * DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun */
22*4882a593Smuzhiyun #include "nouveau_platform.h"
23*4882a593Smuzhiyun
nouveau_platform_probe(struct platform_device * pdev)24*4882a593Smuzhiyun static int nouveau_platform_probe(struct platform_device *pdev)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun const struct nvkm_device_tegra_func *func;
27*4882a593Smuzhiyun struct nvkm_device *device = NULL;
28*4882a593Smuzhiyun struct drm_device *drm;
29*4882a593Smuzhiyun int ret;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun func = of_device_get_match_data(&pdev->dev);
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun drm = nouveau_platform_device_create(func, pdev, &device);
34*4882a593Smuzhiyun if (IS_ERR(drm))
35*4882a593Smuzhiyun return PTR_ERR(drm);
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun ret = drm_dev_register(drm, 0);
38*4882a593Smuzhiyun if (ret < 0) {
39*4882a593Smuzhiyun drm_dev_put(drm);
40*4882a593Smuzhiyun return ret;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun return 0;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
nouveau_platform_remove(struct platform_device * pdev)46*4882a593Smuzhiyun static int nouveau_platform_remove(struct platform_device *pdev)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun struct drm_device *dev = platform_get_drvdata(pdev);
49*4882a593Smuzhiyun nouveau_drm_device_remove(dev);
50*4882a593Smuzhiyun return 0;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_OF)
54*4882a593Smuzhiyun static const struct nvkm_device_tegra_func gk20a_platform_data = {
55*4882a593Smuzhiyun .iommu_bit = 34,
56*4882a593Smuzhiyun .require_vdd = true,
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun static const struct nvkm_device_tegra_func gm20b_platform_data = {
60*4882a593Smuzhiyun .iommu_bit = 34,
61*4882a593Smuzhiyun .require_vdd = true,
62*4882a593Smuzhiyun .require_ref_clk = true,
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static const struct nvkm_device_tegra_func gp10b_platform_data = {
66*4882a593Smuzhiyun .iommu_bit = 36,
67*4882a593Smuzhiyun /* power provided by generic PM domains */
68*4882a593Smuzhiyun .require_vdd = false,
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun static const struct of_device_id nouveau_platform_match[] = {
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun .compatible = "nvidia,gk20a",
74*4882a593Smuzhiyun .data = &gk20a_platform_data,
75*4882a593Smuzhiyun },
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun .compatible = "nvidia,gm20b",
78*4882a593Smuzhiyun .data = &gm20b_platform_data,
79*4882a593Smuzhiyun },
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun .compatible = "nvidia,gp10b",
82*4882a593Smuzhiyun .data = &gp10b_platform_data,
83*4882a593Smuzhiyun },
84*4882a593Smuzhiyun { }
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, nouveau_platform_match);
88*4882a593Smuzhiyun #endif
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun struct platform_driver nouveau_platform_driver = {
91*4882a593Smuzhiyun .driver = {
92*4882a593Smuzhiyun .name = "nouveau",
93*4882a593Smuzhiyun .of_match_table = of_match_ptr(nouveau_platform_match),
94*4882a593Smuzhiyun },
95*4882a593Smuzhiyun .probe = nouveau_platform_probe,
96*4882a593Smuzhiyun .remove = nouveau_platform_remove,
97*4882a593Smuzhiyun };
98